公开(公告)号：US07772046B2

公开(公告)日：2010-08-10

申请号：US12133133

申请日：2008-06-04

申请人： Reza A. Pagaila ,  Byung Tai Do ,  Yaojian Lin ,  Rui Huang

发明人： Reza A. Pagaila ,  Byung Tai Do ,  Yaojian Lin ,  Rui Huang

IPC分类号： H01L21/58

CPC分类号： H01L23/3128 ,  H01L23/29 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/48 ,  H01L25/165 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15192 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device is made by forming an integrated passive device (IPD) structure on a substrate, mounting first and second electrical devices to a first surface of the IPD structure, depositing encapsulant over the first and second electrical devices and IPD structure, forming a shielding layer over the encapsulant, and electrically connecting the shielding layer to a conductive channel in the IPD structure. The conductive channel is connected to ground potential to isolate the first and second electrical devices from external interference. A recess can be formed in the encapsulant material between the first and second electrical devices. The shielding layer extends into the recess. An interconnect structure is formed on a second surface of the IPD structure. The interconnect structure is electrically connected to the first and second electrical devices and IPD structure. A shielding cage can be formed over the first electrical device prior to depositing encapsulant.

摘要翻译： 通过在基板上形成集成的无源器件（IPD）结构，将第一和第二电气器件安装到IPD结构的第一表面上，在第一和第二电气设备和IPD结构上形成密封剂，形成半导体器件，形成屏蔽 层，并且将屏蔽层电连接到IPD结构中的导电通道。 导电通道连接到地电位，以隔离第一和第二电气装置与外部干扰。 可以在第一和第二电气装置之间的密封剂材料中形成凹部。 屏蔽层延伸到凹槽中。 互连结构形成在IPD结构的第二表面上。 互连结构电连接到第一和第二电气设备和IPD结构。 在沉积密封剂之前，可以在第一电气装置上形成屏蔽笼。

公开(公告)号：US20090302439A1

公开(公告)日：2009-12-10

申请号：US12133133

申请日：2008-06-04

申请人： Reza A. Pagaila ,  Byung Tai Do ,  Yaojian Lin ,  Rui Huang

发明人： Reza A. Pagaila ,  Byung Tai Do ,  Yaojian Lin ,  Rui Huang

IPC分类号： H01L21/56 ,  H01L23/02

CPC分类号： H01L23/3128 ,  H01L23/29 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/48 ,  H01L25/165 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15192 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device is made by forming an integrated passive device (IPD) structure on a substrate, mounting first and second electrical devices to a first surface of the IPD structure, depositing encapsulant over the first and second electrical devices and IPD structure, forming a shielding layer over the encapsulant, and electrically connecting the shielding layer to a conductive channel in the IPD structure. The conductive channel is connected to ground potential to isolate the first and second electrical devices from external interference. A recess can be formed in the encapsulant material between the first and second electrical devices. The shielding layer extends into the recess. An interconnect structure is formed on a second surface of the IPD structure. The interconnect structure is electrically connected to the first and second electrical devices and IPD structure. A shielding cage can be formed over the first electrical device prior to depositing encapsulant.

摘要翻译： 通过在基板上形成集成的无源器件（IPD）结构，将第一和第二电气器件安装到IPD结构的第一表面上，在第一和第二电气设备和IPD结构上形成密封剂，形成半导体器件，形成屏蔽 层，并且将屏蔽层电连接到IPD结构中的导电通道。 导电通道连接到地电位，以隔离第一和第二电气装置与外部干扰。 可以在第一和第二电气装置之间的密封剂材料中形成凹部。 屏蔽层延伸到凹槽中。 互连结构形成在IPD结构的第二表面上。 互连结构电连接到第一和第二电气设备和IPD结构。 在沉积密封剂之前，可以在第一电气装置上形成屏蔽笼。

公开(公告)号：US20090302435A1

公开(公告)日：2009-12-10

申请号：US12133216

申请日：2008-06-04

申请人： Reza A. Pagaila ,  Byung Tai Do ,  Heap Hoe Kuan ,  Rui Huang

发明人： Reza A. Pagaila ,  Byung Tai Do ,  Heap Hoe Kuan ,  Rui Huang

IPC分类号： H01L23/552 ,  H01L21/50

CPC分类号： H01L21/568 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/552 ,  H01L24/19 ,  H01L24/48 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05571 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A plurality of stacked semiconductor wafers each contain a plurality of semiconductor die. The semiconductor die each have a conductive via formed through the die. A gap is created between the semiconductor die. A conductive material is deposited in a bottom portion of the gap. An insulating material is deposited in the gap and over the semiconductor die. A portion of the insulating material in the gap is removed to form a recess between each semiconductor die extending to the conductive material. A shielding layer is formed over the insulating material and in the recess to contact the conductive material. The shielding layer isolates the semiconductor die from inter-device interference. A substrate is formed as a build-up structure on the semiconductor die adjacent to the conductive material. The conductive material electrically connects to a ground point in the substrate. The gap is singulating to separate the semiconductor die.

摘要翻译： 多个堆叠的半导体晶片各自包含多个半导体管芯。 半导体管芯每个都具有通过管芯形成的导电通孔。 在半导体管芯之间产生间隙。 导电材料沉积在间隙的底部。 绝缘材料沉积在间隙中并在半导体管芯上方。 间隙中的绝缘材料的一部分被去除以在延伸到导电材料的每个半导体管芯之间形成凹槽。 在绝缘材料之上和凹部中形成屏蔽层以接触导电材料。 屏蔽层将半导体管芯与器件间干扰隔离。 在与导电材料相邻的半导体管芯上形成基板作为堆积结构。 导电材料电连接到衬底中的接地点。 间隙是分离半导体管芯。

公开(公告)号：US20090224402A1

公开(公告)日：2009-09-10

申请号：US12044803

申请日：2008-03-07

申请人： Byung Tai Do ,  Seng Guan Chow ,  Heap Hoe Kuan ,  Linda Pei Ee Chua ,  Rui Huang

发明人： Byung Tai Do ,  Seng Guan Chow ,  Heap Hoe Kuan ,  Linda Pei Ee Chua ,  Rui Huang

IPC分类号： H01L23/488 ,  H01L21/60

CPC分类号： H01L24/19 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/50 ,  H01L23/5389 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor wafer is made by forming a first conductive layer over a sacrificial substrate, mounting a semiconductor die to the sacrificial substrate, depositing an insulating layer over the semiconductor die and first conductive layer, exposing the first conductive layer and contact pad on the semiconductor die, forming a second conductive layer over the insulating layer between the first conductive layer and contact pad, forming solder bumps on the second conductive layer, depositing an encapsulant over the semiconductor die, first conductive layer, and interconnect structure, and removing the sacrificial substrate after forming the encapsulant to expose the conductive layer and semiconductor die. A portion of the encapsulant is removed to expose a portion of the solder bumps. The solder bumps are sized so that each extends the same outside the encapsulant. The semiconductor die are stacked by electrically connecting the solder bumps.

摘要翻译： 通过在牺牲衬底上形成第一导电层，将半导体管芯安装到牺牲衬底上，在半导体管芯和第一导电层上方沉积绝缘层，暴露半导体管芯上的第一导电层和接触焊盘来制造半导体晶片 在所述第一导电层和所述接触焊盘之间的所述绝缘层上方形成第二导电层，在所述第二导电层上形成焊料凸块，在所述半导体管芯上方沉积密封剂，所述第一导电层和互连结构， 形成密封剂以暴露导电层和半导体管芯。 去除一部分密封剂以露出焊料凸块的一部分。 焊料凸块的尺寸设计成使得每个焊料凸块在封装体外均延伸。 通过电连接焊料凸块来堆叠半导体管芯。

公开(公告)号：US08507319B2

公开(公告)日：2013-08-13

申请号：US11952968

申请日：2007-12-07

申请人： Seng Guan Chow ,  Byung Tai Do ,  Heap Hoe Kuan ,  Rui Huang

发明人： Seng Guan Chow ,  Byung Tai Do ,  Heap Hoe Kuan ,  Rui Huang

IPC分类号： H01L21/60

CPC分类号： H01L23/3107 ,  H01L23/49503 ,  H01L23/49548 ,  H01L23/552 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： An integrated circuit package system includes: forming a first lead and a second lead; connecting an integrated circuit die with the first lead; forming an encapsulation over the integrated circuit die, the first lead, and the second lead with a portion of a top side of the second lead exposed; and forming a shield over the encapsulation, the first lead, and the second lead with the shield not in contact with the first lead.

摘要翻译： 集成电路封装系统包括：形成第一引线和第二引线; 将集成电路管芯与第一引线连接; 在所述集成电路管芯上形成封装，所述第一引线和所述第二引线与所述第二引线的顶侧的一部分暴露; 以及在所述封装，所述第一引线和所述第二引线上形成屏蔽件，所述屏蔽件不与所述第一引线接触。

公开(公告)号：US08048776B2

公开(公告)日：2011-11-01

申请号：US12036000

申请日：2008-02-22

申请人： Byung Tai Do ,  Heap Hoe Kuan ,  Yaojian Lin ,  Rui Huang

发明人： Byung Tai Do ,  Heap Hoe Kuan ,  Yaojian Lin ,  Rui Huang

IPC分类号： H01L21/30

CPC分类号： H01L24/11 ,  H01L21/304 ,  H01L24/13 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/1131 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13155 ,  H01L2224/16 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00014

摘要： A semiconductor device is made by providing a semiconductor wafer having an active surface, forming an under bump metallization layer on the active surface of the semiconductor wafer, forming a first photosensitive layer on the active surface of the semiconductor wafer, exposing a selected portion of the first photosensitive layer over the under bump metallization layer to light, removing a portion of a backside of the semiconductor wafer, opposite to the active surface, prior to developing the exposed portion of the first photosensitive layer, developing the exposed portion of the first photosensitive layer after removing the portion of the backside of the semiconductor wafer, and depositing solder material over the under bump metallization layer to form solder bumps. The remaining portion of the first photosensitive layer is then removed. A second photosensitive layer or metal stencil can be formed over the first photosensitive layer.

摘要翻译： 通过提供具有活性表面的半导体晶片制造半导体器件，在半导体晶片的有源表面上形成凸起下金属化层，在半导体晶片的有源表面上形成第一感光层，将所选择的部分 在凸起下金属化层之上的第一感光层进行光照射，在显影第一感光层的暴露部分之前，移除与有源表面相对的半导体晶片的背面的一部分，将第一感光层的暴露部分 在去除半导体晶片的背面的部分之后，并且将焊料材料沉积在凸块下金属化层上以形成焊料凸块。 然后除去第一感光层的剩余部分。 可以在第一感光层上形成第二感光层或金属模版。

公开(公告)号：US07880275B2

公开(公告)日：2011-02-01

申请号：US12572568

申请日：2009-10-02

申请人： Reza A. Pagaila ,  Byung Tai Do ,  Rui Huang

发明人： Reza A. Pagaila ,  Byung Tai Do ,  Rui Huang

IPC分类号： H01L23/552

CPC分类号： H01L25/105 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/29 ,  H01L23/3114 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L24/48 ,  H01L24/82 ,  H01L24/96 ,  H01L2221/68345 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/12105 ,  H01L2224/48091 ,  H01L2224/48471 ,  H01L2224/73265 ,  H01L2224/85385 ,  H01L2225/06527 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a semiconductor die with a peripheral region around the die. A first insulating material is deposited in the peripheral region. A conductive via is formed through the first insulating material. A conductive layer is formed over the semiconductor die. The conductive layer is electrically connected between the conductive via and a contact pad of the semiconductor die. A second insulating layer is deposited over the first insulating layer, conductive layer, and semiconductor die. A profile is formed in the first and second insulating layers in the peripheral region. The profile is tapered, V-shaped, truncated V-shape, flat, or vertical. A shielding layer is formed over the first and second insulating layers to isolate the semiconductor die from inter-device interference. The shielding layer conforms to the profile in the peripheral region and electrically connects the shielding layer to the conductive via.

摘要翻译： 半导体器件具有半导体管芯，该半导体管芯具有围绕管芯的周边区域。 第一绝缘材料沉积在周边区域中。 通过第一绝缘材料形成导电通孔。 在半导体管芯上形成导电层。 导电层电连接在导电通孔和半导体管芯的接触焊盘之间。 在第一绝缘层，导电层和半导体管芯上沉积第二绝缘层。 在周边区域的第一绝缘层和第二绝缘层中形成轮廓。 型材呈锥形，V形，截头V形，扁平或垂直。 在第一绝缘层和第二绝缘层之上形成屏蔽层以将半导体管芯与器件间干扰隔离。 屏蔽层符合外围区域中的轮廓并将屏蔽层电连接到导电通孔。

公开(公告)号：US07834430B2

公开(公告)日：2010-11-16

申请号：US12203332

申请日：2008-09-03

申请人： Byung Tai Do ,  Heap Hoe Kuan ,  Rui Huang

发明人： Byung Tai Do ,  Heap Hoe Kuan ,  Rui Huang

IPC分类号： H01L23/495

CPC分类号： H01L23/49548 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/4334 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated circuit package system includes: providing an integrated circuit; mounting a lead on the periphery of the integrated circuit; connecting the integrated circuit to the lead with an interconnect; and forming a conformable material by pressing the conformable material on the integrated circuit, the lead, and the interconnect.

摘要翻译： 集成电路封装系统包括：提供集成电路; 在集成电路的外围安装引线; 通过互连将集成电路连接到引线; 以及通过在集成电路，引线和互连上按压适形材料来形成适形材料。

公开(公告)号：US07618846B1

公开(公告)日：2009-11-17

申请号：US12140092

申请日：2008-06-16

申请人： Reza A. Pagaila ,  Byung Tai Do ,  Rui Huang

发明人： Reza A. Pagaila ,  Byung Tai Do ,  Rui Huang

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L25/105 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/29 ,  H01L23/3114 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L24/48 ,  H01L24/82 ,  H01L24/96 ,  H01L2221/68345 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/12105 ,  H01L2224/48091 ,  H01L2224/48471 ,  H01L2224/73265 ,  H01L2224/85385 ,  H01L2225/06527 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a semiconductor die with a peripheral region around the die. A first insulating material is deposited in the peripheral region. A conductive via is formed through the first insulating material. A conductive layer is formed over the semiconductor die. The conductive layer is electrically connected between the conductive via and a contact pad of the semiconductor die. A second insulating layer is deposited over the first insulating layer, conductive layer, and semiconductor die. A profile is formed in the first and second insulating layers in the peripheral region. The profile is tapered, V-shaped, truncated V-shape, flat, or vertical. A shielding layer is formed over the first and second insulating layers to isolate the semiconductor die from inter-device interference. The shielding layer conforms to the profile in the peripheral region and electrically connects the shielding layer to the conductive via.

摘要翻译： 半导体器件具有半导体管芯，该半导体管芯具有围绕管芯的周边区域。 第一绝缘材料沉积在周边区域中。 通过第一绝缘材料形成导电通孔。 在半导体管芯上形成导电层。 导电层电连接在导电通孔和半导体管芯的接触焊盘之间。 在第一绝缘层，导电层和半导体管芯上沉积第二绝缘层。 在周边区域的第一绝缘层和第二绝缘层中形成轮廓。 型材呈锥形，V形，截头V形，扁平或垂直。 在第一绝缘层和第二绝缘层之上形成屏蔽层以将半导体管芯与器件间干扰隔离。 屏蔽层符合外围区域中的轮廓并将屏蔽层电连接到导电通孔。

公开(公告)号：US20090212401A1

公开(公告)日：2009-08-27

申请号：US12037774

申请日：2008-02-26

申请人： Byung Tai Do ,  Rui Huang ,  Seng Guan Chow ,  Heap Hoe Kuan

发明人： Byung Tai Do ,  Rui Huang ,  Seng Guan Chow ,  Heap Hoe Kuan

IPC分类号： H01L23/552 ,  H01L21/56

CPC分类号： H01L23/3128 ,  H01L21/56 ,  H01L23/552 ,  H01L24/48 ,  H01L24/73 ,  H01L24/91 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： The present invention provides a package system including: providing a semiconductor die with a contact pad and a ground pad, mounting the semiconductor die on a package substrate using and adhesive layer, forming a vertical conductive structure on top of the ground pad in the semiconductor die, encapsulating at least portions of the semiconductor die, the vertical conductive structure, and the package substrate using an encapsulant, covering at least portions of the encapsulant and the vertical conductive structure with a shielding layer to place the vertical conductive structure in electrical contact with the shielding layer, and connecting the shielding layer to the package substrate.

摘要翻译： 本发明提供了一种封装系统，包括：提供具有接触焊盘和接地焊盘的半导体管芯，使用粘合剂层将半导体管芯安装在封装衬底上，在半导体管芯中的接地焊盘顶部形成垂直导电结构 ，使用密封剂封装半导体管芯，垂直导电结构和封装衬底的至少一部分，用屏蔽层覆盖至少一部分密封剂和垂直导电结构，以使垂直导电结构与 屏蔽层，并且将屏蔽层连接到封装基板。