公开(公告)号：US06559985B1

公开(公告)日：2003-05-06

申请号：US09917043

申请日：2001-07-27

申请人： James E. DeGrange, Jr. ,  Sridhar Balakrishnan

发明人： James E. DeGrange, Jr. ,  Sridhar Balakrishnan

IPC分类号： H04B1008

CPC分类号： H04B10/2935 ,  H04B10/0775 ,  H04B2210/078 ,  H04J14/0201 ,  H04J14/0221 ,  H04J14/0227

摘要： The invention includes a method for determining channel power in an optical communications network. The method includes determining at least one transmission parameter for a channel. Exemplary transmission parameters include transmission rate and transmission format. A number of channel units is determined in response to the transmission parameter. Channel power is then determined for the channel in response to the number of channel units. A system for implementing the method is also disclosed.

摘要翻译： 本发明包括一种用于确定光通信网络中的信道功率的方法。 该方法包括确定用于信道的至少一个传输参数。 示例性传输参数包括传输速率和传输格式。 响应于传输参数确定多个信道单元。 然后响应于信道单元的数量为信道确定信道功率。 还公开了一种用于实现该方法的系统。

公开(公告)号：US06461954B1

公开(公告)日：2002-10-08

申请号：US09929408

申请日：2001-08-14

申请人： Jian Li ,  Xiao-Chun Mu ,  Sridhar Balakrishnan

发明人： Jian Li ,  Xiao-Chun Mu ,  Sridhar Balakrishnan

IPC分类号： H01L2130

CPC分类号： H01L23/485 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  Y10T428/12479 ,  Y10T428/12556 ,  Y10T428/12583 ,  Y10T428/12743 ,  Y10T428/12812 ,  Y10T428/31678 ,  H01L2224/05552

摘要： Methods and apparatuses are disclosed in which a refractory layer is formed during rapid thermal processing wherein ambient hydrogen is used in the thermal processing chamber. Rapid thermal processing may occur at a temperature approximately in the range of 350° C. to approximately 550° C.

公开(公告)号：US08637778B2

公开(公告)日：2014-01-28

申请号：US12756748

申请日：2010-04-08

申请人： Qing Ma ,  Jun He ,  Patrick Morrow ,  Paul B. Fischer ,  Sridhar Balakrishnan ,  Satish Radhakrishnan ,  Tatyana Tanya Andryushchenko ,  Guanghai Xu

发明人： Qing Ma ,  Jun He ,  Patrick Morrow ,  Paul B. Fischer ,  Sridhar Balakrishnan ,  Satish Radhakrishnan ,  Tatyana Tanya Andryushchenko ,  Guanghai Xu

IPC分类号： H05K1/03 ,  H05K7/02

CPC分类号： H01L24/19 ,  B23K1/0016 ,  H01L21/0334 ,  H01L24/11 ,  H01L2224/245 ,  H01L2924/01322 ,  H01L2924/14 ,  H05K3/4015 ,  H05K2201/1028 ,  H01L2924/00

摘要： The present subject matter relates to the field of fabricating microelectronic devices. In at least one embodiment, the present subject matter relates to forming an interconnect that has a portion thereof which becomes debonded from the microelectronic device during cooling after attachment to an external device. The debonded portion allows the interconnect to flex and absorb stress.

摘要翻译： 本主题涉及制造微电子器件的领域。 在至少一个实施例中，本主题涉及形成具有其部分的互连，其在附接到外部设备之后在冷却期间从微电子器件脱粘。 脱粘部分允许互连件弯曲并吸收应力。

公开(公告)号：US08580679B2

公开(公告)日：2013-11-12

申请号：US11894627

申请日：2007-08-20

申请人： Valery M. Dubin ,  Sridhar Balakrishnan ,  Mark Bohr

发明人： Valery M. Dubin ,  Sridhar Balakrishnan ,  Mark Bohr

IPC分类号： H01L33/62

CPC分类号： H01L24/13 ,  H01L21/288 ,  H01L21/4853 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11614 ,  H01L2224/13026 ,  H01L2224/13084 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/1312 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13166 ,  H01L2224/13564 ,  H01L2224/13611 ,  H01L2224/13639 ,  H01L2224/13647 ,  H01L2224/29111 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/35121 ,  H01L2924/3651 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： Methods, techniques, and structures relating to die packaging. In one exemplary implementation, a die package interconnect structure includes a semiconductor substrate and a first conducting layer in contact with the semiconductor substrate. The first conducting layer may include a base layer metal. The base layer metal may include Cu. The exemplary implementation may also include a diffusion barrier in contact with the first conducting layer and a wetting layer on top of the diffusion barrier. A bump layer may reside on top of the wetting layer, in which the bump layer may include Sn, and Sn may be electroplated. The diffusion barrier may be electroless and may be adapted to prevent Cu and Sn from diffusing through the diffusion barrier. Furthermore, the diffusion barrier may be further adapted to suppress a whisker-type formation in the bump layer.

摘要翻译： 与模具包装相关的方法，技术和结构。 在一个示例性实施例中，管芯封装互连结构包括半导体衬底和与半导体衬底接触的第一导电层。 第一导电层可以包括基底层金属。 基底层金属可以包括Cu。 示例性实施方式还可以包括与第一导电层接触的扩散阻挡层和在扩散阻挡层顶部的润湿层。 凸起层可以驻留在润湿层的顶部，其中凸起层可以包括Sn，并且Sn可以被电镀。 扩散阻挡层可以是无电解的并且可以适于防止Cu和Sn扩散通过扩散阻挡层。 此外，扩散阻挡层可以进一步适于抑制凸块层中的晶须型形成。

公开(公告)号：US20120248608A1

公开(公告)日：2012-10-04

申请号：US13078683

申请日：2011-04-01

申请人： Hui Jae Yoo ,  Jeffery D. Bielefeld ,  Sean W. King ,  Sridhar Balakrishnan

发明人： Hui Jae Yoo ,  Jeffery D. Bielefeld ,  Sean W. King ,  Sridhar Balakrishnan

IPC分类号： H01L23/485 ,  H01L21/768

CPC分类号： H01L21/76834 ,  H01L21/2855 ,  H01L21/32053 ,  H01L21/76832 ,  H01L21/76835 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76864 ,  H01L21/76867 ,  H01L21/76897 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L2924/0002 ,  Y10S438/927 ,  H01L2924/00

摘要： Processes of forming an insulated wire into an interlayer dielectric layer (ILD) of a back-end metallization includes thermally treating a metallic barrier precursor under conditions to cause at least one alloying element in the barrier precursor to form a dielectric barrier between the wire and the ILD. The dielectric barrier is therefore a self-forming, self-aligned barrier. Thermal processing is done under conditions to cause the at least one alloying element to migrate from a zone of higher concentration thereof to a zone of lower concentration thereof to further form the dielectric barrier. Various apparatus are made by the process.

摘要翻译： 在后端金属化的层间电介质层（ILD）中形成绝缘线的工艺包括在使阻挡前体中的至少一个合金元素引起的金属屏障前体之间形成电介质势垒 ILD。 因此，介电阻挡层是自形成的自对准势垒。 热处理在使至少一种合金元素从其较高浓度的区域迁移到其较低浓度的区域的条件下进行以进一步形成电介质阻挡层。 通过该方法制造各种装置。

公开(公告)号：US07772706B2

公开(公告)日：2010-08-10

申请号：US11965665

申请日：2007-12-27

申请人： Sridhar Balakrishnan ,  Boyan Boyanov

发明人： Sridhar Balakrishnan ,  Boyan Boyanov

IPC分类号： H01L21/4763

CPC分类号： H01L21/7682 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/76885 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/00

摘要： A spacer is adjacent to a conductive line. Vias that do not completely land on the conductive line land on the spacer and do not punch through into a volume below the spacer.

摘要翻译： 间隔件与导线相邻。 没有完全降落在间隔物上的导电线上的通孔，并且不穿入隔垫之下的体积。

公开(公告)号：US20090169760A1

公开(公告)日：2009-07-02

申请号：US11968136

申请日：2007-12-31

申请人： Rohan Akolkar ,  Florian Gstrein ,  Boyan Boyanov ,  Sridhar Balakrishnan

发明人： Rohan Akolkar ,  Florian Gstrein ,  Boyan Boyanov ,  Sridhar Balakrishnan

IPC分类号： C23C4/06 ,  B05D5/12

CPC分类号： C23C14/046 ,  C23C14/025 ,  C23C14/16 ,  C23C14/5806 ,  C23C14/588 ,  H01L21/76846 ,  H01L21/76882 ,  H01L23/53238

摘要： Methods for making copper (Cu) interconnects in semiconductor devices for interconnect dimensions less than 50 nm are described. The processes form Cu interconnects using a sequence of barrier layer, liner layer, and Cu deposition layer depositions, followed by a thermally assisted Cu reflow of the Cu deposition layer, and then a chemical mechanical polish (CMP) to removed excess portions of the reflowed Cu. The liner layer comprises noble metals such as Ru, Ir, Os, Rh, Re, Pd, Pt, and Au. Such processes avoids the formation of voids in copper interconnects with dimensions less than 50 nm.

摘要翻译： 描述了半导体器件中铜（Cu）互连的互连尺寸小于50nm的方法。 这些过程使用阻挡层，衬层和Cu沉积层沉积序列形成Cu互连，随后是Cu沉积层的热辅助铜回流，然后用化学机械抛光（CMP）去除被回流的多余部分 铜。 衬里层包括贵金属如Ru，Ir，Os，Rh，Re，Pd，Pt和Au。 这种方法避免了在尺寸小于50nm的铜互连件中形成空隙。

公开(公告)号：US07335587B2

公开(公告)日：2008-02-26

申请号：US11173858

申请日：2005-06-30

申请人： Steven W. Johnston ,  Kevin P. O'Brien ,  Sridhar Balakrishnan

发明人： Steven W. Johnston ,  Kevin P. O'Brien ,  Sridhar Balakrishnan

IPC分类号： H01L21/44

CPC分类号： H01L21/02074 ,  H01L21/0228 ,  H01L21/3105 ,  H01L21/3141 ,  H01L21/76807

摘要： A method for forming a semiconductor device is disclosed wherein atomic layer deposition (ALD) precursor species and/or by-product absorbed by an ILD are outgassed and/or neutralized prior to subsequently patterning the semiconductor device, thereby improving the ability to accurately define subsequently formed interconnect structures in the ILD.

摘要翻译： 公开了一种用于形成半导体器件的方法，其中在随后对半导体器件进行图案化之前，由ILD吸收的原子层沉积（ALD）前体物质和/或副产物被除气和/或中和，从而提高随后对 在ILD中形成互连结构。

公开(公告)号：US20070148952A1

公开(公告)日：2007-06-28

申请号：US11318137

申请日：2005-12-23

申请人： Kevin O'Brien ,  Chin-Chang Cheng ,  Ramanan Chebiam ,  Valery Dubin ,  Sridhar Balakrishnan

发明人： Kevin O'Brien ,  Chin-Chang Cheng ,  Ramanan Chebiam ,  Valery Dubin ,  Sridhar Balakrishnan

IPC分类号： H01L21/4763

CPC分类号： H01L21/76843 ,  B82Y30/00 ,  H01L21/288 ,  H01L21/76874

摘要： Methods of fabricating interconnect structures utilizing barrier material layers formed with an electroless deposition technique utilizing a coupling agent complexed with a catalytic metal and structures formed thereby. The fabrication fundamentally comprises providing a dielectric material layer having an opening extending into the dielectric material from a first surface thereof, bonding the coupling agent to the dielectric material within the opening, and electrolessly depositing the barrier material layer, wherein the electrolessly deposited barrier material layer material adheres to the catalytic metal of the coupling agent.

摘要翻译： 使用利用与催化金属复合的偶联剂和由此形成的结构的化学沉积技术形成的阻挡材料层来制造互连结构的方法。 该制造基本上包括提供介电材料层，其具有从其第一表面延伸到电介质材料中的开口，将该耦合剂粘合到该开口内的电介质材料，以及无电沉积阻挡材料层，其中该无电沉积阻挡材料层 材料粘附到偶联剂的催化金属上。

公开(公告)号：US20070004230A1

公开(公告)日：2007-01-04

申请号：US11173858

申请日：2005-06-30

申请人： Steven Johnston ,  Kevin O'Brien ,  Sridhar Balakrishnan

发明人： Steven Johnston ,  Kevin O'Brien ,  Sridhar Balakrishnan

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/02074 ,  H01L21/0228 ,  H01L21/3105 ,  H01L21/3141 ,  H01L21/76807

摘要： A method for forming a semiconductor device is disclosed wherein atomic layer deposition (ALD) precursor species and/or by-product absorbed by an ILD are outgassed and/or neutralized prior to subsequently patterning the semiconductor device, thereby improving the ability to accurately define subsequently formed interconnect structures in the ILD.

摘要翻译： 公开了一种用于形成半导体器件的方法，其中在随后对半导体器件进行图案化之前，由ILD吸收的原子层沉积（ALD）前体物质和/或副产物被除气和/或中和，从而提高随后对 在ILD中形成互连结构。