公开(公告)号：US6037648A

公开(公告)日：2000-03-14

申请号：US105647

申请日：1998-06-26

申请人： Kenneth C. Arndt ,  Jeffrey P. Gambino ,  Jack A. Mandelman ,  Chandrasekhar Narayan ,  Rainer F. Schnabel ,  Ronald J. Schutz ,  Dirk Tobben

发明人： Kenneth C. Arndt ,  Jeffrey P. Gambino ,  Jack A. Mandelman ,  Chandrasekhar Narayan ,  Rainer F. Schnabel ,  Ronald J. Schutz ,  Dirk Tobben

IPC分类号： H01L21/82 ,  H01L21/768 ,  H01L23/525 ,  H01L29/00

CPC分类号： H01L21/76885 ,  H01L23/5256 ,  H01L2924/0002

摘要： A semiconductor structure comprising a semiconductor substrate, an electrically conductive level on the substrate and a metal fuse located at the conductive level wherein the fuse comprises a self-aligned dielectric etch stop layer thereon is provided along with processes for its fabrication.

摘要翻译： 包括半导体衬底的半导体结构，衬底上的导电电平和位于导电水平处的金属熔断器，其中熔丝包括其上的自对准电介质蚀刻停止层以及其制造工艺。

公开(公告)号：US5392177A

公开(公告)日：1995-02-21

申请号：US248137

申请日：1994-05-24

申请人： Timothy J. Chainer ,  Emanuel I. Cooper ,  Suryanarayan G. Hegde ,  Chandrasekhar Narayan

发明人： Timothy J. Chainer ,  Emanuel I. Cooper ,  Suryanarayan G. Hegde ,  Chandrasekhar Narayan

IPC分类号： G11B23/50 ,  G11B33/14

CPC分类号： G11B23/507 ,  G11B33/1453

摘要： A sealed direct access storage device wherein a head is positioned for interaction with a storage medium in which the relative humidity is controlled by placing a predetermined amount of desiccant and a predetermined amount of water in the sealed volume of the device. At any given steady state temperature within a predetermined operating range the water vapor within the free space within the device and the water contained in the desiccant are in equilibrium and the relative humidity is controlled within acceptable limits.

摘要翻译： 一种密封的直接存取存储装置，其中头被定位成与通过将预定量的干燥剂和预定量的水放置在装置的密封体积中来控制相对湿度的存储介质相互作用。 在预定操作范围内的任何给定的稳态温度下，装置内的自由空间内的水蒸气和干燥剂中所含的水均处于平衡状态，并将相对湿度控制在可接受的限度内。

公开(公告)号：US5258236A

公开(公告)日：1993-11-02

申请号：US695368

申请日：1991-05-03

申请人： Gnanalingam Arjavalingam ,  Alina Deutsch ,  Fuad E. Doany ,  Bruce K. Furman ,  Donald J. Hunt ,  Chandrasekhar Narayan ,  Modest M. Oprysko ,  Sampath Purushothaman ,  Vincent Ranieri ,  Stephen Renick ,  Jane M. Shaw ,  Janusz S. Wilczynski ,  David F. Witman

发明人： Gnanalingam Arjavalingam ,  Alina Deutsch ,  Fuad E. Doany ,  Bruce K. Furman ,  Donald J. Hunt ,  Chandrasekhar Narayan ,  Modest M. Oprysko ,  Sampath Purushothaman ,  Vincent Ranieri ,  Stephen Renick ,  Jane M. Shaw ,  Janusz S. Wilczynski ,  David F. Witman

IPC分类号： B23K26/00 ,  B32B37/00 ,  H01L21/68 ,  H01L23/12 ,  H01L23/15 ,  H05K3/00 ,  H05K3/46 ,  B32B15/04 ,  H01L29/12

CPC分类号： H01L21/6835 ,  H01L2221/68345 ,  H01L2221/68359 ,  H05K3/0011 ,  H05K3/46 ,  Y10T156/1158 ,  Y10T428/12528 ,  Y10T428/12549 ,  Y10T428/12569 ,  Y10T428/12611

摘要： A method and apparatus for releasing a workpiece from a substrate including providing a substrate which is transparent to a predetermined wavelength of electromagnetic radiation; forming, on the substrate, a separation layer which degrades in response to the predetermined radiation; providing the workpiece on the separation layer; and directing the predetermined radiation at the separation layer through the transparent substrate so as to degrade the separation layer and to separate the workpiece from the substrate.

摘要翻译： 一种用于从衬底释放工件的方法和装置，包括提供对预定波长的电磁辐射是透明的衬底; 在衬底上形成响应于预定辐射而降解的分离层; 在分离层上提供工件; 并且通过透明基板将分离层处的预定辐射引导，以使分离层退化并将工件与基板分离。

公开(公告)号：US08416537B2

公开(公告)日：2013-04-09

申请号：US12614275

申请日：2009-11-06

申请人： David Berman ,  Robert G. Biskeborn ,  Michel Despont ,  Philipp Herget ,  Wayne Isami Imaino ,  Pierre-Olivier Jubert ,  Peter V. Koeppe ,  Chandrasekhar Narayan

发明人： David Berman ,  Robert G. Biskeborn ,  Michel Despont ,  Philipp Herget ,  Wayne Isami Imaino ,  Pierre-Olivier Jubert ,  Peter V. Koeppe ,  Chandrasekhar Narayan

IPC分类号： G11B5/39

CPC分类号： G11B5/3163 ,  G11B5/00826 ,  G11B5/398

摘要： In one embodiment, a read sensor for a recording head for a magnetic media storage system, has first and second shields, and a magneto-resistive sensor disposed between and shielded by the first and second shields in which the sensing axis of the sensor is tilted with respect to the recording surface of the head. In one embodiment, the sensing axis is oriented at an angle between 10 and 60 degrees with respect to the normal of the recording surface. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，用于磁性介质存储系统的记录头的读取传感器具有第一和第二屏蔽以及设置在第一和第二屏蔽之间并被传感器的感测轴倾斜的屏蔽的磁阻传感器 相对于头部的记录表面。 在一个实施例中，感测轴相对于记录表面的法线定向成10度至60度的角度。 描述和要求保护其他实施例。

公开(公告)号：US20080230891A1

公开(公告)日：2008-09-25

申请号：US12114145

申请日：2008-05-02

申请人： H. Bernhard Pogge ,  Roy Yu ,  Chandrika Prasad ,  Chandrasekhar Narayan

发明人： H. Bernhard Pogge ,  Roy Yu ,  Chandrika Prasad ,  Chandrasekhar Narayan

IPC分类号： H01L23/522

CPC分类号： H01L24/10 ,  H01L21/6835 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/525 ,  H01L24/13 ,  H01L24/81 ,  H01L25/0652 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/06181 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/17181 ,  H01L2224/81005 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01057 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： A metallized feature is formed in the top surface of a substrate, and a handling plate is attached to the substrate. The substrate is then thinned at the bottom surface thereof to expose the bottom of the feature, to form a conducting through-via. The substrate may comprise a chip having a device (e.g. DRAM) fabricated therein. The process therefore permits vertical integration with a second chip (e.g. a PE chip). The plate may be a wafer attached to the substrate using a vertical stud/via interconnection. The substrate and plate may each have devices fabricated therein, so that the process provides vertical wafer-level integration of the devices.

摘要翻译： 金属化特征形成在基板的顶表面中，并且处理板附接到基板。 然后将衬底在其底表面处变薄以暴露特征的底部，以形成导电通孔。 衬底可以包括具有在其中制造的器件（例如DRAM）的芯片。 因此，该过程允许与第二芯片（例如，PE芯片）的垂直集成。 板可以是使用垂直螺柱/通孔互连连接到基板的晶片。 衬底和板可以各自具有在其中制造的器件，使得该工艺提供器件的垂直晶片级集成。

公开(公告)号：US07388277B2

公开(公告)日：2008-06-17

申请号：US11033926

申请日：2005-01-12

申请人： H. Bernhard Pogge ,  Roy Yu ,  Chandrika Prasad ,  Chandrasekhar Narayan

发明人： H. Bernhard Pogge ,  Roy Yu ,  Chandrika Prasad ,  Chandrasekhar Narayan

IPC分类号： H01L21/00 ,  H01L21/44 ,  H01L21/4763 ,  H01L29/04 ,  H01L31/112 ,  H01L29/40 ,  H01L23/48

CPC分类号： H01L24/10 ,  H01L21/6835 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/525 ,  H01L24/13 ,  H01L24/81 ,  H01L25/0652 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/06181 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/17181 ,  H01L2224/81005 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01057 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： A process is described for semiconductor device integration at chip level or wafer level, in which vertical connections are formed through a substrate. A metallized feature is formed in the top surface of a substrate, and a handling plate is attached to the substrate. The substrate is then thinned at the bottom surface thereof to expose the bottom of the feature, to form a conducting through-via. The substrate may comprise a chip having a device (e.g. DRAM) fabricated therein. The process therefore permits vertical integration with a second chip (e.g. a PE chip). The plate may be a wafer attached to the substrate using a vertical stud/via interconnection. The substrate and plate may each have devices fabricated therein, so that the process provides vertical wafer-level integration of the devices.

摘要翻译： 描述了在芯片级或晶片级的半导体器件集成的过程，其中通过衬底形成垂直连接。 金属化特征形成在基板的顶表面中，并且处理板附接到基板。 然后将衬底在其底表面处变薄以暴露特征的底部，以形成导电通孔。 衬底可以包括具有在其中制造的器件（例如DRAM）的芯片。 因此，该过程允许与第二芯片（例如，PE芯片）的垂直集成。 板可以是使用垂直螺柱/通孔互连连接到基板的晶片。 衬底和板可以各自具有在其中制造的器件，使得该工艺提供器件的垂直晶片级集成。

公开(公告)号：US20070253661A1

公开(公告)日：2007-11-01

申请号：US11415923

申请日：2006-05-01

申请人： Charles Black ,  Gian-Luca Bona ,  Timothy Dalton ,  Nicholas Fuller ,  Roland Germann ,  Maurice McGlashan-Powell ,  Chandrasekhar Narayan ,  Robert Sandstrom

发明人： Charles Black ,  Gian-Luca Bona ,  Timothy Dalton ,  Nicholas Fuller ,  Roland Germann ,  Maurice McGlashan-Powell ,  Chandrasekhar Narayan ,  Robert Sandstrom

IPC分类号： G02B6/27 ,  B29D11/00

CPC分类号： G02B6/126 ,  B29D11/00759 ,  G02B6/136 ,  G02B2006/1215

摘要： A method in effectuating the redirection of light which is propagated within a waveguide, and which eliminates the necessity for a bending of the waveguide, or the drawbacks encountered in directional changes in propagated light involving the need for sharp curves of essentially small-sized radii, which would resultingly lead to excessive losses in light. In this connection, the method relates to the fabricating and the provision of a wire-grid polarization beam splitter within an optical waveguide, which utilizes a diblock copolymer template to formulate the wire-grid.

摘要翻译： 实现在波导内传播的光的重定向并且消除波导的弯曲的必要性的方法或者涉及需要基本上小的半径的尖锐曲线的传播光的方向性变化中遇到的缺点， 这将导致轻微的过度损失。 在这方面，该方法涉及在光波导内制造和提供线栅偏振分束器，其利用二嵌段共聚物模板来配制线栅。

公开(公告)号：US20070007659A1

公开(公告)日：2007-01-11

申请号：US11478201

申请日：2006-06-29

申请人： Chandrasekhar Narayan ,  Kevin Petrarca

发明人： Chandrasekhar Narayan ,  Kevin Petrarca

IPC分类号： H01L23/48

CPC分类号： H01L24/10 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/45124 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/00014 ,  H01L2924/00

摘要： An integrated circuit (IC) chip, semiconductor wafer with IC chips in a number of die locations and a method of making the IC chips on the wafer. The IC chips have plated chip interconnect pads. Each plated pad includes a noble metal plated layer electroplated to a platable metal layer. The platable metal layer may be copper and the noble metal plated layer may be of gold, platinum, palladium, rhodium, ruthenium, osmium, iridium or indium.

摘要翻译： 集成电路（IC）芯片，具有多个芯片位置的IC芯片的半导体晶片以及在晶片上制造IC芯片的方法。 IC芯片具有电镀芯片互连焊盘。 每个电镀垫包括电镀到可镀金属层的贵金属镀层。 可镀金属层可以是铜，贵金属镀层可以是金，铂，钯，铑，钌，锇，铱或铟。

公开(公告)号：US20060264036A1

公开(公告)日：2006-11-23

申请号：US11491816

申请日：2006-07-24

申请人： Shyng-Tsong Chen ,  Stefanie Chiras ,  Matthew Colburn ,  Tomothy Dalton ,  Jeffrey Hedrick ,  Elbert Huang ,  Kaushik Kumar ,  Michael Lane ,  Kelly Malone ,  Chandrasekhar Narayan ,  Satyanarayana Nitta ,  Sampath Purushothaman ,  Robert Rosenberg ,  Christy Tyberg ,  Roy Yu

发明人： Shyng-Tsong Chen ,  Stefanie Chiras ,  Matthew Colburn ,  Tomothy Dalton ,  Jeffrey Hedrick ,  Elbert Huang ,  Kaushik Kumar ,  Michael Lane ,  Kelly Malone ,  Chandrasekhar Narayan ,  Satyanarayana Nitta ,  Sampath Purushothaman ,  Robert Rosenberg ,  Christy Tyberg ,  Roy Yu

IPC分类号： H01L21/4763

CPC分类号： H01L21/7682 ,  H01L21/76829 ,  H01L23/5222 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a multilevel microelectronic integrated circuit, air comprises permanent line level dielectric and ultra low-K materials are via level dielectric. The air is supplied to line level subsequent to removal of sacrificial material by clean thermal decomposition and assisted diffusion of byproducts through porosities in the IC structure. Optionally, air is also included within porosities in the via level dielectric. By incorporating air to the extent produced in the invention, intralevel and interlevel dielectric values are minimized.

摘要翻译： 在多电平微电子集成电路中，空气包括永久线路电介质，超低K材料通过电介质。 在通过清洁热分解除去牺牲材料并通过IC结构中的孔隙率辅助副产物扩散后，将空气供应到线路电平。 任选地，空气也包括在通孔级电介质中的孔隙中。 通过将空气结合到本发明产生的程度，使层内和层间介电值最小化。

公开(公告)号：US07115997B2

公开(公告)日：2006-10-03

申请号：US10707075

申请日：2003-11-19

申请人： Chandrasekhar Narayan ,  Kevin Shawn Petrarca

发明人： Chandrasekhar Narayan ,  Kevin Shawn Petrarca

IPC分类号： H01L23/48

CPC分类号： H01L24/10 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/45124 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/00014 ,  H01L2924/00

摘要： An integrated circuit (IC) chip, semiconductor wafer with IC chips in a number of die locations and a method of making the IC chips on the wafer. The IC chips have plated chip interconnect pads. Each plated pad includes a noble metal plated layer electroplated to a platable metal layer. The platable metal layer may be copper and the noble metal plated layer may be of gold, platinum, palladium, rhodium, ruthenium, osmium, iridium or indium.