公开(公告)号：US06914198B2

公开(公告)日：2005-07-05

申请号：US10237579

申请日：2002-09-09

Applicant: Salman Akram ,  Warren M. Farnworth ,  Alan G. Wood ,  J. Michael Brooks ,  Eugene H. Cloud

Inventor： Salman Akram ,  Warren M. Farnworth ,  Alan G. Wood ,  J. Michael Brooks ,  Eugene H. Cloud

IPC: H01L23/495 ,  H05K1/02 ,  H05K1/09 ,  H05K3/32 ,  H05K1/18

CPC classification number: H05K3/4007 ,  H01L23/4951 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H05K1/0271 ,  H05K1/095 ,  H05K3/321 ,  H05K3/325 ,  H05K3/326 ,  H05K2201/0133 ,  H05K2201/0314 ,  H05K2201/0367 ,  H05K2201/09909 ,  H05K2201/10454 ,  H05K2201/10696 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Disclosed is a device comprising a circuit having an active side and a non-active side, a package enclosing the active side of the circuit and not enclosing a portion of the non-active side of the circuit, and a lead having a first end connected to the active side of the circuit via a lead-over-chip connection, and having a second end extending from the package. Also disclosed is a device comprising a circuit and a lead formed from a flexible conductor, with the lead having a first end connected to the circuit.

Abstract translation: 公开了一种包括具有有源侧和非有源侧的电路的器件，封装电路的有源侧的封装，并且不包围电路的非有源侧的一部分，以及引线，其具有连接到第一端 经由引线芯片连接到电路的有源侧，并且具有从封装延伸的第二端。 还公开了一种包括由柔性导体形成的电路和引线的器件，其中引线具有连接到电路的第一端。

公开(公告)号：US06858453B1

公开(公告)日：2005-02-22

申请号：US09416368

申请日：1999-10-12

Applicant: David J. Corisis ,  Tracy Reynolds ,  Michael Slaughter ,  Daniel Cram ,  Leland R. Nevill

Inventor： David J. Corisis ,  Tracy Reynolds ,  Michael Slaughter ,  Daniel Cram ,  Leland R. Nevill

IPC: G01R1/04 ,  G01R31/28 ,  H01L23/495 ,  H01L23/544 ,  H05K3/30 ,  G01R31/26 ,  H01L21/00 ,  H01L21/44 ,  H01L21/48 ,  H01L21/66

CPC classification number: G01R31/2851 ,  G01R1/0408 ,  G01R31/2884 ,  H01L23/4951 ,  H01L23/544 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/303 ,  H05K2201/10568 ,  H05K2201/10689 ,  H05K2201/10696 ,  H05K2203/167 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: An integrated circuit is provided having an alignment feature integral with the lead frame. The integrated circuit includes a lead frame coupled with a semiconductor die, and is partially encapsulated in insulating material. The lead frame has the alignment feature therein. The alignment feature includes a cut out on the lead frame taking the form of a semicircle, protuberance, apertures, or slots. Alternatively, the alignment feature includes a removably coupled tab. After testing of the integrated circuit has been completed, the alignment tab is removed from the integrated circuit. The alignment feature can also be provided on a heat spreader which is attached to a side of or within the lead frame package.

Abstract translation: 提供了具有与引线框一体的对准特征的集成电路。 集成电路包括与半导体管芯耦合的引线框架，并部分封装在绝缘材料中。 引线框架具有其中的对准特征。 对准特征包括在引线框架上切割出半圆形，突起，孔或槽的形式。 或者，对准特征包括可移除地耦合的突片。 集成电路测试完成后，对准标签从集成电路中取出。 对准特征也可以设置在附着于引线框架封装的一侧或内部的散热器上。

公开(公告)号：US20030198020A1

公开(公告)日：2003-10-23

申请号：US10457122

申请日：2003-06-09

Inventor： Larry D. Kinsman ,  Jerry M. Brooks ,  Walter L. Moden

IPC: H05K007/20

CPC classification number: H05K3/303 ,  H01L23/3675 ,  H01L23/4334 ,  H01L2924/0002 ,  H05K1/0203 ,  H05K2201/09709 ,  H05K2201/10454 ,  H05K2201/10659 ,  H05K2201/10696 ,  Y02P70/613 ,  H01L2924/00

Abstract: A high density vertical surface mount package and thermal carrier therefore including a heat sink.

Abstract translation: 因此，高密度垂直表面安装封装和热载体包括散热器。

公开(公告)号：US20030111718A1

公开(公告)日：2003-06-19

申请号：US10352698

申请日：2003-01-27

Inventor： Larry D. Kinsman ,  Walter L. Moden ,  Warren M. Farnworth

IPC: H01L023/02

CPC classification number: H05K3/301 ,  H01L25/105 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K2201/10454 ,  H05K2201/10696 ,  Y10S83/942 ,  Y10T29/49121 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49147 ,  Y10T29/49156 ,  Y10T29/49169 ,  Y10T29/53174 ,  Y10T29/53178 ,  H01L2924/00

Abstract: A vertically mountable semiconductor device including a plurality of stub contacts extending perpendicularly from a bottom edge thereof. A complementary alignment device includes a receptacle for receiving the vertically mountable semiconductor device. The alignment device is attachable to a carrier substrate. Upon attachment of the alignment device to a carrier substrate and insertion of a vertically mountable semiconductor device into the receptacle, a contact element applies a downward force to the vertically mountable semiconductor device to establish and maintain an electrical connection between the vertically mountable semiconductor device and the carrier substrate.

Abstract translation: 一种可垂直安装的半导体器件，包括从其底部边缘垂直延伸的多个短截线触头。 互补对准装置包括用于接收垂直安装的半导体器件的插座。 对准装置可附接到载体基板。 在将对准装置附接到载体基板并将可垂直安装的半导体装置插入到插座中时，接触元件向垂直安装的半导体器件施加向下的力，以建立并保持可垂直安装的半导体器件与 载体衬底。

公开(公告)号：US20030063225A1

公开(公告)日：2003-04-03

申请号：US10256742

申请日：2002-09-27

Applicant: Alps Electric Co., Ltd.

Inventor： Michinori Sasaki

IPC: H04N005/50

CPC classification number: H05K1/116 ,  H04N5/64 ,  H05K1/0295 ,  H05K3/3447 ,  H05K2201/09954 ,  H05K2201/10696

Abstract: A video-apparatus-tuner mounting board includes a television tuner mounted on the board; a predetermined circuit to be connected to pins connected to an internal circuit of the television tuner; through holes arranged in a line, into which pins are inserted; and conductor lands, formed around the through holes, to be connected to the pins. Of the conductor lands, first conductor lands connected to the pins of a specific television tuner to be mounted on the board are connected to the predetermined circuit and to second conductor lands, which are not connected to the pins of the specific television tuner.

Abstract translation: 视频装置调谐器安装板包括安装在电路板上的电视调谐器; 要连接到连接到电视调谐器的内部电路的引脚的预定电路; 一排排成一排的通孔，销插入该通孔中; 并且形成在通孔周围的导体平台连接到销。 在导体焊盘中，连接到要安装在板上的特定电视调谐器的引脚的第一导体焊盘连接到预定电路和未连接到特定电视调谐器的引脚的第二导体焊盘。

公开(公告)号：US6115254A

公开(公告)日：2000-09-05

申请号：US441525

申请日：1999-11-16

Applicant: Larry D. Kinsman ,  Jerry M. Brooks ,  Walter L. Moden

Inventor： Larry D. Kinsman ,  Jerry M. Brooks ,  Walter L. Moden

IPC: H01L23/367 ,  H01L23/433 ,  H05K1/02 ,  H05K3/30 ,  H05K7/20

CPC classification number: H05K3/303 ,  H01L23/3675 ,  H01L23/4334 ,  H01L2924/0002 ,  H05K1/0203 ,  H05K2201/09709 ,  H05K2201/10454 ,  H05K2201/10659 ,  H05K2201/10696 ,  Y02P70/613

Abstract: A high density vertical surface mount package and thermal carrier therefor including a heat sink.

公开(公告)号：US5861669A

公开(公告)日：1999-01-19

申请号：US488673

申请日：1995-06-07

Applicant: Michio Sono ,  Junichi Kasai ,  Masanori Yoshimoto ,  Kazuto Tsuji ,  Kouji Saito

Inventor： Michio Sono ,  Junichi Kasai ,  Masanori Yoshimoto ,  Kazuto Tsuji ,  Kouji Saito

IPC: H01L23/482 ,  H01L23/495 ,  H01L23/58 ,  H05K3/30 ,  H05K3/34 ,  H01L29/41

CPC classification number: H05K3/303 ,  H01L23/49555 ,  H01L2224/05554 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/49175 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01079 ,  H05K2201/09709 ,  H05K2201/09781 ,  H05K2201/10454 ,  H05K2201/10522 ,  H05K2201/10568 ,  H05K2201/10659 ,  H05K2201/10696 ,  H05K3/3426 ,  Y02P70/613

Abstract: A semiconductor device having a package of a single in-line type includes a semiconductor chip, a package body that accommodates the semiconductor chip therein and defined by a pair of opposing major surfaces and a plurality of interconnection leads held by the package body to extend substantially perpendicularly to a bottom surface. Each of the interconnection leads consists of an inner lead part located inside the package body and an outer lead part located outside the package body, the outer lead part being bent laterally at a boundary between the inner part and the outer part, in one of first and second directions that are opposite from each other and substantially perpendicular to the opposing major surfaces of the package body. A plurality of support legs extend laterally at the bottom surface of the package body for supporting the package body upright when the semiconductor device is placed on a substrate.

Abstract translation: 具有单列直插式封装的半导体器件包括：半导体芯片;封装体，其容纳半导体芯片并由一对相对的主表面限定;多个互连引线，其由所述封装主体保持，以基本上延伸 垂直于底面。 每个互连引线由位于封装主体内部的内引线部分和位于封装主体外部的外引线部分组成，外引线部分在内部与外部之间的边界处侧向弯曲，在第一 以及彼此相对并且基本上垂直于包装主体的相对主表面的第二方向。 多个支撑腿在包装体的底表面处横向延伸，用于当将半导体器件放置在基底上时支撑包装体直立。

公开(公告)号：US5773321A

公开(公告)日：1998-06-30

申请号：US766874

申请日：1996-12-13

Applicant: Toshimitsu Ishikawa ,  Atsushi Kitamura ,  Kenji Hirayama

Inventor： Toshimitsu Ishikawa ,  Atsushi Kitamura ,  Kenji Hirayama

IPC: H05K13/04 ,  H01L23/31 ,  H01L25/10 ,  H01L25/11 ,  H01L25/18 ,  H05K1/18 ,  H05K3/30 ,  H05K3/34 ,  H01L21/60

CPC classification number: H01L23/3107 ,  H01L25/105 ,  H05K1/181 ,  H05K3/303 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2225/1082 ,  H01L2924/0002 ,  H05K2201/10454 ,  H05K2201/1053 ,  H05K2201/10537 ,  H05K2201/10696 ,  H05K3/3421 ,  Y02P70/611 ,  Y02P70/613

Abstract: A method of counting semiconductor integrated circuit devices comprising steps of forming a semiconductor device block having a plurality of semiconductor integrated circuit devices of vertical mounting type coupled to each other in parallel, and mounting the semiconductor device block on a printed board. A block of semiconductor integrated circuit devices comprising a plurality of semiconductor integrated circuit devices of vertical mounting type, and coupling means for coupling the plurality of semiconductor integrated circuit devices each other in parallel.

Abstract translation: 一种计数半导体集成电路器件的方法，包括以下步骤：形成半导体器件块，所述半导体器件块具有并联连接的多个垂直安装型半导体集成电路器件，并将半导体器件块安装在印刷电路板上。 一种半导体集成电路器件，包括垂直安装型的多个半导体集成电路器件，以及用于将多个半导体集成电路器件并联连接的耦合器件。

公开(公告)号：US5621619A

公开(公告)日：1997-04-15

申请号：US445237

申请日：1995-05-19

Applicant: Lewis L. Seffernick ,  Neal F. Thomas

Inventor： Lewis L. Seffernick ,  Neal F. Thomas

IPC: H01C1/01 ,  H01C13/02 ,  H01C17/00 ,  H01C17/28 ,  H05K3/30 ,  H05K3/34 ,  H01R9/00

CPC classification number: H05K3/303 ,  H01C13/02 ,  H01C17/006 ,  H05K3/3442 ,  H05K2201/09909 ,  H05K2201/10022 ,  H05K2201/10045 ,  H05K2201/10454 ,  H05K2201/10568 ,  H05K2201/10696 ,  H05K2201/10984 ,  H05K2203/167 ,  H05K3/3452 ,  Y02P70/613

Abstract: A resistor network is disclosed which is suited for surface mount which does not incorporate wire terminations. The network is fabricated entirely from cermet, ceramic, and solder, yet will absorb thermal stresses normally associated with circuitry energization when properly mounted upon a substrate. This is accomplished by controlling the formation of solder bumps and simultaneously controlling the mounted distance between those bumps and a wiring substrate upon which the network is mounted. Additionally, the network may be formed to be either a SIP or DIP configuration, depending upon whether an additional groove is incorporated into the termination side of the substrate. Two alternative embodiments are also disclosed which incorporate various features of the invention.

Abstract translation: 公开了一种适用于不包含电线终端的表面安装的电阻器网络。 网络完全由金属陶瓷，陶瓷和焊料制成，但是当正确安装在基板上时，它将吸收通常与电路通电相关的热应力。 这是通过控制焊料凸点的形成并同时控制这些凸起之间的安装距离和安装网络的布线基板来实现的。 另外，取决于附加的沟槽是否被结合到衬底的端接侧中，网络可以形成为SIP或DIP配置。 还公开了两个替代实施例，其包括本发明的各种特征。

公开(公告)号：US5574310A

公开(公告)日：1996-11-12

申请号：US485117

申请日：1995-06-07

Applicant: Michio Sono ,  Junichi Kasai ,  Masanori Yoshimoto ,  Kazuto Tsuji ,  Kouji Saito

Inventor： Michio Sono ,  Junichi Kasai ,  Masanori Yoshimoto ,  Kazuto Tsuji ,  Kouji Saito

IPC: H01L23/482 ,  H01L23/495 ,  H01L23/58 ,  H05K3/30 ,  H05K3/34 ,  H01L29/41

CPC classification number: H05K3/303 ,  H01L23/49555 ,  H01L2224/05554 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/49175 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01079 ,  H05K2201/09709 ,  H05K2201/09781 ,  H05K2201/10454 ,  H05K2201/10522 ,  H05K2201/10568 ,  H05K2201/10659 ,  H05K2201/10696 ,  H05K3/3426 ,  Y02P70/613

Abstract: A semiconductor device having a package of a single in-line type includes a semiconductor chip, a package body that accommodates the semiconductor chip therein and defined by a pair of opposing major surfaces and a plurality of interconnection leads held by the package body to extend substantially perpendicularly to a bottom surface. Each of the interconnection leads consists of an inner lead part located inside the package body and an outer lead part located outside the package body, the outer lead part being bent laterally at a boundary between the inner part and the outer part, in one of first and second directions that are opposite from each other and substantially perpendicular to the opposing major surfaces of the package body. A plurality of support legs extend laterally at the bottom surface of the package body for supporting the package body upright when the semiconductor device is placed on a substrate.

Abstract translation: 具有单列直插式封装的半导体器件包括：半导体芯片;封装体，其容纳半导体芯片并由一对相对的主表面限定;多个互连引线，其由所述封装主体保持，以基本上延伸 垂直于底面。 每个互连引线由位于封装主体内部的内引线部分和位于封装主体外部的外引线部分组成，外引线部分在内部与外部之间的边界处侧向弯曲，在第一 以及彼此相对并且基本上垂直于包装主体的相对主表面的第二方向。 多个支撑腿在包装体的底表面处横向延伸，用于当将半导体器件放置在基底上时支撑包装体直立。