公开(公告)号：US06564450B2

公开(公告)日：2003-05-20

申请号：US09728336

申请日：2000-12-01

申请人： Jürgen Engbring ,  Ulrich Grzesik ,  Guido Renner ,  Jean-Francois Soule-Noulibos ,  Jacques Gerome ,  Jean-Michel Huot

发明人： Jürgen Engbring ,  Ulrich Grzesik ,  Guido Renner ,  Jean-Francois Soule-Noulibos ,  Jacques Gerome ,  Jean-Michel Huot

IPC分类号： H05K336

CPC分类号： H05K3/36 ,  H01R12/52 ,  H01R12/714 ,  H05K1/145 ,  H05K3/325 ,  H05K3/368 ,  H05K3/4015 ,  H05K2201/0311 ,  H05K2201/097 ,  H05K2203/0557 ,  H05K2203/167 ,  Y10T29/49126 ,  Y10T29/53174 ,  Y10T29/532

摘要： In a printed circuit board pair, each of the printed circuit boards having a contact region with contact elements, a contact-making system includes a first circuit board having three-dimensionally structured contact elements and a second circuit board also having three-dimensionally structured contact elements structured complementarily with respect to the contact elements of the first circuit board for positioning the two boards together. The contact elements of the first board reciprocally electrically contact the contact elements of the second board. The configuration ensures a high positioning accuracy of the two contact regions with respect to one another. A mask having cutouts for contact elements of the two boards can be provided. Such contact element positioning using the conductor track pattern and being independent of a contact-making housing has the advantage that the positioning accuracy is unaffected by tolerances between the conductor track pattern and the contact-making housing.

摘要翻译： 在印刷电路板对中，每个印刷电路板具有与接触元件的接触区域，接触制造系统包括具有三维结构的接触元件的第一电路板和还具有三维结构的接触的第二电路板 与第一电路板的接触元件互补地构成用于将两个板定位在一起的元件。 第一板的接触元件相互电接触第二板的接触元件。 该配置确保了两个接触区域相对于彼此的高定位精度。 可以提供具有用于两个板的接触元件的切口的掩模。 使用导体轨道图案并且独立于接触形成壳体的这种接触元件定位具有的优点是定位精度不受导体轨迹图案和接触形成壳体之间的公差的影响。

公开(公告)号：US06557250B2

公开(公告)日：2003-05-06

申请号：US10003296

申请日：2001-12-06

申请人： Rudi W Opitz ,  Walter P Stuckmann

发明人： Rudi W Opitz ,  Walter P Stuckmann

IPC分类号： H05K336

CPC分类号： H01F17/0013 ,  H01F27/2804 ,  H01F41/041 ,  H05K1/165 ,  H05K3/4626 ,  H05K2201/0195 ,  H05K2201/098 ,  H05K2201/09881 ,  H05K2203/0759 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49165

摘要： A multilayer printed board compound comprises at least two planely superposed printed boards, each of which having an electrically insulating mother board, electrically conductive circuit paths, which are provided on at least one side of the mother board, and recesses, which are defined laterally by the circuit paths and towards the mother board by the mother board; and at least one preimpregnated board, which is disposed between the printed boards for joining the printed boards; wherein the recesses, which are disposed between the mother boards of the respective printed boards, are filled substantially entirely with a synthetic resin paste; and wherein the at least two printed boards and the at least one preimpregnated board are joined by pressing.

摘要翻译： 多层印刷板化合物包括至少两个平面重叠的印刷电路板，每个印刷电路板具有电绝缘母板，设置在母板的至少一侧上的导电电路路径，以及凹槽，其横向由 电路通路和母板朝母板; 以及至少一个预浸渍板，其设置在用于接合印刷板的印刷板之间; 其中设置在各个印刷电路板的母板之间的凹部基本上用合成树脂浆料填充; 并且其中所述至少两个印刷板和所述至少一个预浸渍板通过压制而接合。

公开(公告)号：US06516513B2

公开(公告)日：2003-02-11

申请号：US10092117

申请日：2002-03-05

申请人： Cynthia Susan Milkovich ,  Mark Vincent Pierson ,  Charles Gerard Woychik

发明人： Cynthia Susan Milkovich ,  Mark Vincent Pierson ,  Charles Gerard Woychik

IPC分类号： H05K336

CPC分类号： H05K3/4688 ,  H01L23/3735 ,  H01L23/49827 ,  H01L2224/05023 ,  H01L2224/05647 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/09701 ,  H05K1/0271 ,  H05K1/036 ,  H05K1/113 ,  H05K1/141 ,  H05K3/429 ,  H05K3/4641 ,  H05K2201/0133 ,  H05K2201/068 ,  H05K2201/10378 ,  H05K2201/10674 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A multilayer CTE compensated chip interposer for connecting a semiconductor chip to a laminate chip carrier. A first dielectric layer, on the chip side of the interposer, is made of a stiff, high elastic modulus, material, such as a ceramic material, with a CTE closely matching the CTE of the chip. A second dielectric layer, on the laminate chip carrier side of the interposer, is made of resilient, low elastic modulus, material with metallurgy formed thereon, such as circuit board material, with a composite CTE closely matching the CTE of said chip carrier. A third dielectric intermediate layer, laminated between said first and second layers, is made of a low elastic modulus material with metallurgy formed thereon, such as a Teflon/glass particle material, with a composite CTE between the CTEs of said first and second layers.

公开(公告)号：US06496384B1

公开(公告)日：2002-12-17

申请号：US09957782

申请日：2001-09-21

申请人： Jorge Morales ,  Cesar Avitia

发明人： Jorge Morales ,  Cesar Avitia

IPC分类号： H05K336

CPC分类号： H05K3/366 ,  H05K3/403 ,  H05K2201/048 ,  H05K2201/09172 ,  H05K2201/09645 ,  H05K2203/0455 ,  Y10T29/49126 ,  Y10T29/49144

摘要： A circuit board assembly and method of fabricating an assembly are provided. The assembly preferably comprises a first circuit board defining an aperture and a second circuit board having an edge. The first circuit board has at least one conductive feature proximate the aperture, and the second circuit board has at least one conductive feature proximate the edge. Each board has at least one circuit trace in electrical communication with its respective conductive feature. The conductive features of the boards are placed in electrical communication with each other by way of the edge of the second board being disposed in the aperture of the first board. A solder joint can be disposed on the assembly so as to connect the first and second boards.

摘要翻译： 提供一种制造组件的电路板组件和方法。 组件优选地包括限定孔的第一电路板和具有边缘的第二电路板。 第一电路板具有邻近孔的至少一个导电特征，并且第二电路板具有邻近边缘的至少一个导电特征。 每个电路板具有与其各自的导电特征电连通的至少一个电路迹线。 板的导电特征通过设置在第一板的孔中的第二板的边缘彼此电连通。 可以在组件上设置焊接接头，以便连接第一和第二板。

公开(公告)号：US06332267B1

公开(公告)日：2001-12-25

申请号：US09693395

申请日：2000-10-20

申请人： John G. Davis ,  Richard J. Noreika ,  Michael C. Weller

发明人： John G. Davis ,  Richard J. Noreika ,  Michael C. Weller

IPC分类号： H05K336

CPC分类号： H01R12/52 ,  H05K3/325 ,  Y10T29/49126 ,  Y10T29/49165 ,  Y10T29/49453

摘要： A process for making a removably interlockable connector assembly that includes a first connector having a head on a mesa and a second connector having an opening that receives the head on the first connector. The head on the mesa of the first connector and the material defining the opening in the second connector are flexible and sized, so that the head on the mesa of the first connector and the material defining the opening in the second connector flex as the head on the mesa of the first connector is inserted into the opening in the second connector. The head on the mesa of the first connector is formed by selectively etching portions of a first pad layer through openings in an etch resistant layer.

摘要翻译： 一种用于制造可拆卸地互锁的连接器组件的方法，其包括具有台面上的头部的第一连接器和具有在第一连接器上接纳头部的开口的第二连接器。 第一连接器的台面上的头部和限定第二连接器中的开口的材料是柔性的和尺寸的，使得第一连接器的台面上的头部和限定第二连接器中的开口的材料作为头部弯曲 第一连接器的台面插入第二连接器的开口中。 通过在耐蚀刻层中的开口选择性地蚀刻第一焊盘层的部分来形成第一连接器的台面上的头部。

公开(公告)号：US06272741B1

公开(公告)日：2001-08-14

申请号：US09122225

申请日：1998-07-24

申请人： Craig M. Kennedy ,  Julian Curtis Hart ,  Fernando J. Ramirez

发明人： Craig M. Kennedy ,  Julian Curtis Hart ,  Fernando J. Ramirez

IPC分类号： H05K336

CPC分类号： H01R12/523 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/15312 ,  H01R4/02 ,  H05K3/3426 ,  H05K3/3436 ,  H05K7/1092 ,  H05K2201/10318 ,  H05K2201/10704 ,  H05K2203/041 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49149 ,  H01L2224/0401

摘要： A circuit board interconnect system includes a carrier board with a hybrid solder ball and pin grid array. A plurality of electrically conductive pins extend through the carrier board and are arranged in rows and columns to form a grid array. A first circuit board such as a multi-chip module (MCM) board has a plurality of conductive pads or traces formed on a lower surface thereof that are arranged to form a complementary grid array, i.e. the spacing and location of the conductive pads or traces corresponds to the spacing and location of the pins. A plurality of solder balls are provided with each ball being positioned on top of a corresponding pin so that each solder ball forms a solder connection between a pin and a corresponding conductive pad or trace. A second circuit board such as a computer mother board has a pin connector mounted on an upper surface thereof for individually receiving and providing electrical connection with each of the pins. After reflow, the solder balls wrap around the side walls of the heads of the pins and the side walls of the pads. The resulting generally spherical solder connections are therefore much stronger than conventional elongated fillet connections.

摘要翻译： 电路板互连系统包括具有混合焊球和引脚格栅阵列的载板。 多个导电针延伸穿过载板并且以行和列布置以形成网格阵列。 诸如多芯片模块（MCM）板的第一电路板具有形成在其下表面上的多个导电焊盘或迹线，其布置成形成互补的栅格阵列，即导电焊盘或迹线的间隔和位置 对应于销的间距和位置。 设置多个焊球，每个球位于相应销的顶部，使得每个焊球在销和相应的导电焊盘或迹线之间形成焊接连接​​。 诸如计算机母板的第二电路板具有安装在其上表面上的引脚连接器，用于单独地接收并提供与每个引脚的电连接。 在回流之后，焊球围绕销的头部的侧壁和垫的侧壁。 因此，所得到的大体上球形的焊接连接比传统的细长圆角连接强得多。

公开(公告)号：US06249962B1

公开(公告)日：2001-06-26

申请号：US09154503

申请日：1998-09-17

申请人： Leif Bergstedt

发明人： Leif Bergstedt

IPC分类号： H05K336

CPC分类号： H05K3/4688 ,  H05K3/4644 ,  H05K3/4652 ,  H05K3/4655 ,  H05K3/4673 ,  H05K3/4676 ,  H05K2201/0129 ,  H05K2203/061 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49163

摘要： A circuit board is manufactured having a structure which includes a plurality of supporting layers each of different materials. The supporting layers support electrically conducting patterns. Each of the materials has a different melting point. The material for the first supporting layer has the highest melting point of the different materials for supporting layers. Beginning from the first supporting layer, new supporting layers are arranged successively. Each new supporting layer has a lower melting point than that of the material of the supporting layer which is closest in the direction of the first supporting layer. Each new supporting layer is attached to the structure by exposing the structure to a temperature which exceeds the melting point of the new supporting layer but is lower than the melting point for that supporting layer which is the closest in the direction of the first supporting layer. Electrically conducting patterns are arranged on at least one side of each supporting layer and the electrically conducting patterns on at least two supporting layers are connected to each other.

摘要翻译： 制造的电路板具有包括多个不同材料的支撑层的结构。 支撑层支持导电图案。 每种材料都具有不同的熔点。 用于第一支撑层的材料具有用于支撑层的不同材料的最高熔点。 从第一支撑层开始，依次布置新的支撑层。 每个新的支撑层的熔点低于在第一支撑层的方向上最靠近的支撑层的材料的熔点。 每个新的支撑层通过将结构暴露于超过新支撑层的熔点但低于在第一支撑层的方向上最靠近的支撑层的熔点的温度而附接到结构。 导电图案布置在每个支撑层的至少一侧上，并且至少两个支撑层上的导电图案彼此连接。

公开(公告)号：US06243944B1

公开(公告)日：2001-06-12

申请号：US08986923

申请日：1997-12-08

申请人： Jerry Ihor Tustaniwskyj ,  James Wittman Babcock

发明人： Jerry Ihor Tustaniwskyj ,  James Wittman Babcock

IPC分类号： H05K336

CPC分类号： H01L21/4882 ,  H01L23/34 ,  H01L2224/16 ,  H01L2224/73253 ,  Y10T29/49004 ,  Y10T29/49139 ,  Y10T29/49144 ,  Y10T29/49149

摘要： A method of assembling a pressed joint between an integrated circuit module and a temperature regulating unit includes the steps of: 1) providing the integrated circuit module with a contact surface of a first material and providing the temperature regulating unit with a contact surface of a second material; 2) coating the contact surface of the temperature regulating unit with a metal alloy which adheres in a solid state to the second material but not the first material; 3) heating the metal alloy to a slurry/liquid state; and 4) squeezing the slurry/liquid alloy between the contact surfaces on the integrated circuit module and the temperature regulating unit. To disassemble the pressed joint between the integrated circuit module and the temperature regulating unit, without any residue of the metal alloy being transferred from the joint to the integrated circuit module, the alloy is cooled to a solid state; and then, the integrated circuit module is separated from the temperature regulating unit with the alloy adhered in the solid state to just the second material on the contact surface of the temperature regulating unit.

摘要翻译： 一种在集成电路模块和温度调节单元之间组装挤压接头的方法包括以下步骤：1）为集成电路模块提供第一材料的接触表面，并为温度调节单元提供第二个接触表面 材料; 2）用温和调节单元的接触表面涂覆固体状态的金属合金，而不是第一种材料; 3）将金属合金加热至浆液状态; 和4）在集成电路模块的接触表面和温度调节单元之间挤压浆液/液体合金。 为了拆卸集成电路模块和温度调节单元之间的压接头，没有金属合金残留物从接头转移到集成电路模块，合金被冷却到固态; 然后将集成电路模块与温度调节单元分离，其中合金以固态粘附到温度调节单元的接触表面上的第二材料。

公开(公告)号：US06170154B2

公开(公告)日：2001-01-09

申请号：US09285555

申请日：1999-04-02

申请人： Arvind Swarup

发明人： Arvind Swarup

IPC分类号： H05K336

CPC分类号： H01P3/085 ,  H01P3/088 ,  H01P5/18 ,  H03H7/0123 ,  H03H7/42 ,  H05K1/0237 ,  H05K1/0298 ,  H05K1/162 ,  H05K1/165 ,  H05K2201/0715 ,  H05K2201/09236 ,  Y10T29/49126

摘要： A novel circuit packaging structure including a combination of printed lumped elements within a multi-layer stripline architecture is provided and methods of making the same. The lumped elements are provided by printing the individual passive elements, including interdigital capacitors and spiral inductors, onto the supporting substrate and then embedding these elements into the multi-layer stripline structure. The stripline structure consists of a signal layer sandwiched between at least two ground layers separated by two dielectric substrates of equal thickness. This ground-signal-ground approach confines the electromagnetic fields within the multi-layer structure, thereby minimizing radiation from coupling to nearby components. This approach offers a unique combination of stripline technology and printed lumped elements resulting in miniaturized radio frequency and microwave circuits at operating at frequencies well below 1 GHz, up to several GHz.

摘要翻译： 提供了一种包括多层带状线结构内的印刷集总元件的组合的新型电路封装结构及其制造方法。 通过将各个无源元件（包括叉指电容器和螺旋电感器）打印到支撑衬底上，然后将这些元件嵌入到多层带状线结构中来提供集总元件。 带状线结构由夹在由两个相等厚度的介电基片隔开的至少两个接地层之间的信号层组成。 这种接地信号地面方法将电磁场限制在多层结构内，从而使耦合到附近部件的辐射最小化。 这种方法提供了带状线技术和印刷集总元件的独特组合，从而使得在远低于1 GHz，高达几GHz的频率下工作的小型化射频和微波电路。

公开(公告)号：US06729019B2

公开(公告)日：2004-05-04

申请号：US09903798

申请日：2001-07-11

申请人： Gary W. Grube ,  Igor Y. Khandros ,  Benjamin N. Eldridge ,  Gaetan L. Mathieu

发明人： Gary W. Grube ,  Igor Y. Khandros ,  Benjamin N. Eldridge ,  Gaetan L. Mathieu

IPC分类号： H05K336

CPC分类号： G01R1/07314 ,  G01R1/07342 ,  G01R1/07378 ,  G01R3/00 ,  G01R31/2886 ,  G01R31/2889 ,  Y10T29/49002 ,  Y10T29/49004 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49453

摘要： A method of designing and manufacturing a probe card assembly includes prefabricating one or more elements of the probe card assembly to one or more predefined designs. Thereafter, design data regarding a newly designed semiconductor device is received along with data describing the tester and testing algorithms to be used to test the semiconductor device. Using the received data, one or more of the prefabricated elements is selected. Again using the received data, one or more of the selected prefabricated elements is customized. The probe card assembly is then built using the selected and customized elements.

摘要翻译： 一种设计和制造探针卡组件的方法包括将探针卡组件的一个或多个元件预制成一个或多个预定的设计。 此后，接收关于新设计的半导体器件的设计数据以及描述用于测试半导体器件的测试器和测试算法的数据。 使用接收到的数据，选择一个或多个预制元素。 再次使用接收的数据，定制一个或多个所选择的预制元素。 然后使用选定和定制的元件构建探针卡组件。