公开(公告)号：US06342726B2

公开(公告)日：2002-01-29

申请号：US09449834

申请日：1999-11-26

申请人： Chuichi Miyazaki ,  Yukiharu Akiyama ,  Masanori Shibamoto ,  Tomoaki Kudaishi ,  Ichiro Anjoh ,  Kunihiko Nishi ,  Asao Nishimura ,  Hideki Tanaka ,  Ryosuke Kimoto ,  Kunihiro Tsubosaki ,  Akio Hasebe

发明人： Chuichi Miyazaki ,  Yukiharu Akiyama ,  Masanori Shibamoto ,  Tomoaki Kudaishi ,  Ichiro Anjoh ,  Kunihiko Nishi ,  Asao Nishimura ,  Hideki Tanaka ,  Ryosuke Kimoto ,  Kunihiro Tsubosaki ,  Akio Hasebe

IPC分类号： H01L23495

CPC分类号： H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06136 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/50 ,  H01L2224/73215 ,  H01L2224/85951 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10T29/4913 ,  Y10T29/49169 ,  H01L2924/20753 ,  H01L2224/05599

摘要： A ball grid array type semiconductor package includes a semiconductor chip formed with bonding pads, an elastomer bonded to the semiconductor chip, a flexible wiring substrate bonded to the elastomer and formed with wirings connected at one end of the bonding pads of the semiconductor chip, a solder resist formed on the main surface of the flexible wiring substrate and solder bump electrodes connected to the other ends of the wirings. The elastomer is bonded to the flexible wiring substrate on the side of the tape, the solder resist is formed on the side of the wirings, and the solder bump electrodes are connected with the wirings by way of through holes formed in the solder resist.

公开(公告)号：US5585665A

公开(公告)日：1996-12-17

申请号：US451267

申请日：1995-05-30

申请人： Ichiro Anjoh ,  Gen Murakami ,  Michael A. Lamson ,  Katherine G. Heinen

发明人： Ichiro Anjoh ,  Gen Murakami ,  Michael A. Lamson ,  Katherine G. Heinen

IPC分类号： H01L23/50 ,  H01L23/495

CPC分类号： H01L23/4951 ,  H01L23/49541 ,  H01L23/49568 ,  H01L24/06 ,  H01L24/83 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05647 ,  H01L2224/06136 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48647 ,  H01L2224/48747 ,  H01L2224/48847 ,  H01L2224/73215 ,  H01L2224/83101 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2224/85207 ,  H01L2224/92147 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0665 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  Y10T29/49121

摘要： A lead frame for a semiconductor IC device has a pair of common elongated leads and first and second groups of slender leads arranged on opposite sides of the common elongated leads and generally extending transverse to the common elongated leads. The common elongated leads have as their integral parts slender leads extending therefrom generally transverse thereto and substantially linear extensions from both ends of the common elongated leads. The linear extensions serve to firmly support a semiconductor chip to be packaged along with parts of the leads. The common elongated leads may further have as their integral parts projections extending from their sides for enhancement of the heat dissipation capability. A semiconductor chip may have bonding pads arranged thereon such that bonding wires and the common elongated leads do not cross each other for electrical connection between the common elongated leads and bonding pads of the semiconductor chip.

摘要翻译： 用于半导体IC器件的引线框架具有一对公共细长引线和布置在公共细长引线的相对侧上的第一和第二组细长引线，并且通常横向于公共细长引线延伸。 共同的细长引线具有作为它们的整体部分的细长引线，其大致横向延伸，并且从公共细长引线的两端基本上线性延伸。 线性扩展件用于牢固地支撑要与引线的一部分一起封装的半导体芯片。 共同的细长引线还可以具有作为它们的一体部分的突起从其侧面延伸以增强散热能力。 半导体芯片可以具有布置在其上的接合焊盘，使得接合线和公共细长引线彼此不交叉以在公共细长引线和半导体芯片的接合焊盘之间进行电连接。

公开(公告)号：US5442233A

公开(公告)日：1995-08-15

申请号：US989956

申请日：1992-12-10

申请人： Ichiro Anjoh ,  Gen Murakami ,  Michael A. Lamson ,  Katherine G. Heinen

发明人： Ichiro Anjoh ,  Gen Murakami ,  Michael A. Lamson ,  Katherine G. Heinen

IPC分类号： H01L23/50 ,  H01L23/495 ,  H01L23/48 ,  H01L29/44 ,  H01L29/52 ,  H01L29/60

CPC分类号： H01L23/4951 ,  H01L23/49541 ,  H01L23/49568 ,  H01L24/06 ,  H01L24/83 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05647 ,  H01L2224/06136 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48647 ,  H01L2224/48747 ,  H01L2224/48847 ,  H01L2224/73215 ,  H01L2224/83101 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2224/85207 ,  H01L2224/92147 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0665 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  Y10T29/49121

摘要： A lead frame for a semiconductor IC device has a pair of common elongated leads and first and second groups of slender leads arranged on opposite sides of the common elongated leads and generally extending transverse to the common elongated leads. The common elongated leads have as their integral parts slender leads extending therefrom generally transverse thereto and substantially linear extensions from both ends of the common elongated leads. The linear extensions serve to firmly support a semiconductor chip to be packaged along with parts of the leads. The common elongated leads may further have as their integral parts projections extending from their sides for enhancement of the heat dissipation capability. A semiconductor chip may have bonding pads arranged thereon such that bonding wires and the common elongated leads do not cross each other for electrical connection between the common elongated leads and bonding pads of the semiconductor chip.

摘要翻译： 用于半导体IC器件的引线框架具有一对公共细长引线和布置在公共细长引线的相对侧上的第一和第二组细长引线，并且通常横向于公共细长引线延伸。 共同的细长引线具有作为它们的整体部分的细长引线，其大致横向延伸，并且从公共细长引线的两端基本上线性延伸。 线性扩展件用于牢固地支撑要与引线的一部分一起封装的半导体芯片。 共同的细长引线还可以具有作为它们的一体部分的突起从其侧面延伸以增强散热能力。 半导体芯片可以具有布置在其上的接合焊盘，使得接合线和公共细长引线彼此不交叉以在公共细长引线和半导体芯片的接合焊盘之间进行电连接。

公开(公告)号：US5437915A

公开(公告)日：1995-08-01

申请号：US261230

申请日：1994-06-16

申请人： Asao Nishimura ,  Akihiro Yaguchi ,  Mitsuaki Haneda ,  Ichiro Anjoh ,  Junichi Arita ,  Akihiko Iwaya ,  Masahiro Ichitani

发明人： Asao Nishimura ,  Akihiro Yaguchi ,  Mitsuaki Haneda ,  Ichiro Anjoh ,  Junichi Arita ,  Akihiko Iwaya ,  Masahiro Ichitani

IPC分类号： B23K26/00 ,  B23K26/20 ,  H01L23/495 ,  H01L23/50 ,  B32B9/00

CPC分类号： H01L23/4951 ,  H01L23/49537 ,  H01L23/49575 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/12042 ,  Y10S428/901 ,  Y10T428/24917

摘要： A method of producing a leadframe for use in semiconductor devices, comprises the steps of forming a space between leads 1a and 1b which are to be overlapped and welded each other, and welding the leads at a region including the space and melting and cutting off one of the leads. In one of the leads which is melted, cohesion and separation of molten metal occur in the region around the space. As a result, unnecessary portions such as an outer frame used for positioning can be cut off at the same time when the leads are connected by welding. Thus, high precision positioning of a plurality of element leadframes as well as high assembling productivity are achieved.

摘要翻译： 一种制造用于半导体器件的引线框架的方法包括以下步骤：在要重叠和焊接的引线1a和1b之间形成空间，并且在包括该空间的区域中焊接引线并熔化并切断一个 的领导。 在熔化的一个引线中，熔融金属的内聚和分离发生在空间周围的区域中。 结果，当通过焊接连接引线时，可以切断用于定位的诸如用于定位的外框之类的不必要的部分。 因此，实现了多个元件引线框架的高精度定位以及高的组装生产率。

公开(公告)号：US5296737A

公开(公告)日：1994-03-22

申请号：US755655

申请日：1991-09-06

申请人： Asao Nishimura ,  Makoto Kitano ,  Akihiro Yaguchi ,  Nae Yoneda ,  Ryuji Kohno ,  Gen Murakami ,  Ichiro Anjoh

发明人： Asao Nishimura ,  Makoto Kitano ,  Akihiro Yaguchi ,  Nae Yoneda ,  Ryuji Kohno ,  Gen Murakami ,  Ichiro Anjoh

IPC分类号： H01L23/495 ,  H01L23/28

CPC分类号： H01L23/49575 ,  H01L23/49524 ,  H01L24/50

摘要： A semiconductor device comprises a plurality of semiconductor chips; electrodes formed on circuit surfaces of said plurality of semiconductor chips; inner leads made of a metal foil and bonded at first ends thereof to the electrodes, outer leads each having a predetermined surface at a first end thereof bonded to a second end of at least one of the inner leads, and a sealing material sealing said plurality of semiconductor chips, the electrodes, the inner leads, and part of each of the outer leads. The semiconductor chips are laminated in such a manner that those surfaces of the semiconductor chips on which their respective circuits are formed are disposed in facing relation to each other. This provides a semiconductor device which is excellent in assembling efficiency.

摘要翻译： 半导体器件包括多个半导体芯片; 形成在所述多个半导体芯片的电路表面上的电极; 内部引线由金属箔制成并在其第一端连接到电极，外部引线在其第一端处具有预定的表面，其结合至少一个内部引线的第二端;以及密封材料，密封所述多个 半导体芯片，电极，内引线和每个外引线的一部分。 半导体芯片以这样的方式层压，使得形成有各自电路的半导体芯片的那些表面彼此面对地设置。 这提供了组装效率优异的半导体器件。

公开(公告)号：US5256903A

公开(公告)日：1993-10-26

申请号：US797964

申请日：1991-11-26

申请人： Maya Obata ,  Asao Nishimura ,  Makoto Kitano ,  Akihiro Yaguchi ,  Ryuji Kohno ,  Nae Yoneda ,  Ichiro Anjoh ,  Gen Murakami

发明人： Maya Obata ,  Asao Nishimura ,  Makoto Kitano ,  Akihiro Yaguchi ,  Ryuji Kohno ,  Nae Yoneda ,  Ichiro Anjoh ,  Gen Murakami

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L23/495 ,  H01L23/30

CPC分类号： H01L23/49506 ,  H01L21/56 ,  H01L23/3142 ,  H01L23/4951 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01057 ,  H01L2924/181

摘要： A plastic encapsulated semiconductor device containing one or more of insulating films. Uneven surfaces, such as recesses and roughened surfaces, are strategically provided on peripheral side (edge) surfaces of the insulating films. As a result, therefore, an interface separation does not easily occur between the side surfaces of the insulating films and the encapsulating resin. If such an interface separation should occur, it cannot develop easily. Thus, it is possible to obtain a plastic encapsulated semiconductor device of a high level of reliability even when the largest possible semiconductor element is mounted therein within limited outside dimensions.

摘要翻译： 一种包含一种或多种绝缘膜的塑料封装半导体器件。 在绝缘膜的周边（边缘）表面上策略性地提供不均匀的表面，例如凹槽和粗糙表面。 因此，绝缘膜和封装树脂的侧面之间不容易发生界面分离。 如果这样的界面分离应该发生，就不容易开发。 因此，即使在有限的外部尺寸下将最大可能的半导体元件安装在其中，也可以获得高可靠性的塑料封装的半导体器件。

公开(公告)号：US07786564B2

公开(公告)日：2010-08-31

申请号：US12175714

申请日：2008-07-18

申请人： Mitsuhisa Watanabe ,  Ichiro Anjoh

发明人： Mitsuhisa Watanabe ,  Ichiro Anjoh

IPC分类号： H01L23/13

CPC分类号： H01L24/06 ,  H01L21/563 ,  H01L21/6836 ,  H01L23/3114 ,  H01L23/49833 ,  H01L23/4985 ,  H01L24/83 ,  H01L24/90 ,  H01L25/0655 ,  H01L25/105 ,  H01L2221/68327 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/06136 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/75743 ,  H01L2224/83191 ,  H01L2224/83194 ,  H01L2224/838 ,  H01L2224/83851 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor device according to the present invention is provided with a semiconductor chip in which a plurality of electrode pads is provided on a principal surface, a plurality of bump electrodes provided on the electrode pads of the semiconductor chip, a square-shaped wiring board which is disposed on a side of the principal surface of the semiconductor chip, and in which at least two sides of an outer circumference that face each other are positioned in an area on the principal surface of the semiconductor chip, a plurality of external terminals which is provided on the wiring board, and which are electrically connected to a plurality of the bump electrodes through a wiring of the wiring board, and sealing material which is provided between the semiconductor chip and the wiring board, and which covers a connection part between the bump electrode and the wiring.

摘要翻译： 根据本发明的半导体器件设置有半导体芯片，其中在主表面上设置多个电极焊盘，设置在半导体芯片的电极焊盘上的多个凸块电极，方形布线板， 设置在半导体芯片的主表面的一侧，并且其中彼此面对的外周的至少两侧位于半导体芯片的主表面上的区域中，多个外部端子是 设置在布线板上，并且通过布线板的布线电连接到多个凸块电极;以及密封材料，其设置在半导体芯片和布线板之间，并且覆盖凸块之间的连接部分 电极和接线。

公开(公告)号：US06844219B2

公开(公告)日：2005-01-18

申请号：US10136409

申请日：2002-05-02

申请人： Makoto Kitano ,  Akihiro Yaguchi ,  Naotaka Tanaka ,  Takeshi Terasaki ,  Ichiro Anjoh ,  Ryo Haruta ,  Asao Nishimura ,  Junichi Saeki

发明人： Makoto Kitano ,  Akihiro Yaguchi ,  Naotaka Tanaka ,  Takeshi Terasaki ,  Ichiro Anjoh ,  Ryo Haruta ,  Asao Nishimura ,  Junichi Saeki

IPC分类号： H01L23/12 ,  H01L21/60 ,  H01L23/00 ,  H01L23/02 ,  H01L23/16 ,  H01L23/31 ,  H01L23/488 ,  H01L23/495 ,  H01L23/498 ,  H05K3/34 ,  H01L21/44

CPC分类号： H01L23/16 ,  H01L23/3128 ,  H01L23/49572 ,  H01L23/49816 ,  H01L23/562 ,  H01L24/45 ,  H01L24/48 ,  H01L24/50 ,  H01L2224/05554 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H05K3/3426 ,  H05K3/3436 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A semiconductor device which can improve the connection reliability of solder bumps and productivity in manufacturing. Insulating tape having wiring patterns on its surface is bonded to a lead frame. Semiconductor elements are loaded and circuit formed surfaces and sides of the semiconductor elements are sealed with sealing resin. After arrangements of individual semiconductor devices are formed, the lead frame is separated into individual metal plates to form individual semiconductor devices. Such simultaneous production of a plurality of semiconductor devices enhances productivity, and improves flatness of the insulating tape, whereby the connection reliability of solder bumps is improved.

摘要翻译： 可以提高焊料凸块的连接可靠性和制造生产率的半导体器件。 在其表面具有布线图案的绝缘带被粘合到引线框架上。 半导体元件被加载并且电路形成的表面和半导体元件的侧面被密封树脂​​密封。 在形成各个半导体器件的布置之后，将引线框架分离成单独的金属板以形成单独的半导体器件。 这种同时生产多个半导体器件提高了生产率，并且提高了绝缘带的平坦度，从而提高了焊料凸块的连接可靠性。

公开(公告)号：US06710610B1

公开(公告)日：2004-03-23

申请号：US09407838

申请日：1999-09-29

申请人： Naotaka Tanaka ,  Hiroyuki Ohta ,  Ichiro Anjoh ,  Hideo Arima ,  Akio Hasebe ,  Kenichi Yamamoto

发明人： Naotaka Tanaka ,  Hiroyuki Ohta ,  Ichiro Anjoh ,  Hideo Arima ,  Akio Hasebe ,  Kenichi Yamamoto

IPC分类号： G01R3102

CPC分类号： G01R1/0441 ,  H05K3/326

摘要： Electrode pads are formed on a tape circuit to correspond to positions of solder bumps on an IC. A plurality of pins formed on a periphery of the tape circuit provide electrical connection between the tape circuit and a mother socket. An elastomer sheet is provided between a portion of the tape circuit, on which the electrode pads are formed and the IC is mounted, and the mother socket, and a side surface of the sheet, which contacts with the tape circuit, is formed with cut grooves in lattice fashion such that respective centers of the electrode pads substantially coincide with intersections of the grooves. Thus portions defined by the grooves on the sheet are made independent from one another to enable accommodating pushing forces from the solder bumps, so that, even if dispersion in height generates between the solder bumps, the respective portions defined by the grooves are hardly influenced by one another, and so accommodate the pushing forces from the solder bumps to permit the solder bumps and the electrode pads to surely contact with each other.

摘要翻译： 电极焊盘形成在磁带电路上以对应于IC上的焊料凸块的位置。 形成在磁带电路的周边上的多个引脚在磁带电路和母插座之间提供电连接。 弹性体片材设置在带状电路的形成有电极垫的部分和安装有IC的部分之间，并且母带和与带电路接触的片材的侧表面形成有切口 凹槽以格子方式使得电极垫的各个中心基本上与凹槽的交叉重合。 因此，由片上的凹槽限定的部分彼此独立，以便能够容纳来自焊料凸块的推力，使得即使在焊料凸块之间产生高度分散，由凹槽限定的各个部分几乎不受 并且因此容纳来自焊料凸块的推力，以允许焊料凸块和电极焊盘彼此牢固地接触。

公开(公告)号：US06521981B2

公开(公告)日：2003-02-18

申请号：US09765376

申请日：2001-01-22

申请人： Chuichi Miyazaki ,  Yukiharu Akiyama ,  Masanori Shibamoto ,  Tomoaki Kudaishi ,  Ichiro Anjoh ,  Kunihiko Nishi ,  Asao Nishimura ,  Hideki Tanaka ,  Ryosuke Kimoto ,  Kunihiro Tsubosaki ,  Akio Hasebe

发明人： Chuichi Miyazaki ,  Yukiharu Akiyama ,  Masanori Shibamoto ,  Tomoaki Kudaishi ,  Ichiro Anjoh ,  Kunihiko Nishi ,  Asao Nishimura ,  Hideki Tanaka ,  Ryosuke Kimoto ,  Kunihiro Tsubosaki ,  Akio Hasebe

IPC分类号： H01L23498

CPC分类号： H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06136 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/50 ,  H01L2224/73215 ,  H01L2224/85951 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10T29/4913 ,  Y10T29/49169 ,  H01L2924/20753 ,  H01L2224/05599

摘要： A ball grid array type semiconductor package includes a semiconductor chip formed with bonding pads, an elastomer bonded to the semiconductor chip, a flexible wiring substrate bonded to the elastomer and formed with wirings connected at one end of the bonding pads of the semiconductor chip, a solder resist formed on the main surface of the flexible wiring substrate and solder bump electrodes connected to the other ends of the wirings. The elastomer is bonded to the flexible wiring substrate on the side of the tape, the solder resist is formed on the side of the wirings, and the solder bump electrodes are connected with the wirings by way of through holes formed in the solder resist.