公开(公告)号：US5936838A

公开(公告)日：1999-08-10

申请号：US972216

申请日：1997-11-18

Applicant: Mirng-Ji Lii ,  Gregory Turturro ,  Chia-Pin Chiu

Inventor： Mirng-Ji Lii ,  Gregory Turturro ,  Chia-Pin Chiu

IPC: H05K7/20 ,  H05H7/20

CPC classification number: H05K7/20509 ,  G06F1/203 ,  H01L23/4093 ,  H01L23/42 ,  H01L2224/81801 ,  H01L24/81 ,  H01L2924/14

Abstract: An electronic assembly which has a ring that creates a dam for a thermal grease. The assembly may include an integrated circuit which is mounted to a substrate. The assembly may also include a cover which has an opening that exposes the integrated circuit. The ring is coupled to the integrated circuit and the cover. A thermal element may be placed adjacent to the integrated circuit and the thermal grease. The dam controls the flow of the thermal grease. The opening allows the thermal element to be placed adjacent to the integrated circuit. In one embodiment the thermal element may be attached to the cover by a hinge. The hinge thermal element may compensate for tolerances in the assembly without creating excessive forces on the integrated circuit.

Abstract translation: 一个电子组件，它具有一个为导热油脂形成大坝的环。 组件可以包括安装到基板的集成电路。 组件还可以包括具有暴露集成电路的开口的盖。 环耦合到集成电路和盖。 热元件可以放置在集成电路和导热油脂附近。 大坝控制导热油脂的流动。 开口允许热元件邻近集成电路放置。 在一个实施例中，热元件可以通过铰链附接到盖。 铰链热元件可以补偿组件中的公差，而不会在集成电路上产生过大的力。

公开(公告)号：US09875969B2

公开(公告)日：2018-01-23

申请号：US13531827

申请日：2012-06-25

Applicant: Henning Braunisch ,  Chia-Pin Chiu ,  Aleksandar Aleksov ,  Stefanie M. Lotz ,  Johanna M. Swan ,  Sujit Sharan

Inventor： Henning Braunisch ,  Chia-Pin Chiu ,  Aleksandar Aleksov ,  Stefanie M. Lotz ,  Johanna M. Swan ,  Sujit Sharan

IPC: H01L23/12 ,  H01L23/538 ,  H01L23/13 ,  H01L23/00 ,  H01L25/065 ,  H01L21/683

CPC classification number: H01L23/5385 ,  H01L21/6835 ,  H01L23/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/81801 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/19107 ,  H01L2924/351 ,  H01L2924/00

Abstract: A multi-chip package includes a substrate (110) having a first side (111), an opposing second side (112), and a third side (213) that extends from the first side to the second side, a first die (120) attached to the first side of the substrate and a second die (130) attached to the first side of the substrate, and a bridge (140) adjacent to the third side of the substrate and attached to the first die and to the second die. No portion of the substrate is underneath the bridge. The bridge creates a connection between the first die and the second die. Alternatively, the bridge may be disposed in a cavity (615, 915) in the substrate or between the substrate and a die layer (750). The bridge may constitute an active die and may be attached to the substrate using wirebonds (241, 841, 1141, 1541).

公开(公告)号：US09136236B2

公开(公告)日：2015-09-15

申请号：US13630297

申请日：2012-09-28

Applicant: Robert Starkston ,  Debendra Mallik ,  John S. Guzek ,  Chia-Pin Chiu ,  Deepak Kulkarni ,  Ravi V. Mahajan

Inventor： Robert Starkston ,  Debendra Mallik ,  John S. Guzek ,  Chia-Pin Chiu ,  Deepak Kulkarni ,  Ravi V. Mahajan

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/538 ,  H01L25/065 ,  H01L21/56 ,  H01L25/18

CPC classification number: H01L23/5226 ,  H01L21/563 ,  H01L23/5385 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L25/0655 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05541 ,  H01L2224/05568 ,  H01L2224/0603 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/83102 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/00014 ,  H01L2924/206 ,  H01L2924/014 ,  H01L2924/00

Abstract: Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.

Abstract translation: 本文通常描述用于局部高密度衬底布线的系统和方法的实施例。 在一个或多个实施例中，一种装置包括介质，第一和第二电路元件，互连元件和电介质层。 该介质可以包括其中的低密度路由。 互连元件可以嵌入在介质中，并且可以在其中包括多个导电构件，导电构件可以电耦合到第一电路元件和第二电路元件。 互连元件可以包括其中的高密度路由。 电介质层可以在互连裸片上方，电介质层包括通过其中的第一和第二电路元件。

公开(公告)号：US20150084210A1

公开(公告)日：2015-03-26

申请号：US14036719

申请日：2013-09-25

Applicant: Chia-Pin Chiu ,  Kinya Ichikawa ,  Robert L. Sankman

Inventor： Chia-Pin Chiu ,  Kinya Ichikawa ,  Robert L. Sankman

IPC: H01L23/00

CPC classification number: H01L23/5381 ,  H01L21/486 ,  H01L21/4867 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/49816 ,  H01L23/49894 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/18 ,  H01L24/19 ,  H01L24/20 ,  H01L24/23 ,  H01L24/24 ,  H01L24/25 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/16225 ,  H01L2224/215 ,  H01L2224/24225 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/143 ,  H01L2924/1434 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15747 ,  H05K1/113 ,  H05K3/3436 ,  H05K3/4664 ,  H05K3/4694 ,  H05K2203/013 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Generally discussed herein are systems and apparatuses that include a dense interconnect bridge and techniques for making the same. According to an example a technique can include creating a multidie substrate, printing an interconnect bridge on the multidie substrate, electrically coupling a first die to a second die by coupling the first and second dies through the interconnect bridge.

Abstract translation: 这里通常讨论的是包括密集互连桥和其制造技术的系统和装置。 根据一个示例，一种技术可以包括创建多芯基板，在多芯基板上印刷互连桥，通过将第一和第二裸片耦合通过互连桥将第一裸片电耦合到第二裸片。

公开(公告)号：US20140299999A1

公开(公告)日：2014-10-09

申请号：US13859659

申请日：2013-04-09

Applicant: Chuan Hu ,  Qing Ma ,  Chia-Pin Chiu

Inventor： Chuan Hu ,  Qing Ma ,  Chia-Pin Chiu

IPC: H01L23/48 ,  H01L21/56

CPC classification number: H01L23/481 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49894 ,  H01L24/19 ,  H01L24/96 ,  H01L25/0652 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/24137 ,  H01L2224/73209 ,  H01L2224/81005 ,  H01L2224/92133 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/00

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for integrated circuit package assemblies including a glass solder mask layer and/or bridge. In one embodiment, an apparatus includes one or more build-up layers having electrical routing features and a solder mask layer composed of a glass material, the solder mask layer being coupled with the one or more build-up layers and having openings disposed in the solder mask layer to allow coupling of package-level interconnect structures with the electrical routing features through the one or more openings. Other embodiments may be described and/or claimed.

Abstract translation: 本公开的实施例涉及包括玻璃焊接掩模层和/或桥的集成电路封装组件的技术和配置。 在一个实施例中，一种装置包括具有电路径特征的一个或多个堆积层和由玻璃材料组成的焊接掩模层，该焊接掩模层与一个或多个堆积层耦合并且具有设置在 焊接掩模层，以允许封装级互连结构与电路由特征通过一个或多个开口耦合。 可以描述和/或要求保护其他实施例。

公开(公告)号：US20140070380A1

公开(公告)日：2014-03-13

申请号：US13610780

申请日：2012-09-11

Applicant: Chia-Pin Chiu ,  Zhiguo Qian ,  Mathew J. Manusharow

Inventor： Chia-Pin Chiu ,  Zhiguo Qian ,  Mathew J. Manusharow

IPC: H01L23/495 ,  H01L21/60

CPC classification number: H01L23/5385 ,  H01L21/02164 ,  H01L21/30604 ,  H01L21/486 ,  H01L21/768 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/4821 ,  H01L23/5381 ,  H01L23/5382 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1433 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2224/0401

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for a bridge interconnect assembly that can be embedded in a package assembly. In one embodiment, a package assembly includes a package substrate configured to route electrical signals between a first die and a second die and a bridge embedded in the package substrate and configured to route the electrical signals between the first die and the second die, the bridge including a bridge substrate, one or more through-hole vias (THVs) formed through the bridge substrate, and one or more traces disposed on a surface of the bridge substrate to route the electrical signals between the first die and the second die. Routing features including traces and a ground plane of the bridge interconnect assembly may be separated by an air gap. Other embodiments may be described and/or claimed.

Abstract translation: 本公开的实施例涉及可嵌入封装组件中的桥互连组件的技术和配置。 在一个实施例中，包装组件包括被配置为在第一管芯和第二管芯之间布置电信号的封装衬底和嵌入在封装衬底中并被配置为在第一管芯和第二管芯之间布置电信号的桥， 包括桥接基板，通过桥接基板形成的一个或多个通孔通孔（THV）和布置在桥接基板的表面上的一个或多个走线，以在第一管芯和第二管芯之间布置电信号。 包括迹线和桥互连组件的接地平面的布线特征可以由气隙分开。 可以描述和/或要求保护其他实施例。

公开(公告)号：US08622764B2

公开(公告)日：2014-01-07

申请号：US13024032

申请日：2011-02-09

Applicant: Russell S. Aoki ,  Anthony P. Valpiani ,  Barry T. Dale ,  Chia-Pin Chiu

Inventor： Russell S. Aoki ,  Anthony P. Valpiani ,  Barry T. Dale ,  Chia-Pin Chiu

IPC: H01R13/625

CPC classification number: G06F1/16 ,  H01R13/193 ,  H05K7/1007 ,  Y10T29/49826

Abstract: A land-grid array die package socket is configured for low- or zero insertion-force assembly with a land-grid array die package. For zero insertion-force assembly, a motion plate applies a force on a land-grid array contact that causes a contact tip to move into protective cover while the die package is inserted into the socket. After zero insertion-force assembly, the motion plate applies a force on the land-grid array contact that causes the contact tip to deflect in a positive-Z direction until a useful contact is made at the contact tip with a land-grid array pad.

Abstract translation: 地面阵列阵列封装插座被配置为具有地平线阵列管芯封装的低或零插入力组件。 对于零插入力组件，运动板在地面栅格阵列触点上施加力，当模具封装插入插座时，导致接触尖端移动到保护盖中。 在零插入力组件之后，运动板在地面栅格阵列接触件上施加力，其使得接触尖端以正Z方向偏转，直到在接地尖端处与平台栅格阵列垫片进行有用的接触 。

公开(公告)号：US08227904B2

公开(公告)日：2012-07-24

申请号：US12459007

申请日：2009-06-24

Applicant: Henning Braunisch ,  Chia-Pin Chiu ,  Aleksandar Aleksov ,  Hinmeng Au ,  Stefanie M. Lotz ,  Johanna M. Swan ,  Sujit Sharan

Inventor： Henning Braunisch ,  Chia-Pin Chiu ,  Aleksandar Aleksov ,  Hinmeng Au ,  Stefanie M. Lotz ,  Johanna M. Swan ,  Sujit Sharan

IPC: H01L23/538

CPC classification number: H01L23/5385 ,  H01L21/6835 ,  H01L23/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/81801 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/19107 ,  H01L2924/351 ,  H01L2924/00

Abstract: A multi-chip package includes a substrate (110) having a first side (111), an opposing second side (112), and a third side (213) that extends from the first side to the second side, a first die (120) attached to the first side of the substrate and a second die (130) attached to the first side of the substrate, and a bridge (140) adjacent to the third side of the substrate and attached to the first die and to the second die. No portion of the substrate is underneath the bridge. The bridge creates a connection between the first die and the second die. Alternatively, the bridge may be disposed in a cavity (615, 915) in the substrate or between the substrate and a die layer (750). The bridge may constitute an active die and may be attached to the substrate using wirebonds (241, 841, 1141, 1541).

Abstract translation: 多芯片封装包括具有第一侧面（111），相对的第二侧面（112）和从第一侧向第二侧延伸的第三侧面（213）的基板（110），第一模具（120） ）和附接到所述基板的第一侧的第二模具（130），以及邻近所述基板的第三侧并连接到所述第一模具和所述第二模具的桥接件（140） 。 基板的任何部分都不在桥下。 该桥在第一管芯和第二管芯之间形成连接。 或者，桥可以设置在衬底中的空腔（615,915）中，或者设置在衬底和裸片层（750）之间。 该桥可以构成一个有源管芯，并且可以使用引线键连接到衬底（241,841,1141,1541）。

公开(公告)号：US07851905B2

公开(公告)日：2010-12-14

申请号：US11861306

申请日：2007-09-26

Applicant: Gregory M. Chrysler ,  Ravi V. Mahajan ,  Chia-Pin Chiu

Inventor： Gregory M. Chrysler ,  Ravi V. Mahajan ,  Chia-Pin Chiu

IPC: H01L23/34 ,  H01L23/48

CPC classification number: H01L23/38 ,  H01L24/19 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2924/00014 ,  H01L2924/15174 ,  H01L2924/15312 ,  H01L2924/18162 ,  Y10S257/93 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: A microelectronic package comprises a substrate (110, 310), a die (320) supported by the substrate, an interconnect feature (130, 230, 330) connecting the die and the substrate to each other, and a thermoelectric cooler (140, 170, 240, 340) adjacent to the interconnect feature.

Abstract translation: 微电子封装包括衬底（110,310），由衬底支撑的管芯（320），将管芯和衬底彼此连接的互连特征（130,230,330）和热电冷却器（140,170 ，240,340）。

公开(公告)号：US07579686B2

公开(公告)日：2009-08-25

申请号：US11618593

申请日：2006-12-29

Applicant: Xuejiao Hu ,  Chia-Pin Chiu

Inventor： Xuejiao Hu ,  Chia-Pin Chiu

IPC: H01L23/10 ,  H01L23/34

CPC classification number: H01L23/42 ,  H01L23/367 ,  H01L23/4275 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The formation of electronic assemblies including a heat spreader coupled to a die through a thermal interface material is described. In one embodiment, the heat spreader includes a surface having a structure extending a distance outward therefrom. The thermal interface material includes a first region having a first thickness and a second region having a second thickness, the first thickness being smaller than the second thickness. The structure extending a distance outward from the heat spreader is positioned on the first region of the thermal interface material. The total of the first thickness of the thermal interface material and the distance the structure extends outward from the surface of the heat spreader is substantially the same as the second thickness. In one aspect of certain embodiments, the first region of the thermal interface material and the structure on the heat spreader are in alignment with a hot spot on the die. Other embodiments are described and claimed.

Abstract translation: 描述了包括通过热界面材料耦合到管芯的散热器的电子组件的形成。 在一个实施例中，散热器包括具有向外延伸一定距离的结构的表面。 热界面材料包括具有第一厚度的第一区域和具有第二厚度的第二区域，第一厚度小于第二厚度。 从散热器向外延伸一定距离的结构位于热界面材料的第一区域上。 热界面材料的第一厚度和结构从散热器表面向外延伸的距离的总和基本上与第二厚度相同。 在某些实施方案的一个方面，热界面材料的第一区域和散热器上的结构与模具上的热点对准。 描述和要求保护其他实施例。