公开(公告)号：US06784086B2

公开(公告)日：2004-08-31

申请号：US09779812

申请日：2001-02-08

申请人： Sudipta K. Ray ,  Amit K. Sarkhel

发明人： Sudipta K. Ray ,  Amit K. Sarkhel

IPC分类号： H01L2144

CPC分类号： H01L24/10 ,  B23K35/0244 ,  B23K35/262 ,  H01L23/488 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01067 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H05K3/3436 ,  H05K3/3463 ,  H01L2924/00 ,  H01L2224/05599

摘要： A method and structure for solderably coupling an electronic module (e.g. a ceramic or plastic ball grid array module) to a circuit board. A lead-free solder ball is soldered to the module without using a joining solder to effectuate the soldering. The solder ball comprises a tin-antimony alloy that includes about 3% to about 15% antimony by weight. The solder ball is soldered to the circuit board with a lead-free joiner solder. The joiner solder comprises a tin-silver-copper alloy that includes by weight about 95.5-96.0% tin, about 3.5-4.0% silver, and about 0.5-1.0% copper. The resultant solder connection between the module and the circuit board has a fatigue life of at least about 90% of a fatigue life of a reference structure. The reference structure has a 90Pb/10Sn solder ball joined to both the module and the circuit card by a 63Sn/37Pb joiner solder.

摘要翻译： 一种用于将电子模块（例如陶瓷或塑料球栅阵列模块）可焊接地耦合到电路板的方法和结构。 将无铅焊球焊接到模块上，而不使用连接焊料来实现焊接。 焊球包括包含约3重量％至约15重量％的锑的锡 - 锑合金。 焊球用无铅合金焊料焊接到电路板上。 合金焊料包括锡 - 银 - 铜合金，其包括重量约95.5-96.0％的锡，约3.5-4.0％的银和约0.5-1.0％的铜。 模块和电路板之间的所得焊接连接件的疲劳寿命至少为参考结构的疲劳寿命的约90％。 参考结构具有通过63Sn / 37Pb接合焊料连接到模块和电路卡的90Pb / 10Sn焊球。

公开(公告)号：US06333563B1

公开(公告)日：2001-12-25

申请号：US09587944

申请日：2000-06-06

申请人： Raymond A. Jackson ,  Anson J. Call ,  Mark G. Courtney ,  Stephen A. DeLaurentis ,  Mukta S. Farooq ,  Shaji Farooq ,  Lewis S. Goldmann ,  Gregory B. Martin ,  Sudipta K. Ray

发明人： Raymond A. Jackson ,  Anson J. Call ,  Mark G. Courtney ,  Stephen A. DeLaurentis ,  Mukta S. Farooq ,  Shaji Farooq ,  Lewis S. Goldmann ,  Gregory B. Martin ,  Sudipta K. Ray

IPC分类号： H01L2940

CPC分类号： H05K1/141 ,  H01L23/49833 ,  H01L2224/16 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/15311 ,  H05K3/284 ,  H05K3/3436 ,  H05K3/368 ,  H05K2201/049 ,  H05K2201/10734 ,  H05K2201/10977

摘要： The present invention relates generally to an electrical interconnection package and a method thereof. More particularly, the invention encompasses an invention that increases the fatigue life of a Ball Grid Array (BGA) electrical interconnection. This invention structurally couples at least one module to an organic interposer using a high modulus underfill material. The organic interposer is then joined to a organic board using standard joining processes. The inventive module can then be removed from the organic board at any time by moving the organic interposer using standard rework techniques.

摘要翻译： 本发明一般涉及电互连封装及其方法。 更具体地，本发明包括增加球栅阵列（BGA）电互连的疲劳寿命的发明。 本发明使用高模量底部填充材料将至少一个模块结构地耦合到有机插入件。 然后使用标准连接工艺将有机插入物连接到有机基板。 随后可以通过使用标准返工技术移动有机插入件，随时从有机板上移除本发明的模块。

公开(公告)号：US06258625B1

公开(公告)日：2001-07-10

申请号：US09315374

申请日：1999-05-18

申请人： Peter J. Brofman ,  Sudipta K. Ray ,  Kathleen A. Stalter

发明人： Peter J. Brofman ,  Sudipta K. Ray ,  Kathleen A. Stalter

IPC分类号： H01L2144

CPC分类号： H01L24/81 ,  H01L23/49827 ,  H01L2224/13147 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/3511 ,  H05K3/325 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/10378 ,  H01L2924/00

摘要： A method of interconnecting electronic components by using a plurality of conductive studs on a surface of a first electronic component and a plurality of corresponding conductive vias on the surface of a second electronic component. Camber on the surface of electronic components may be overcome by coating the surface with a dielectric, planarizing the dielectric, and forming conductive vias corresponding to the contact pads thereon. The conductive studs are substantially lead-free and preferably comprise of copper.

摘要翻译： 一种通过使用第一电子部件的表面上的多个导电柱和在第二电子部件的表面上的多个对应的导电通孔来互连电子部件的方法。 可以通过用电介质涂覆表面来平衡电介质，并形成对应于其上的接触焊盘的导电通孔来克服电子部件表面上的弯曲。 导电柱基本上是无铅的，优选地包括铜。

公开(公告)号：US5251806A

公开(公告)日：1993-10-12

申请号：US870647

申请日：1992-04-16

申请人： Birendra N. Agarwala ,  Aziz M. Ahsan ,  Arthur Bross ,  Mark F. Chadurjian ,  Nicholas G. Koopman ,  Li-Chung Lee ,  Karl J. Puttlitz ,  Sudipta K. Ray ,  James G. Ryan ,  Joseph G. Schaefer ,  Kamalesh K. Srivastava ,  Paul A. Totta ,  Erick G. Walton ,  Adolf E. Wirsing

发明人： Birendra N. Agarwala ,  Aziz M. Ahsan ,  Arthur Bross ,  Mark F. Chadurjian ,  Nicholas G. Koopman ,  Li-Chung Lee ,  Karl J. Puttlitz ,  Sudipta K. Ray ,  James G. Ryan ,  Joseph G. Schaefer ,  Kamalesh K. Srivastava ,  Paul A. Totta ,  Erick G. Walton ,  Adolf E. Wirsing

IPC分类号： H01L21/60 ,  H01L23/485 ,  H05K3/34 ,  H01L21/283

CPC分类号： H01L24/12 ,  H01L24/11 ,  H01L2224/11901 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/13583 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/1366 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13669 ,  H01L2224/1367 ,  H01L2224/13671 ,  H01L2224/13672 ,  H01L2224/13676 ,  H01L2224/13679 ,  H01L2224/1368 ,  H01L2224/13681 ,  H01L2224/13684 ,  H01L24/16 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/15787 ,  H05K3/3431 ,  H05K3/3457

摘要： The present invention relates generally to a new interconnection and a method for making the same, and more particularly, to an elongated solder interconnection and a method for making the same. On an electronic carrier, a pad is formed on which a solder mass is deposited and capped with a metal layer, thereby forming an elongated solder interconnection. A further elongated solder interconnection can now be formed by forming a second solder mass on the first solder mass that has been capped by a metal layer. Additional elongated solder interconnection can be formed by capping the preceding solder mass and/or the last solder mass with a metal capping layer. Alternatively, the encapsulating layer can be in the form of a sidewall spacer formed on the sidewalls of the solder mass.

摘要翻译： 本发明一般涉及新的互连及其制造方法，更具体地说，涉及一种细长的焊料互连及其制造方法。 在电子载体上，形成焊盘，在其上沉积焊料块并用金属层封盖，从而形成细长的焊料互连。 现在可以通过在已经被金属层覆盖的第一焊料块上形成第二焊料块来形成另外细长的焊料互连。 可以通过用金属覆盖层封盖前述焊料块和/或最后的焊料块来形成附加的细长焊料互连。 或者，封装层可以是形成在焊料块的侧壁上的侧壁间隔物的形式。

公开(公告)号：US5153408A

公开(公告)日：1992-10-06

申请号：US607969

申请日：1990-10-31

申请人： Edward F. Handford ,  Joseph M. Harvilchuck ,  Mario J. Interrante ,  Raymond A. Jackson ,  Raj N. Master ,  Sudipta K. Ray ,  William E. Sablinski ,  Thomas A. Wassick

发明人： Edward F. Handford ,  Joseph M. Harvilchuck ,  Mario J. Interrante ,  Raymond A. Jackson ,  Raj N. Master ,  Sudipta K. Ray ,  William E. Sablinski ,  Thomas A. Wassick

IPC分类号： H01L21/3205 ,  H01L21/768 ,  H01L23/498 ,  H01L23/52 ,  H01L23/525 ,  H01L23/538 ,  H05K3/00 ,  H05K3/02 ,  H05K3/22 ,  H05K3/34

CPC分类号： H01L21/76892 ,  H01L23/49866 ,  H01L23/525 ,  H05K3/225 ,  H01L2924/0002 ,  H05K2201/10181 ,  H05K2201/10234 ,  H05K2201/1028 ,  H05K2201/10287 ,  H05K2203/0769 ,  H05K2203/107 ,  H05K2203/121 ,  H05K2203/173 ,  H05K2203/175 ,  H05K3/0017 ,  H05K3/027 ,  H05K3/34 ,  Y10T29/49124

摘要： The present invention relates generally to a new method of repairing electrical lines, and more praticularly to repairing electrical lines having an open at the module level with devices in place. Various methods and processes are used to repair this open or defective portion in an electrical conductor line. It could be repaired by securing a jumper wire or nugget across the open or the repair could be made by a deposition process, which includes but is not limited to filling the open with a solder type material or inserting a solder coated electrical wire and heating the solder and allowing the solder to melt and repair the open. One of the attributes of this invention is the ability to repair on a substrate or module on which active components such as chips, and passive components such as pins, capacitors, etc. have been attached. The invention also allows repair of fine line patterns which are normally not repairable by conventional techniques.

摘要翻译： 本发明一般涉及一种修复电线的新方法，并且更具体地涉及在装置就位时修复在模块级具有开路的电线。 使用各种方法和过程来修复电导体线中的这个开路或有缺陷的部分。 它可以通过将跨接线或熔核固定在开口处进行修复，或者可以通过沉积工艺进行修复，该沉积工艺包括但不限于用焊料型材料填充开口或插入焊料涂覆的电线并加热 焊接并允许焊料熔化并修复开路。 本发明的一个特征是在其上附着有诸如引脚，电容器等的诸如芯片和无源部件的有源部件的基板或模块上进行修复的能力。 本发明还允许修复通常不能通过常规技术修复的细线图案。

公开(公告)号：US5130779A

公开(公告)日：1992-07-14

申请号：US540256

申请日：1990-06-19

申请人： Birendra N. Agarwala ,  Aziz M. Ahsan ,  Arthur Bross ,  Mark F. Chadurjian ,  Nicholas G. Koopman ,  Li-Chung Lee ,  Karl J. Puttlitz ,  Sudipta K. Ray ,  James G. Ryan ,  Joseph G. Schaefer ,  Kamalesh K. Srivastava ,  Paul A. Totta ,  Erick G. Walton ,  Adolf E. Wirsing

发明人： Birendra N. Agarwala ,  Aziz M. Ahsan ,  Arthur Bross ,  Mark F. Chadurjian ,  Nicholas G. Koopman ,  Li-Chung Lee ,  Karl J. Puttlitz ,  Sudipta K. Ray ,  James G. Ryan ,  Joseph G. Schaefer ,  Kamalesh K. Srivastava ,  Paul A. Totta ,  Erick G. Walton ,  Adolf E. Wirsing

IPC分类号： H01L21/60 ,  H01L23/485 ,  H05K3/34

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/13583 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/1366 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13669 ,  H01L2224/1367 ,  H01L2224/13671 ,  H01L2224/13672 ,  H01L2224/13676 ,  H01L2224/13679 ,  H01L2224/1368 ,  H01L2224/13681 ,  H01L2224/13684 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/15787 ,  H05K3/3431 ,  H05K3/3457

摘要： The present invention relates generally to a new interconnection and a method for making the same, and more particularly, to an elongated solder interconnection and a method for making the same. On an electronic carrier, a pad is formed on which a solder mass is deposited and capped with a metal layer, thereby forming an elongated solder interconnection. A further elongated solder interconnection can now be formed by forming a second solder mass on the first solder mass that has been capped by a metal layer. Additional elongated solder interconnection can be formed by capping the preceding solder mass and/or the last solder mass with a metal capping layer. Alternatively, the encapsulating layer can be in the form of a sidewall spacer formed on the sidewalls of the solder mass.

摘要翻译： 本发明一般涉及新的互连及其制造方法，更具体地说，涉及一种细长的焊料互连及其制造方法。 在电子载体上，形成焊盘，在其上沉积焊料块并用金属层封盖，从而形成细长的焊料互连。 现在可以通过在已经被金属层覆盖的第一焊料块上形成第二焊料块来形成另外细长的焊料互连。 可以通过用金属覆盖层封盖前述焊料块和/或最后的焊料块来形成附加的细长焊料互连。 或者，封装层可以是形成在焊料块的侧壁上的侧壁间隔物的形式。