公开(公告)号：US20200021002A1

公开(公告)日：2020-01-16

申请号：US16032589

申请日：2018-07-11

Applicant: Infineon Technologies AG

Inventor： Maciej Wojnowski ,  Dirk Hammerschmidt ,  Walter Hartner ,  Johannes Lodermeyer ,  Chiara Mariotti ,  Thorsten Meyer

IPC: H01P3/16 ,  H01L23/66 ,  H01Q3/44

Abstract: A semiconductor device including an Integrated Circuit (IC) package and a plastic waveguide. The IC package includes a semiconductor chip; and an embedded antenna formed within a Redistribution Layer (RDL) coupled to the semiconductor chip, wherein the RDL is configured to transport a Radio Frequency (RF) signal between the semiconductor chip and the embedded antenna. The plastic waveguide is attached to the IC package and configured to transport the RF signal between the embedded antenna and outside of the IC package.

公开(公告)号：US20190221531A1

公开(公告)日：2019-07-18

申请号：US16360387

申请日：2019-03-21

Applicant: Infineon Technologies AG

Inventor： Thorsten Meyer ,  Walter Hartner ,  Maciej Wojnowski

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/522 ,  H01Q1/22 ,  H01L29/06 ,  H01L23/00

CPC classification number: H01L23/66 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/5226 ,  H01L23/5227 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L29/0657 ,  H01L2223/6677 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83825 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01Q1/2283 ,  H01L2924/00014

Abstract: A semiconductor device includes a semiconductor die having an active main surface and an opposite main surface opposite the active main surface. The semiconductor device further includes an antenna arranged on the active main surface of the semiconductor die and a recess arranged on the opposite main surface of the semiconductor die. The recess is arranged over the antenna.

公开(公告)号：US20190221465A1

公开(公告)日：2019-07-18

申请号：US16249142

申请日：2019-01-16

Applicant: Infineon Technologies AG

Inventor： Thomas Kilger ,  Francesca Arcioni ,  Maciej Wojnowski

IPC: H01L21/683 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L21/6835 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/48 ,  H01L23/66 ,  H01L24/02 ,  H01L2221/68327 ,  H01L2221/68377 ,  H01L2221/68381 ,  H01L2224/0231 ,  H01L2224/02381

Abstract: A method of forming a chip arrangement is provided. The method includes: arranging a plurality of stacks on a carrier, each stack including a thinned semiconductor chip, a further layer, and a polymer layer between the further layer and the chip, each stack being arranged with the chip facing the carrier; joining the plurality of stacks with each other with an encapsulation material to form the chip arrangement; exposing the further layer; and forming a redistribution layer contacting the chips of the chip arrangement.

公开(公告)号：US09910145B2

公开(公告)日：2018-03-06

申请号：US14135069

申请日：2013-12-19

Applicant: Infineon Technologies AG

Inventor： Josef Boeck ,  Rudolf Lachner ,  Maciej Wojnowski ,  Walter Hartner

IPC: G01S13/93 ,  G01S13/86 ,  G01S7/02 ,  H04B1/40 ,  G01S13/00 ,  G01S7/00 ,  G01S7/03 ,  G01S13/87

CPC classification number: G01S13/86 ,  G01S7/006 ,  G01S7/02 ,  G01S7/032 ,  G01S13/003 ,  G01S13/878 ,  G01S13/931 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H04B1/40

Abstract: A wireless communication system includes a first semiconductor module and a second semiconductor module. The first semiconductor module includes a semiconductor die connected to an antenna structure. The semiconductor die of the first semiconductor module and the antenna structure of the first semiconductor module are arranged within a common package. The semiconductor die of the first semiconductor module includes a transmitter module configured to transmit the wireless communication signal through the antenna structure of the first semiconductor module. The second semiconductor module includes a semiconductor die connected to an antenna structure. The semiconductor die of the second semiconductor module includes a receiver module configured to receive the wireless communication signal through the antenna structure of the second semiconductor module from the first semiconductor module.

公开(公告)号：US09337159B2

公开(公告)日：2016-05-10

申请号：US14106092

申请日：2013-12-13

Applicant: Infineon Technologies AG

Inventor： Ernst Seler ,  Maciej Wojnowski ,  Walter Hartner ,  Josef Boeck

IPC: H01L23/66 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/66 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/19 ,  H01L24/96 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/12042 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01Q13/08 ,  H01L2924/00

Abstract: A semiconductor device package includes an encapsulant and a semiconductor chip. The semiconductor chip is at least partly embedded in the encapsulant. A microwave component including at least one electrically conducting wall structure is integrated in the encapsulant. Further, the semiconductor device package includes an electrical interconnect configured to electrically couple the microwave component to the semiconductor chip.

Abstract translation: 半导体器件封装包括密封剂和半导体芯片。 半导体芯片至少部分地嵌入密封剂中。 包括至少一个导电壁结构的微波部件集成在密封剂中。 此外，半导体器件封装包括被配置为将微波部件电耦合到半导体芯片的电互连。

公开(公告)号：US09230926B2

公开(公告)日：2016-01-05

申请号：US14016045

申请日：2013-08-31

Applicant: Infineon Technologies AG

Inventor： Ernst Seler ,  Maciej Wojnowski

IPC: H01L23/48 ,  H01L23/66 ,  H01L21/768 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L23/66 ,  H01L21/568 ,  H01L21/76838 ,  H01L23/49816 ,  H01L23/5389 ,  H01L23/60 ,  H01L24/19 ,  H01L24/85 ,  H01L24/96 ,  H01L2223/6633 ,  H01L2223/6655 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/05599 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2224/85 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: An electronic device which comprises at least one interconnect, a semiconductor chip comprising at least one electric chip pad, an encapsulant structure packaging at least a part of the semiconductor chip, and an electrically conductive redistribution layer arranged between and electrically coupled with the at least one interconnect and the at least one chip pad, wherein the redistribution layer comprises at least one adjustment structure configured for adjusting radio frequency properties of a transition between the semiconductor chip and its periphery.

公开(公告)号：US09064787B2

公开(公告)日：2015-06-23

申请号：US13868191

申请日：2013-04-23

Applicant: Infineon Technologies AG

Inventor： Josef Boeck ,  Rudolf Lachner ,  Maciej Wojnowski ,  Thorsten Meyer

IPC: H05K1/18 ,  H01L23/00 ,  H01L23/498 ,  H01L23/66 ,  H01Q1/44 ,  H01Q17/00 ,  H01Q23/00 ,  G01S7/03 ,  H05K3/34

CPC classification number: H01L24/20 ,  G01S7/032 ,  H01L23/49816 ,  H01L23/66 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/19 ,  H01L24/32 ,  H01L24/81 ,  H01L24/96 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/11318 ,  H01L2224/1132 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/1319 ,  H01L2224/13191 ,  H01L2224/13299 ,  H01L2224/14051 ,  H01L2224/141 ,  H01L2224/14505 ,  H01L2224/14517 ,  H01L2224/16225 ,  H01L2224/17517 ,  H01L2224/21 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/831 ,  H01L2924/01029 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3512 ,  H01L2924/384 ,  H01Q1/44 ,  H01Q17/00 ,  H01Q23/00 ,  H05K3/3436 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor module having one or more integrated antennas in a single package is provided herein. The semiconductor module has a bonding interconnect structure that connects an integrated package to a printed circuit board (PCB), wherein the integrated antenna structures are located at greater center-to-center distance from the IC device than the three dimensional interconnect structures. Therefore, the bonding interconnect structures are confined to a connection area that causes a part of the package containing the one or more antenna structures to extend beyond the bonding interconnect structure as a cantilevered structure. Such a bonding interconnect structure result in a package that is in contact with a PCB at a relatively small area that supports the load of the package.

Abstract translation: 本文提供了在单个封装中具有一个或多个集成天线的半导体模块。 半导体模块具有将集成封装连接到印刷电路板（PCB）的接合互连结构，其中集成天线结构位于距离IC器件比三维互连结构更大的中心到中心距离处。 因此，接合互连结构被限制在连接区域上，该连接区域使得包含一个或多个天线结构的封装的一部分延伸超过作为悬臂结构的接合互连结构。 这种接合互连结构导致在支撑封装负载的较小区域处与PCB接触的封装。

公开(公告)号：US20150117862A1

公开(公告)日：2015-04-30

申请号：US14067640

申请日：2013-10-30

Applicant: Infineon Technologies AG

Inventor： Saverio Trotta ,  Jagjit Singh Bal ,  Maciej Wojnowski ,  Ernst Seler ,  Mehran Pour Mousavi

IPC: H01P3/12 ,  H04B10/2575 ,  H05K1/18 ,  H04B10/572 ,  H05K1/11 ,  H05K1/02

CPC classification number: H01P5/107 ,  H01P3/12 ,  H04B10/2575 ,  H04B10/572 ,  H05K1/0206 ,  H05K1/024 ,  H05K1/0242 ,  H05K1/0251 ,  H05K1/116 ,  H05K1/181 ,  H05K3/4697

Abstract: According to an embodiment, a circuit board includes a signal line including at least portion of a first conductive layer that has a first portion extending over a cavity in the circuit board from a first side of the cavity. The circuit board also includes a first plurality of conductive vias surrounding the cavity and the first plurality of vias include at least one blind via disposed adjacent to the first side of the cavity.

Abstract translation: 根据实施例，电路板包括信号线，该信号线包括第一导电层的至少一部分，第一导电层具有第一部分，该第一部分从空腔的第一侧延伸到电路板中的空腔上。 电路板还包括围绕空腔的第一多个导电通孔，并且第一多个通孔包括邻近空腔的第一侧设置的至少一个盲孔。

公开(公告)号：US20130241059A1

公开(公告)日：2013-09-19

申请号：US13868191

申请日：2013-04-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Josef Boeck ,  Rudolf Lachner ,  Maciej Wojnowski ,  Thorsten Meyer

IPC: H01L23/00

CPC classification number: H01L24/20 ,  G01S7/032 ,  H01L23/49816 ,  H01L23/66 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/19 ,  H01L24/32 ,  H01L24/81 ,  H01L24/96 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/11318 ,  H01L2224/1132 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/1319 ,  H01L2224/13191 ,  H01L2224/13299 ,  H01L2224/14051 ,  H01L2224/141 ,  H01L2224/14505 ,  H01L2224/14517 ,  H01L2224/16225 ,  H01L2224/17517 ,  H01L2224/21 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/831 ,  H01L2924/01029 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3512 ,  H01L2924/384 ,  H01Q1/44 ,  H01Q17/00 ,  H01Q23/00 ,  H05K3/3436 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor module having one or more integrated antennas in a single package is provided herein. The semiconductor module has a bonding interconnect structure that connects an integrated package to a printed circuit board (PCB), wherein the integrated antenna structures are located at greater center-to-center distance from the IC device than the three dimensional interconnect structures. Therefore, the bonding interconnect structures are confined to a connection area that causes a part of the package containing the one or more antenna structures to extend beyond the bonding interconnect structure as a cantilevered structure. Such a bonding interconnect structure result in a package that is in contact with a PCB at a relatively small area that supports the load of the package.

Abstract translation: 本文提供了在单个封装中具有一个或多个集成天线的半导体模块。 半导体模块具有将集成封装连接到印刷电路板（PCB）的接合互连结构，其中集成天线结构位于距离IC器件比三维互连结构更大的中心到中心距离处。 因此，接合互连结构被限制在连接区域上，该连接区域使得包含一个或多个天线结构的封装的一部分延伸超过作为悬臂结构的接合互连结构。 这种接合互连结构导致在支撑封装负载的较小区域处与PCB接触的封装。