公开(公告)号：US07919406B2

公开(公告)日：2011-04-05

申请号：US12791127

申请日：2010-06-01

申请人： Ming Hung Tseng ,  Young-Chang Lien ,  Chen-Shien Chen ,  Chen-Cheng Kuo

发明人： Ming Hung Tseng ,  Young-Chang Lien ,  Chen-Shien Chen ,  Chen-Cheng Kuo

IPC分类号： H01L21/44

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/11462 ,  H01L2224/11472 ,  H01L2224/1182 ,  H01L2224/11849 ,  H01L2224/11906 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13562 ,  H01L2224/136 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599

摘要： A method for forming a metal pillar bump structure is provided. In one embodiment, a passivation layer is formed over a semiconductor substrate and a conductive layer is formed over the passivation layer. A patterned and etched photoresist layer is provided above the conductive layer, the photoresist layer defining at least one opening therein. A metal layer is deposited in the at least one opening. Portions of the photoresist layer are etched along one or more interfaces between the photoresist layer and the metal layer to form cavities. A solder material is deposited in the at least one opening, the solder material filling the cavities and a portion of the opening above the metal layer. The remaining photoresist layer and the conductive layer not formed under the copper layer are removed. The solder material is then reflown to encapsulate the metal layer.

摘要翻译： 提供一种用于形成金属柱凸块结构的方法。 在一个实施例中，在半导体衬底上形成钝化层，并且在钝化层上方形成导电层。 在导电层之上设置图案化和蚀刻的光致抗蚀剂层，光致抗蚀剂层在其中限定至少一个开口。 金属层沉积在至少一个开口中。 光致抗蚀剂层的一部分沿着光致抗蚀剂层和金属层之间的一个或多个界面被蚀刻以形成空腔。 焊料材料沉积在至少一个开口中，焊料材料填充空腔和金属层上方的开口的一部分。 去除残留的光致抗蚀剂层和未形成在铜层之下的导电层。 然后将焊料材料重新包覆以封装金属层。

公开(公告)号：US20100090304A1

公开(公告)日：2010-04-15

申请号：US12626296

申请日：2009-11-25

申请人： Jen-Cheng Liu ,  Dun-Nian Yaung ,  Chen-Cheng Kuo ,  Chen-Shien Chen ,  Shou-Gwo Wuu

发明人： Jen-Cheng Liu ,  Dun-Nian Yaung ,  Chen-Cheng Kuo ,  Chen-Shien Chen ,  Shou-Gwo Wuu

IPC分类号： H01L31/0232 ,  H01L31/18 ,  H01L21/60

CPC分类号： H01L21/76898 ,  H01L23/3171 ,  H01L23/481 ,  H01L24/12 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05548 ,  H01L2224/0557 ,  H01L2924/01019 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/04941 ,  H01L2924/12043 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00

摘要： The present disclosure provides a method of making an integrated circuit (IC). The method includes forming an electric device on a front side of a substrate; forming a top metal pad on the front side of the substrate, the top metal pad being coupled to the electric device; forming a passivation layer on the front side of the substrate, the top metal pad being embedded in the passivation layer; forming an opening in the passivation layer, exposing the top metal pad; forming a deep trench in the substrate; filling a conductive material in the deep trench and the opening, resulting in a though-wafer via (TWV) feature in the deep trench and a pad-TWV feature in the opening, where the top metal pad being connected to the TWV feature through the pad-TWV feature; and applying a polishing process to remove excessive conductive material, forming a substantially planar surface.

摘要翻译： 本公开提供了制造集成电路（IC）的方法。 该方法包括在基板的正面上形成电子装置; 在所述基板的前侧形成顶部金属焊盘，所述顶部金属焊盘联接到所述电气装置; 在所述基板的正面上形成钝化层，所述顶部金属焊盘嵌入所述钝化层中; 在钝化层中形成开口，暴露顶部金属垫; 在衬底中形成深沟槽; 在深沟槽和开口中填充导电材料，导致深沟槽中的贯穿晶片通孔（TWV）特征和开口中的焊盘TWV特征，其中顶部金属焊盘通过该沟槽连接到TWV特征 pad-TWV功能; 以及施加抛光工艺以去除过量的导电材料，形成基本平坦的表面。

公开(公告)号：US09312230B2

公开(公告)日：2016-04-12

申请号：US12701868

申请日：2010-02-08

申请人： Chih-Hua Chen ,  Chen-Shien Chen ,  Chen-Cheng Kuo

发明人： Chih-Hua Chen ,  Chen-Shien Chen ,  Chen-Cheng Kuo

IPC分类号： H01L23/00 ,  H01L23/31

CPC分类号： H01L24/13 ,  H01L23/3192 ,  H01L24/05 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13147 ,  H01L2224/81801 ,  H01L2224/81895 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/00014 ,  H01L2224/05552

摘要： A conductive pillar structure for a die includes a passivation layer having a metal contact opening over a substrate. A bond pad has a first portion inside the metal contact opening and a second portion overlying the passivation layer. The second portion of the bond pad has a first width. A buffer layer over the bond pad has a pillar contact opening with a second width to expose a portion of the bond pad. A conductive pillar has a first portion inside the pillar contact opening and a second portion over the buffer layer. The second portion of the conductive pillar has a third width. A ratio of the second width to the first width is between about 0.35 and about 0.65. A ratio of the second width to the third width is between about 0.35 and about 0.65.

摘要翻译： 用于管芯的导电柱结构包括在衬底上具有金属接触开口的钝化层。 接合焊盘在金属接触开口内部具有第一部分，第二部分覆盖钝化层。 接合焊盘的第二部分具有第一宽度。 接合焊盘上的缓冲层具有第二宽度的柱接触开口以暴露接合焊盘的一部分。 导电柱具有在柱接触开口内部的第一部分和缓冲层上的第二部分。 导电柱的第二部分具有第三宽度。 第二宽度与第一宽度的比率在约0.35和约0.65之间。 第二宽度与第三宽度的比率在约0.35和约0.65之间。

公开(公告)号：US08753971B2

公开(公告)日：2014-06-17

申请号：US13427430

申请日：2012-03-22

申请人： Tzuan-Horng Liu ,  Shang-Yun Hou ,  Shin-Puu Jeng ,  Wei-Cheng Wu ,  Hsiu-Ping Wei ,  Chih-Hua Chen ,  Chen-Cheng Kuo ,  Chen-Shien Chen ,  Ming Hung Tseng

发明人： Tzuan-Horng Liu ,  Shang-Yun Hou ,  Shin-Puu Jeng ,  Wei-Cheng Wu ,  Hsiu-Ping Wei ,  Chih-Hua Chen ,  Chen-Cheng Kuo ,  Chen-Shien Chen ,  Ming Hung Tseng

IPC分类号： H01L21/44

CPC分类号： H01L23/585 ,  H01L23/552 ,  H01L23/562 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05012 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/1147 ,  H01L2224/11912 ,  H01L2224/13022 ,  H01L2224/13147 ,  H01L2224/13655 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/05552 ,  H01L2924/00

摘要： A method of forming an integrated circuit structure is provided. The method includes forming a metal pad at a major surface of a semiconductor chip, forming an under-bump metallurgy (UBM) over the metal pad such that the UBM and the metal pad are in contact, forming a dummy pattern at a same level as the metal pad, the dummy pattern formed of a same metallic material as the metal pad and electrically disconnected from the metal pad, and forming a metal bump over the UBM such that the metal bump is electrically connected to the UBM and no metal bump in the semiconductor chip is formed over the dummy pattern.

摘要翻译： 提供一种形成集成电路结构的方法。 该方法包括在半导体芯片的主表面上形成金属焊盘，在金属焊盘上形成凸块下冶金（UBM），使得UBM和金属焊盘接触，形成与 金属焊盘，由与金属焊盘相同的金属材料形成的虚拟图案，并与金属焊盘电气断开，并在UBM上形成金属凸块，使得金属凸块电连接到UBM，并且在金属焊盘中没有金属凸块 在虚拟图案上形成半导体芯片。

公开(公告)号：US08653648B2

公开(公告)日：2014-02-18

申请号：US12245505

申请日：2008-10-03

申请人： Chih-Hua Chen ,  Chen-Shien Chen ,  Chen-Cheng Kuo ,  Wen-Wei Shen

发明人： Chih-Hua Chen ,  Chen-Shien Chen ,  Chen-Cheng Kuo ,  Wen-Wei Shen

IPC分类号： H01L23/04

CPC分类号： H01L23/5283 ,  H01L21/6835 ,  H01L21/76816 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/525 ,  H01L2221/68372 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02351 ,  H01L2224/05556 ,  H01L2924/01019 ,  H01L2924/19041

摘要： A system and method for forming a TSV contact is presented. A preferred embodiment includes a TSV in contact with a portion of the uppermost metal layer of a semiconductor die. The interface between the TSV conductor and the contact pad is preferably characterized by a non-planar zigzag pattern that forms a grid pattern of contacts. Alternatively, the contacts may form a plurality of metal lines that make contact with the contact pad.

摘要翻译： 提出了一种用于形成TSV触点的系统和方法。 优选实施例包括与半导体管芯的最上层金属层的一部分接触的TSV。 TSV导体和接触垫之间的界面优选地特征在于形成接触的网格图案的非平面之字形图案。 或者，触点可以形成与接触垫接触的多个金属线。

公开(公告)号：US20120178252A1

公开(公告)日：2012-07-12

申请号：US13427430

申请日：2012-03-22

申请人： Tzuan-Horng Liu ,  Shang-Yun Hou ,  Shin-Puu Jeng ,  Wei-Cheng Wu ,  Hsiu-Ping Wei ,  Chih-Hua Chen ,  Chen-Cheng Kuo ,  Chen-Shien Chen ,  Ming Hung Tseng

发明人： Tzuan-Horng Liu ,  Shang-Yun Hou ,  Shin-Puu Jeng ,  Wei-Cheng Wu ,  Hsiu-Ping Wei ,  Chih-Hua Chen ,  Chen-Cheng Kuo ,  Chen-Shien Chen ,  Ming Hung Tseng

IPC分类号： H01L21/768

CPC分类号： H01L23/585 ,  H01L23/552 ,  H01L23/562 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05012 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/1147 ,  H01L2224/11912 ,  H01L2224/13022 ,  H01L2224/13147 ,  H01L2224/13655 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/05552 ,  H01L2924/00

摘要： A method of forming an integrated circuit structure is provided. The method includes forming a metal pad at a major surface of a semiconductor chip, forming an under-bump metallurgy (UBM) over the metal pad such that the UBM and the metal pad are in contact, forming a dummy pattern at a same level as the metal pad, the dummy pattern formed of a same metallic material as the metal pad and electrically disconnected from the metal pad, and forming a metal bump over the UBM such that the metal bump is electrically connected to the UBM and no metal bump in the semiconductor chip is formed over the dummy pattern.

摘要翻译： 提供一种形成集成电路结构的方法。 该方法包括在半导体芯片的主表面上形成金属焊盘，在金属焊盘上形成凸块下冶金（UBM），使得UBM和金属焊盘接触，形成与 金属焊盘，由与金属焊盘相同的金属材料形成的虚拟图案，并与金属焊盘电气断开，并在UBM上形成金属凸块，使得金属凸块电连接到UBM，并且在金属焊盘中没有金属凸块 在虚拟图案上形成半导体芯片。

公开(公告)号：US20110227216A1

公开(公告)日：2011-09-22

申请号：US12725322

申请日：2010-03-16

申请人： Ming-Hung Tseng ,  Chen-Shien Chen ,  Chen-Cheng Kuo ,  Chih-Hua Chen ,  Ching-Wen Hsiao

发明人： Ming-Hung Tseng ,  Chen-Shien Chen ,  Chen-Cheng Kuo ,  Chih-Hua Chen ,  Ching-Wen Hsiao

IPC分类号： H01L23/498 ,  H01L21/60

CPC分类号： H01L24/11 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05022 ,  H01L2224/05083 ,  H01L2224/05184 ,  H01L2224/05541 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/45144 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48647 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05005

摘要： An under-bump metallization (UBM) structure for a semiconductor device is provided. A passivation layer is formed over a contact pad such that at least a portion of the contact pad is exposed. A protective layer, such as a polyimide layer, may be formed over the passivation layer. The UBM structure, such as a conductive pillar, is formed over the underlying contact pad such that the underlying contact pad extends laterally past the UBM structure by a distance large enough to prevent or reduce cracking of the passivation layer and or protective layer.

摘要翻译： 提供了一种用于半导体器件的凸块下金属化（UBM）结构。 钝化层形成在接触焊盘上，使得接触焊盘的至少一部分被暴露。 可以在钝化层上方形成保护层，例如聚酰亚胺层。 诸如导电柱的UBM结构形成在下面的接触焊盘之上，使得下面的接触焊盘横向延伸越过UBM结构一个足够大的距离，以防止或减少钝化层和/或保护层的破裂。

公开(公告)号：US20110068465A1

公开(公告)日：2011-03-24

申请号：US12623925

申请日：2009-11-23

申请人： Wen-Wei Shen ,  Chen-Shien Chen ,  Chen-Cheng Kuo ,  Chih-Hua Chen ,  Ching-Wen Hsiao

发明人： Wen-Wei Shen ,  Chen-Shien Chen ,  Chen-Cheng Kuo ,  Chih-Hua Chen ,  Ching-Wen Hsiao

IPC分类号： H01L23/488

CPC分类号： H01L24/16 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/13005 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/16237 ,  H01L2224/81191 ,  H01L2224/812 ,  H01L2224/814 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/10329 ,  H01L2924/10336 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/381 ,  H01L2924/00014 ,  H01L2924/01083 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/206 ,  H01L2924/207

摘要： A flip-chip packaging assembly and integrated circuit device are disclosed. An exemplary flip-chip packaging assembly includes a first substrate; a second substrate; and joint structures disposed between the first substrate and the second substrate. Each joint structure comprises an interconnect post between the first substrate and the second substrate and a joint solder between the interconnect post and the second substrate, wherein the interconnect post exhibits a width and a first height. A pitch defines a distance between each joint structure. The first height is less than half the pitch.

摘要翻译： 公开了一种倒装芯片封装组件和集成电路器件。 示例性的倒装芯片封装组件包括第一基板; 第二基板; 以及设置在第一基板和第二基板之间的接合结构。 每个接头结构包括在第一基板和第二基板之间的互连柱和在互连柱和第二基板之间的接合焊料，其中互连柱呈现宽度和第一高度。 间距定义每个关节结构之间的距离。 第一高度小于音高的一半。

公开(公告)号：US20100171223A1

公开(公告)日：2010-07-08

申请号：US12348650

申请日：2009-01-05

申请人： Chen-Cheng Kuo ,  Chih-Hua Chen ,  Ming-Fa Chen ,  Chen-Shien Chen

发明人： Chen-Cheng Kuo ,  Chih-Hua Chen ,  Ming-Fa Chen ,  Chen-Shien Chen

IPC分类号： H01L23/48 ,  H01L21/4763

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device having one or more through-silicon vias (TSVs) is provided. The TSVs are formed such that sidewalls of the TSVs have a scalloped surface. In an embodiment, the sidewalls of the TSVs are sloped wherein a top and bottom of the TSVs have different dimensions. The TSVs may have a V-shape wherein the TSVs have a wider dimension on a circuit side of the substrate, or an inverted V-shape wherein the TSVs have a wider dimension on a backside of the substrate. The scalloped surfaces of the sidewalls and/or sloped sidewalls allow the TSVs to be more easily filled with a conductive material such as copper.

摘要翻译： 提供了具有一个或多个穿硅通孔（TSV）的半导体器件。 TSV形成为使得TSV的侧壁具有扇形表面。 在一个实施例中，TSV的侧壁是倾斜的，其中TSV的顶部和底部具有不同的尺寸。 TSV可以具有V形，其中TSV在衬底的电路侧具有更宽的尺寸，或者是倒V形，其中TSV在衬底的背面具有更宽的尺寸。 侧壁和/或倾斜侧壁的扇形表面允许TSV更容易地用诸如铜的导电材料填充。

公开(公告)号：US20100084747A1

公开(公告)日：2010-04-08

申请号：US12245505

申请日：2008-10-03

申请人： Chih-Hua Chen ,  Chen-Shien Chen ,  Chen-Cheng Kuo ,  Wen-Wei Shen

发明人： Chih-Hua Chen ,  Chen-Shien Chen ,  Chen-Cheng Kuo ,  Wen-Wei Shen

IPC分类号： H01L23/52

CPC分类号： H01L23/5283 ,  H01L21/6835 ,  H01L21/76816 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/525 ,  H01L2221/68372 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02351 ,  H01L2224/05556 ,  H01L2924/01019 ,  H01L2924/19041

摘要： A system and method for forming a TSV contact is presented. A preferred embodiment includes a TSV in contact with a portion of the uppermost metal layer of a semiconductor die. The interface between the TSV conductor and the contact pad is preferably characterized by a non-planar zigzag pattern that forms a grid pattern of contacts. Alternatively, the contacts may form a plurality of metal lines that make contact with the contact pad.

摘要翻译： 提出了一种用于形成TSV触点的系统和方法。 优选实施例包括与半导体管芯的最上层金属层的一部分接触的TSV。 TSV导体和接触垫之间的界面优选地特征在于形成接触网格图案的非平面之字形图案。 或者，触点可以形成与接触垫接触的多个金属线。