公开(公告)号：US11699587B2

公开(公告)日：2023-07-11

申请号：US17297635

申请日：2019-11-27

申请人： KOREA POLYTECHNIC UNIVERSITY INDUSTRY ACADEMIC COOPERATION FOUNDATION

发明人： Ok Hyun Nam ,  Ui Ho Choi ,  Geun Ho Yoo

IPC分类号： H01L21/02

CPC分类号： H01L21/02527 ,  H01L21/0242 ,  H01L21/0245 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02387 ,  H01L21/02403 ,  H01L21/02414 ,  H01L21/02425 ,  H01L21/02447 ,  H01L21/02455 ,  H01L21/02472 ,  H01L21/02483 ,  H01L21/02488 ,  H01L21/02491 ,  H01L21/02645

摘要： The present invention relates to a method for manufacturing a diamond substrate, and more particularly, to a method of growing diamond after forming a structure of an air gap having a crystal correlation with a lower substrate by heat treatment of a photoresist pattern and an air gap forming film material on a substrate such as sapphire (Al2O3). Through such a method, a process is simplified and the cost is lowered when large-area/large-diameter single crystal diamond is heterogeneously grown, stress due to differences in a lattice constant and a coefficient of thermal expansion between the heterogeneous substrate and diamond is relieved, and an occurrence of defects or cracks is reduced even when a temperature drops, such that a high-quality single crystal diamond substrate may be manufactured and the diamond substrate may be easily self-separated from the heterogeneous substrate.

公开(公告)号：US10084047B2

公开(公告)日：2018-09-25

申请号：US15821439

申请日：2017-11-22

申请人： Infineon Technologies Americas Corp.

发明人： Michael A. Briere

IPC分类号： H01L29/20 ,  H01L21/02 ,  H01L29/15 ,  H01L29/207 ,  H01L29/778 ,  H01L29/66

CPC分类号： H01L29/2003 ,  H01L21/0237 ,  H01L21/02389 ,  H01L21/02455 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/0254 ,  H01L21/02584 ,  H01L21/0262 ,  H01L21/02634 ,  H01L29/1095 ,  H01L29/157 ,  H01L29/205 ,  H01L29/207 ,  H01L29/36 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7787 ,  H01L29/78

摘要： A semiconductor structure includes a substrate, a transition body over the substrate, a group III-V intermediate body having a bottom surface over the transition body and a group III-V device layer over a top surface of the group III-V intermediate body. The group III-V intermediate body has a first impurity concentration at the bottom surface, a second impurity concentration at the top surface, and a variable impurity concentration that rises and falls between the bottom surface and the top surface. The first impurity concentration is greater than the second impurity concentration.

公开(公告)号：US20180053874A1

公开(公告)日：2018-02-22

申请号：US15660471

申请日：2017-07-26

申请人： Solar Junction Corporation

发明人： Ferran Suarez ,  Ting Liu ,  Arsen Sukiasyan

IPC分类号： H01L31/18 ,  H01L31/0735 ,  H01L31/0725

CPC分类号： H01L31/1852 ,  H01L21/02381 ,  H01L21/02455 ,  H01L21/02461 ,  H01L21/02466 ,  H01L21/02505 ,  H01L21/02538 ,  H01L31/0304 ,  H01L31/0687 ,  H01L31/0725 ,  H01L31/0735 ,  H01L31/1844 ,  H01L31/1856 ,  Y02E10/544

摘要： Semiconductor devices having an antimony-containing nucleation layer between a dilute nitride material and an underlying substrate are disclosed. Dilute nitride-containing multijunction solar cells incorporating (Al)InGaPSb/Bi nucleation layers exhibit high efficiency.

公开(公告)号：US20170345646A1

公开(公告)日：2017-11-30

申请号：US15166338

申请日：2016-05-27

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. ,  NATIONAL TAIWAN UNIVERSITY

发明人： Kuanhsiung Chen ,  Mingwei Hong ,  Jueinai Kwo ,  Yen-Hsun Lin ,  Keng-Yung Lin

IPC分类号： H01L21/02 ,  H01L29/51 ,  H01L21/28 ,  H01L29/20 ,  H01L29/04 ,  H01L29/66 ,  H01L29/267

CPC分类号： H01L21/02192 ,  H01L21/0228 ,  H01L21/02381 ,  H01L21/02395 ,  H01L21/02433 ,  H01L21/02455 ,  H01L21/02516 ,  H01L21/02565 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/28264 ,  H01L29/045 ,  H01L29/20 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66522 ,  H01L29/66568

摘要： A substrate with a (001) orientation is provided. A gallium arsenide (GaAs) layer is epitaxially grown on the substrate. The GaAs layer has a reconstruction surface that is a 4×6 reconstruction surface, a 2×4 reconstruction surface, a 3×2 reconstruction surface, a 2×1 reconstruction surface, or a 4×4 reconstruction surface. Via an atomic layer deposition process, a single-crystal structure yttrium oxide (Y2O3) layer is formed on the reconstruction surface of the GaAs layer. The atomic layer deposition process includes water or ozone gas as an oxygen source precursor and a cyclopentadienyl-type compound as an yttrium source precursor.

公开(公告)号：US09831312B2

公开(公告)日：2017-11-28

申请号：US15421073

申请日：2017-01-31

申请人： Infineon Technologies Americas Corp.

发明人： Michael A. Briere

IPC分类号： H01L29/20 ,  H01L29/15 ,  H01L29/207 ,  H01L29/66 ,  H01L29/778 ,  H01L21/02

CPC分类号： H01L29/2003 ,  H01L21/0237 ,  H01L21/02389 ,  H01L21/02455 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/0254 ,  H01L21/02584 ,  H01L21/0262 ,  H01L21/02634 ,  H01L29/1095 ,  H01L29/157 ,  H01L29/205 ,  H01L29/207 ,  H01L29/36 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7787 ,  H01L29/78

摘要： There are disclosed herein various implementations of a semiconductor structure and method. The semiconductor structure comprises a substrate, a transition body over the substrate, and a group III-V intermediate body having a bottom surface over the transition body. The semiconductor structure also includes a group III-V device layer over a top surface of the group III-V intermediate body. The group III-V intermediate body has a continuously reduced impurity concentration wherein a higher impurity concentration at the bottom surface is continuously reduced to a lower impurity concentration at the top surface.

公开(公告)号：US09799737B2

公开(公告)日：2017-10-24

申请号：US15185749

申请日：2016-06-17

申请人： Applied Materials, Inc.

发明人： Xinyu Bao ,  Errol Antonio C. Sanchez ,  David K. Carlson ,  Zhiyuan Ye

IPC分类号： H01L29/205 ,  H01L29/267 ,  H01L21/02

CPC分类号： H01L29/205 ,  H01L21/02381 ,  H01L21/02455 ,  H01L21/02538 ,  H01L21/0262 ,  H01L21/02694 ,  H01L29/267 ,  Y10T117/1008

摘要： A method for forming a conformal group III/V layer on a silicon substrate and the resulting substrate with the group III/V layers formed thereon. The method includes removing the native oxide from the substrate, positioning a substrate within a processing chamber, heating the substrate to a first temperature, cooling the substrate to a second temperature, flowing a group III precursor into the processing chamber, maintaining the second temperature while flowing a group III precursor and a group V precursor into the processing chamber until a conformal layer is formed, heating the processing chamber to an annealing temperature, while stopping the flow of the group III precursor, and cooling the processing chamber to the second temperature. Deposition of the III/V layer may be made selective through the use of halide gas etching which preferentially etches dielectric regions.

公开(公告)号：US09799531B2

公开(公告)日：2017-10-24

申请号：US15195449

申请日：2016-06-28

申请人： Applied Materials, Inc.

发明人： Swaminathan T. Srinivasan ,  Fareen Adeni Khaja ,  Errol Antonio C. Sanchez ,  Patrick M. Martin

IPC分类号： H01L21/311 ,  H01L21/02 ,  H01L29/04 ,  H01L29/06 ,  H01L29/267 ,  H01J37/32

CPC分类号： H01L21/02658 ,  H01J37/32082 ,  H01J37/32422 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02455 ,  H01L21/02488 ,  H01L21/02513 ,  H01L21/02538 ,  H01L21/0254 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/0259 ,  H01L21/02639 ,  H01L21/311 ,  H01L21/31116 ,  H01L29/045 ,  H01L29/0649 ,  H01L29/0684 ,  H01L29/267 ,  H01L29/78

摘要： Embodiments of the present disclosure relate to reducing dislocation density in a heteroepitaxial growth film and devices including heteroepitaxial films with reduced dislocation density. According to embodiments of the present disclosure, sidewalls of high aspect ratio trenches may be tilted or angled to allow defects in crystalline material formed in the high aspect ratio trenches to be terminated in the tilted sidewalls, including defects propagating along the length of the high aspect ratio trenches. Embodiments of the present disclosure may be used to reduce defects in heteroepitaxial growth on silicon (Si) for microelectronic applications, such as high mobility channels using Group III-V elements in field effect transistors.

公开(公告)号：US20170288024A1

公开(公告)日：2017-10-05

申请号：US15085022

申请日：2016-03-30

申请人： International Business Machines Corporation

发明人： Alexander Reznicek

IPC分类号： H01L29/32 ,  H01L29/06 ,  H01L21/02 ,  H01L29/205

CPC分类号： H01L29/32 ,  H01L21/0245 ,  H01L21/02455 ,  H01L21/02483 ,  H01L21/02507 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/02554 ,  H01L29/0607 ,  H01L29/165 ,  H01L29/205

摘要： A lattice matched epitaxial oxide interlayer is disposed between each semiconductor layer of a graded buffer layer material stack. Each lattice matched epitaxial oxide interlayer inhibits propagation of threading dislocations from one semiconductor layer of the graded buffer layer material stack into an overlying semiconductor layer of the graded buffer layer material stack. This allows for decreasing the thickness of each semiconductor layer within the graded buffer layer material stack. The topmost semiconductor layer of the graded buffer layer material stack, which is a relaxed layer, contains a lower defect density than the other semiconductor layers of the graded buffer layer material stack.

公开(公告)号：US09711591B2

公开(公告)日：2017-07-18

申请号：US13997607

申请日：2011-12-28

申请人： Niloy Mukherjee ,  Matthew V. Metz ,  James M. Powers ,  Van H. Le ,  Benjamin Chu-Kung ,  Mark R. Lemay ,  Marko Radosavljevic ,  Niti Goel ,  Loren Chow ,  Peter G. Tolchinsky ,  Jack T. Kavalieros ,  Robert S. Chau

发明人： Niloy Mukherjee ,  Matthew V. Metz ,  James M. Powers ,  Van H. Le ,  Benjamin Chu-Kung ,  Mark R. Lemay ,  Marko Radosavljevic ,  Niti Goel ,  Loren Chow ,  Peter G. Tolchinsky ,  Jack T. Kavalieros ,  Robert S. Chau

IPC分类号： H01L21/02 ,  H01L29/06

CPC分类号： H01L29/06 ,  H01L21/0237 ,  H01L21/0245 ,  H01L21/02455 ,  H01L21/02494 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/02587 ,  H01L21/0259 ,  H01L21/02617 ,  H01L21/02636 ,  H01L21/02658 ,  H01L21/02664

摘要： Methods of forming hetero-layers with reduced surface roughness and bulk defect density on non-native surfaces and the devices formed thereby are described. In one embodiment, the method includes providing a substrate having a top surface with a lattice constant and depositing a first layer on the top surface of the substrate. The first layer has a top surface with a lattice constant that is different from the first lattice constant of the top surface of the substrate. The first layer is annealed and polished to form a polished surface. A second layer is then deposited above the polished surface.

公开(公告)号：US20170011913A1

公开(公告)日：2017-01-12

申请号：US15276136

申请日：2016-09-26

申请人： International Business Machines Corporation

发明人： Daniele Caimi ,  Lukas Czornomaz ,  Jean Fompeyrine ,  Emanuele Uccelli

IPC分类号： H01L21/02 ,  H01L29/786 ,  H01L29/32 ,  H01L29/06 ,  H01L29/20 ,  H01L29/22

CPC分类号： H01L21/02647 ,  H01L21/02381 ,  H01L21/02387 ,  H01L21/024 ,  H01L21/02455 ,  H01L21/02488 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02538 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02557 ,  H01L21/0256 ,  H01L21/02562 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/02664 ,  H01L21/30612 ,  H01L21/8258 ,  H01L27/1218 ,  H01L27/1225 ,  H01L29/0649 ,  H01L29/16 ,  H01L29/20 ,  H01L29/22 ,  H01L29/32 ,  H01L29/78603 ,  H01L29/78681 ,  H01L29/78696

摘要： Method for fabricating a semiconductor structure. The semiconductor structure includes: a crystalline silicon substrate; a dielectric layer on the crystalline silicon substrate, the opening having an opening with sidewalls and a bottom wherein the bottom corresponds to a surface of the crystalline silicon substrate; and a crystalline compound semiconductor layer thereby forming a processable crystalline compound semiconductor substrate, wherein the bottom of the opening is isolated from the crystalline compound material.

摘要翻译： 半导体结构的制造方法。 半导体结构包括：晶体硅衬底; 在所述晶体硅衬底上的介电层，所述开口具有带侧壁的开口和底部，其中所述底部对应于所述晶体硅衬底的表面; 和结晶化合物半导体层，从而形成可加工的结晶化合物半导体衬底，其中开口的底部与结晶化合物材料分离。