公开(公告)号：US20190016906A1

公开(公告)日：2019-01-17

申请号：US15944920

申请日：2018-04-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minsu SEOL ,  Sangwon KIM ,  Hyeonjin SHIN ,  Dongwook LEE ,  Seongjun PARK ,  Yunseong LEE ,  Seongjun JEONG ,  Alum JUNG

IPC: C09D7/63 ,  C07F3/02 ,  G03F7/16 ,  G03F7/20 ,  G03F7/38 ,  G03F7/32 ,  H01L21/311 ,  H01L21/3213

Abstract: Provided are a hardmask composition including a structure represented by Formula 1 and a solvent, a method of forming a pattern using the hardmask composition, and a hardmask formed from the hardmask composition. wherein in Formula 1, R1 to R8, X, and M are described in detail in the detailed description.

公开(公告)号：US20180090317A1

公开(公告)日：2018-03-29

申请号：US15817979

申请日：2017-11-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minhyun LEE ,  Hyeonjin SHIN ,  Jaeho LEE ,  Haeryong KIM

IPC: H01L21/02 ,  H01L29/06 ,  H01L29/778 ,  H01L29/66 ,  H01L29/786 ,  H01L29/78 ,  H01L29/16 ,  H01L29/24 ,  H01L29/41

CPC classification number: H01L21/02568 ,  H01L21/0259 ,  H01L21/02628 ,  H01L29/0673 ,  H01L29/1606 ,  H01L29/24 ,  H01L29/413 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/778 ,  H01L29/7839 ,  H01L29/786 ,  H01L29/78654 ,  H01L29/78681 ,  H01L29/78684 ,  H01L29/78696

Abstract: An electronic device includes first and second electrodes that are spaced apart from each other and a 2D material layer. The 2D material layer connects the first and second electrodes. The 2D material layer includes a plurality of 2D nanomaterials. At least some of the 2D nanomaterials overlap one another.

公开(公告)号：US20180061490A1

公开(公告)日：2018-03-01

申请号：US15448998

申请日：2017-03-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minhyun LEE ,  Seunggeol NAM ,  Changhyun KIM ,  Hyeonjin SHIN ,  Yeonchoo CHO ,  Jinseong HEO ,  Seongjun PARK

IPC: G11C13/00 ,  H01L45/00 ,  H01L27/24

CPC classification number: G11C13/0004 ,  G11C13/0069 ,  G11C13/0097 ,  H01L27/24 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1641

Abstract: A phase change memory device may include a phase change layer that includes a two-dimensional (2D) material. The phase change layer may include a layered structure that includes one or more layers of 2D material. The phase change layer may be provided between a first electrode and a second electrode, and the phase of at least a portion of one or more of the layers of 2D material may be changed based on an electrical signal applied to the phase change layer through the first electrode and the second electrode. The 2D material may include a chalcogenide-based material or phosphorene. The 2D material may be associated with a phase change temperature that is greater than or equal to about 200° C. and lower than or equal to about 500° C.

公开(公告)号：US20180047818A1

公开(公告)日：2018-02-15

申请号：US15439031

申请日：2017-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seunggeol NAM ,  Hyeonjin SHIN ,  Yeonchoo CHO ,  Minhyun LEE ,  Changhyun KIM ,  Seongjun PARK

IPC: H01L29/40 ,  H01L29/78

CPC classification number: H01L29/408 ,  H01L21/283 ,  H01L29/41725 ,  H01L29/456 ,  H01L29/66568 ,  H01L29/78 ,  H01L29/7839 ,  H01L29/786

Abstract: A semiconductor device includes a silicon semiconductor layer including at least one region doped with a first conductive type dopant, a metal material layer electrically connected to the doped region, and a self-assembled monolayer (SAM) between the doped region and the metal material layer, the SAM forming a molecular dipole on an interface of the silicon semiconductor layer in a direction of reducing a Schottky barrier height (SBH).

公开(公告)号：US20170271154A1

公开(公告)日：2017-09-21

申请号：US15611935

申请日：2017-06-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjin SHIN ,  Sangwon Kim ,  Seongjun Park

IPC: H01L21/033 ,  C08K3/38 ,  G03F7/09 ,  C08K3/30 ,  C08K5/56 ,  C08K3/22 ,  H01L21/311 ,  C09D7/12

CPC classification number: H01L21/0332 ,  C08K3/22 ,  C08K3/30 ,  C08K3/38 ,  C08K5/56 ,  C08K2003/2255 ,  C08K2003/3009 ,  C08K2003/385 ,  C09D7/61 ,  C09D7/63 ,  G03F7/094 ,  H01L21/02112 ,  H01L21/02282 ,  H01L21/0254 ,  H01L21/02565 ,  H01L21/02568 ,  H01L21/02584 ,  H01L21/02628 ,  H01L21/31122 ,  H01L21/31144

Abstract: Example embodiments relate to a hardmask composition and/or a method of forming a fine pattern by using the hardmask composition, wherein the hardmask composition includes at least one of a two-dimensional layered nanostructure and a precursor thereof, and a solvent, and an amount of the at least one of a two-dimensional layered nanostructure and the precursor is about 0.01 part to about 40 parts by weight based on 100 parts by weight of the hardmask composition.

公开(公告)号：US20170033003A1

公开(公告)日：2017-02-02

申请号：US15172908

申请日：2016-06-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunjae SONG ,  Seunggeol NAM ,  Seongjun PARK ,  Keunwook SHIN ,  Hyeonjin SHIN ,  Jaeho LEE ,  Changseok LEE ,  Yeonchoo CHO

IPC: H01L21/768 ,  H01L21/285 ,  H01L23/532 ,  H01L29/45

CPC classification number: H01L21/76846 ,  H01L21/28525 ,  H01L21/28568 ,  H01L23/485 ,  H01L23/53209 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53271 ,  H01L29/45

Abstract: A multilayer structure includes a first material layer, a second material layer, and a diffusion barrier layer. The second material layer is connected to the first material layer. The second material layer is spaced apart from the first material layer. The diffusion barrier layer is between the first material layer and the second material layer. The diffusion barrier layer may include a two-dimensional (2D) material. The 2D material may be a non-graphene-based material, such as a metal chalcogenide-based material having a 2D crystal structure. The first material layer may be a semiconductor or an insulator, and the second material layer may be a conductor. At least a part of the multilayer structure may constitute an interconnection for an electronic device.

Abstract translation: 多层结构包括第一材料层，第二材料层和扩散阻挡层。 第二材料层连接到第一材料层。 第二材料层与第一材料层间隔开。 扩散阻挡层在第一材料层和第二材料层之间。 扩散阻挡层可以包括二维（2D）材料。 2D材料可以是非石墨烯材料，例如具有2D晶体结构的金属硫族化物基材料。 第一材料层可以是半导体或绝缘体，第二材料层可以是导体。 多层结构的至少一部分可以构成电子设备的互连。

公开(公告)号：US20170025273A1

公开(公告)日：2017-01-26

申请号：US14984189

申请日：2015-12-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunwook SHIN ,  Minsu SEOL ,  Hyeonjin SHIN ,  Sangwon KIM ,  Seongjun PARK

IPC: H01L21/033 ,  H01L21/027 ,  H01L21/311 ,  H01L21/3215 ,  H01L21/02

CPC classification number: H01L21/0332 ,  H01L21/02118 ,  H01L21/02274

Abstract: A 2D material hard mask includes hydrogen, oxygen, and a 2D material layer having a layered crystalline structure. The 2D material layer may be a material layer including one of a carbon structure (for example, a graphene sheet) and a non-carbon structure.

Abstract translation: 2D材料硬掩模包括氢，氧和具有层状晶体结构的2D材料层。 2D材料层可以是包括碳结构（例如，石墨烯片）和非碳结构之一的材料层。

公开(公告)号：US20150348794A1

公开(公告)日：2015-12-03

申请号：US14725390

申请日：2015-05-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwon KIM ,  Hyeonjin SHIN ,  Seongjun PARK

IPC: H01L21/308 ,  H01L21/02 ,  H01L21/324

CPC classification number: H01L21/3081 ,  C09D1/00 ,  G03F7/16 ,  G03F7/168 ,  G03F7/2006 ,  G03F7/327 ,  G03F7/40 ,  H01L21/02115 ,  H01L21/3086 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/324

Abstract: A hardmask composition may include a solvent and a 2-dimensional carbon nanostructure containing about 0.01 atom % to about 40 atom % of oxygen or a 2-dimensional carbon nanostructure precursor thereof. A content of oxygen in the 2-dimensional carbon nanostructure precursor may be lower than about 0.01 atom % or greater than about 40 atom %. The hardmask composition may be used to form a fine pattern.

Abstract translation: 硬掩模组合物可以包括溶剂和包含约0.01原子％至约40原子％的氧的二维碳纳米结构或其二维碳纳米结构前体。 二维碳纳米结构前体中的氧含量可以低于约0.01原子％或大于约40原子％。 硬掩模组合物可用于形成精细图案。

公开(公告)号：US20150332920A1

公开(公告)日：2015-11-19

申请号：US14657306

申请日：2015-03-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjin SHIN ,  Sangwoo KIM ,  Kanghyuck LEE ,  Hyejung PARK ,  Eunbi CHO

IPC: H01L21/02 ,  H01L21/324 ,  H01L29/267

CPC classification number: H01L29/267 ,  H01L21/0242 ,  H01L21/02422 ,  H01L21/02425 ,  H01L21/02444 ,  H01L21/02499 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02527 ,  H01L21/02568 ,  H01L21/0259 ,  H01L21/02614 ,  H01L21/0262 ,  H01L21/02623 ,  H01L21/02628 ,  H01L21/02664 ,  H01L21/324 ,  H01L29/1606 ,  H01L29/66015 ,  H01L31/028 ,  Y02E10/547

Abstract: Example embodiments relate to an electronic device having a graphene-semiconductor multi-junction and a method of manufacturing the electronic device. The electronic device includes a graphene layer having at least one graphene protrusion and a semiconductor layer that covers the graphene layer. A side surface of each of the at least one graphene protrusion may be uneven, may have a multi-edge, and may be a stepped side surface. The graphene layer includes a plurality of nanocrystal graphenes. The graphene layer includes a lower graphene layer having a plurality of nanocrystal graphenes and the at least one graphene protrusion that is formed on the lower graphene layer. The semiconductor layer may include a transition metal dichalcogenide (TMDC) layer. Each of the at least one graphene protrusion may include a plurality of nanocrystal graphenes.

Abstract translation: 示例实施例涉及具有石墨烯 - 半导体多结的电子设备和制造电子设备的方法。 电子器件包括具有至少一个石墨烯突起的石墨烯层和覆盖石墨烯层的半导体层。 所述至少一个石墨烯突起中的每一个的侧表面可以是不均匀的，可以具有多边缘，并且可以是阶梯状侧表面。 石墨烯层包括多个纳米晶体石墨烯。 石墨烯层包括具有多个纳米晶体石墨烯的下部石墨烯层和形成在下部石墨烯层上的至少一个石墨烯突起。 半导体层可以包括过渡金属二硫族元素（TMDC）层。 所述至少一个石墨烯突起中的每一个可以包括多个纳米晶体石墨烯。

公开(公告)号：US20150155374A1

公开(公告)日：2015-06-04

申请号：US14528338

申请日：2014-10-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyungeun BYUN ,  Jisoo KYOUNG ,  Seongjun PARK ,  Hyeonjin SHIN ,  Hyunjae SONG ,  Jaeho LEE

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/267

CPC classification number: H01L29/66977 ,  H01L29/456 ,  H01L29/78

Abstract: An electronic device includes a semiconductor layer, a tunneling layer formed of a material including a two-dimensional (2D) material so as to directly contact a certain region of the semiconductor layer, and a metal layer formed on the tunneling layer.

Abstract translation: 电子器件包括半导体层，由包括二维（2D）材料的材料形成的隧道层，以便直接接触半导体层的特定区域，以及形成在隧道层上的金属层。