公开(公告)号：US09305871B2

公开(公告)日：2016-04-05

申请号：US14692283

申请日：2015-04-21

Applicant: Texas Instruments Incorporated

Inventor： Sreenivasan K. Koduri

IPC: H01L23/495 ,  H01L23/34 ,  H05K1/02 ,  H05K1/11 ,  H01L23/31 ,  H01L23/367 ,  H01L23/482

CPC classification number: H01L23/49568 ,  H01L23/3114 ,  H01L23/34 ,  H01L23/3677 ,  H01L23/4822 ,  H01L23/49506 ,  H01L23/49517 ,  H01L23/49541 ,  H01L2924/0002 ,  H05K1/0203 ,  H05K1/11 ,  H05K1/111 ,  H05K2201/10636 ,  H01L2924/00

Abstract: A plastic package for high power has a pair of oblong metal pins exposed from a surface of the plastic, the pins straddling a corner of the package; each pin has a long axis, the long axes of the pair forming a non-orthogonal angle. Package further includes a chip assembly pad, acting as a thermal spreader and semiconductor chip.

Abstract translation: 用于高功率的塑料封装具有从塑料表面暴露的一对长方形金属销，跨过包装角的销钉; 每个销具有长轴，该对的长轴形成非正交角。 封装还包括用作散热器和半导体芯片的芯片组装垫。

公开(公告)号：US09282635B2

公开(公告)日：2016-03-08

申请号：US14669329

申请日：2015-03-26

Applicant: IBIDEN CO., LTD.

Inventor： Toyotaka Shimabe ,  Shunsuke Sakai

IPC: H05K7/00 ,  H05K1/02 ,  H05K1/18 ,  H05K3/46

CPC classification number: H05K1/0284 ,  H01L21/568 ,  H01L24/19 ,  H01L24/25 ,  H01L2224/04105 ,  H01L2224/16227 ,  H01L2224/2518 ,  H01L2224/82039 ,  H01L2924/15313 ,  H05K1/185 ,  H05K3/4602 ,  H05K3/4697 ,  H05K2201/0344 ,  H05K2201/09036 ,  H05K2201/09145 ,  H05K2201/09154 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/1003 ,  H05K2201/10522 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/4913

Abstract: A multilayer wiring board with a built-in electronic component includes a substrate, a conductor layer formed on surface of the substrate, one or more electronic components positioned in a cavity formed through the substrate, an insulating layer formed on the substrate such that the insulating layer is formed on the component in the cavity, and a wiring layer formed on the insulating layer. The conductor layer has an opening formed such that the cavity is formed in the opening of the conductor layer and that the conductor layer has a first side in the opening and a second side in the opening on the opposite side across the cavity, and the cavity is formed in the opening of the conductor layer such that width between the cavity and the first side of the conductor layer is greater than width between the cavity and the second side of the conductor layer.

Abstract translation: 具有内置电子部件的多层布线基板包括基板，形成在基板的表面上的导体层，位于通过基板形成的空腔中的一个或多个电子部件，形成在基板上的绝缘层， 在空腔中的部件上形成层，以及形成在绝缘层上的布线层。 导体层具有形成为使得空腔形成在导体层的开口中并且导体层在开口中具有第一侧的开口，并且在开口中的相对于空腔的开口中的第二侧，并且空腔 形成在导体层的开口中，使得空腔和导体层的第一侧之间的宽度大于导体层的空腔和第二侧之间的宽度。

公开(公告)号：US09281126B2

公开(公告)日：2016-03-08

申请号：US14067785

申请日：2013-10-30

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Min Cheol Park ,  Heung Kil Park

IPC: H01G4/06 ,  H01G4/30 ,  H05K1/02 ,  H01G4/012 ,  H01G4/232 ,  H05K1/18 ,  H05K3/34

CPC classification number: H01G4/30 ,  H01G4/012 ,  H01G4/232 ,  H05K1/0231 ,  H05K1/0268 ,  H05K1/181 ,  H05K3/3442 ,  H05K2201/10015 ,  H05K2201/10636 ,  Y02P70/611

Abstract: There is provided a multilayer ceramic capacitor including a ceramic body including a plurality of dielectric layers and having first and second main surfaces, first and second side surfaces, and first and second end surfaces, a capacitor part formed in the ceramic body and including a first internal electrode exposed to the first and second end surfaces and a second internal electrode having a lead-out portion exposed to the first main surface, an internal connection conductor formed in the ceramic body and exposed to the first and second main surfaces, and first to fourth external electrodes formed on outer surfaces of the ceramic body and electrically connected to the first and second internal electrodes and the internal connection conductor, wherein the internal connection conductor is connected to the capacitor part in series.

Abstract translation: 提供了一种多层陶瓷电容器，其包括陶瓷体，该陶瓷体包括多个电介质层，并且具有第一和第二主表面，第一和第二侧表面以及第一和第二端面，形成在陶瓷体中的电容器部分， 内部电极暴露于第一和第二端面，以及第二内部电极，具有暴露于第一主表面的引出部分，形成在陶瓷体中并暴露于第一和第二主表面的内部连接导体，首先至 第四外部电极，其形成在陶瓷体的外表面上并电连接到第一和第二内部电极和内部连接导体，其中内部连接导体串联连接到电容器部分。

公开(公告)号：US20160042869A1

公开(公告)日：2016-02-11

申请号：US14818207

申请日：2015-08-04

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Heung Kil PARK ,  Sang Soo PARK

IPC: H01G4/30 ,  H01G4/012 ,  H05K1/18 ,  H01G4/248 ,  H05K1/11 ,  H01G4/12 ,  H01G4/236

CPC classification number: H01G4/30 ,  H01G2/06 ,  H01G4/012 ,  H01G4/12 ,  H01G4/232 ,  H05K1/181 ,  H05K3/3442 ,  H05K2201/10015 ,  H05K2201/10636 ,  H05K2201/10909 ,  H05K2201/10946 ,  H05K2201/2045 ,  Y02P70/611 ,  Y02P70/613

Abstract: A multilayer ceramic capacitor may include: ceramic body including a plurality of dielectric layers and a plurality of internal electrodes, external electrodes including a connecting portion and band portion, terminal electrodes including upper and lower horizontal portion and vertical portion connecting end portion of the upper and lower horizontal portion and the conductive adhesive layers disposed to the upper surface of the band portion and upper horizontal portion.

Abstract translation: 多层陶瓷电容器可以包括：陶瓷体，包括多个电介质层和多个内部电极，包括连接部分和带部分的外部电极，包括上部和下部水平部分的端子电极和连接上部的端部的垂直部分和 下水平部分和设置在带部分的上表面和上水平部分的导电粘合剂层。

公开(公告)号：US09247646B2

公开(公告)日：2016-01-26

申请号：US13904447

申请日：2013-05-29

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Junji Sato ,  Tomohiro Nomura ,  Kazuhiro Oshima

IPC: H05K1/18 ,  H05K3/46

CPC classification number: H05K1/185 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15313 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/10636 ,  H05K2203/0191 ,  Y02P70/611

Abstract: An electronic component built-in substrate comprises a substrate having a core member with an opening in which an electronic component is disposed, a first auxiliary insulating layer formed on a first surface of the core member; a second auxiliary insulating layer formed on a second surface of the core member, the second auxiliary insulating layer having a first via hole, a filling resin portion filling a gap between the electronic component and a side surface of the opening of the core member, and a first wiring layer formed on the second auxiliary insulating layer and connected to the connection terminal of the electronic component through the first via hole. The whole of the first surface and the whole of the second surface of the core member are in direct contact with the first auxiliary insulating layer and the second auxiliary insulating layer, respectively.

Abstract translation: 电子部件内置基板包括具有芯部件的基板，所述芯部件具有设置有电子部件的开口，形成在所述芯部件的第一表面上的第一辅助绝缘层; 第二辅助绝缘层，形成在所述芯构件的第二表面上，所述第二辅助绝缘层具有第一通孔，填充所述电子部件之间的间隙和所述芯部件的开口的侧表面的填充树脂部分，以及 第一布线层，形成在第二辅助绝缘层上，并通过第一通孔连接到电子部件的连接端子。 芯构件的第一表面和整个第二表面的整体分别与第一辅助绝缘层和第二辅助绝缘层直接接触。

公开(公告)号：US20160007483A1

公开(公告)日：2016-01-07

申请号：US14853992

申请日：2015-09-14

Applicant: Unimicron Technology Corp.

Inventor： Shih-Pin Hsu ,  Zhao-Chong Zeng

IPC: H05K3/32 ,  H05K3/46

CPC classification number: H05K3/32 ,  H01L23/49822 ,  H01L2924/00013 ,  H01L2924/0002 ,  H05K1/186 ,  H05K3/4644 ,  H05K3/4682 ,  H05K2201/0195 ,  H05K2201/10015 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/4913 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

Abstract: A carrier board having two opposite surfaces is provided and a releasing film and a metal layer are formed on the two opposite surfaces respectively. Each metal layer formed with positioning pads is covered with a first hot-melt-dielectric layer where a passive component is disposed. The passive component has upper and lower surfaces each having electrode pads. Each first hot-melt-dielectric layer is disposed on a core board having a cavity to receive the passive component. A second hot-melt-dielectric layer is stacked on each core board. The first and second hot-melt-dielectric layers are heat pressed to form two dielectric layer units each having a top surface and a bottom surface. The carrier board and the releasing films are removed to separate the dielectric layer units. Wiring layers are formed on each top surface and each bottom surface and electrically connected to the electrode pads of the upper and lower surfaces respectively.

Abstract translation: 提供具有两个相对表面的载体板，并且在两个相对的表面上分别形成剥离膜和金属层。 形成有定位焊盘的每个金属层被设置有无源部件的第一热熔电介质层覆盖。 无源部件具有各自具有电极焊盘的上表面和下表面。 每个第一热熔电介质层设置在具有空腔的芯板上以接收无源部件。 在每个芯板上堆叠第二热熔电介质层。 第一和第二热熔介电层被热压以形成两个具有顶表面和底表面的电介质层单元。 去除载体板和释放膜以分离介电层单元。 接线层形成在每个顶表面和每个底表面上并分别电连接到上表面和下表面的电极焊盘。

公开(公告)号：US20160007446A1

公开(公告)日：2016-01-07

申请号：US14768424

申请日：2014-02-12

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Kazuya ISHIKAWA ,  Nobuhiro SASAKI ,  Hideo ISHIHARA ,  Katsunosuke HAGA

IPC: H05K1/02 ,  H05K1/11 ,  H01G4/30 ,  H01G4/12 ,  H01G4/232

CPC classification number: H05K1/0216 ,  H01G4/12 ,  H01G4/232 ,  H01G4/30 ,  H05K1/113 ,  H05K1/181 ,  H05K2201/09481 ,  H05K2201/10015 ,  H05K2201/10378 ,  H05K2201/10636 ,  Y02P70/611

Abstract: An embodiment of an multilayer ceramic capacitor with interposer includes: an interposer 20 having an insulated substrate 21, two first conductor pads 22, two second conductor pads 23 and two conductor vias 24 connecting the first conductor pads 22 and second conductor pads 23; and a multilayer ceramic capacitor 10 having external electrodes 12 that are each connected to each first conductor pad 22 of the interposer 20 via solder SOL. Each conductor via 24 of the interposer 20 has a through hole 24a inside, and a void GA not filled with the solder SOL is present in each through hole 24a on the second conductor pad 23 side. The multilayer ceramic capacitor with interposer is capable of suppressing noise due to electrostriction.

Abstract translation: 具有插入器的多层陶瓷电容器的实施例包括：具有绝缘基板21，两个第一导体焊盘22，两个第二导体焊盘23和连接第一导体焊盘22和第二导体焊盘23的两个导体通孔24的插入件20; 以及具有外部电极12的多层陶瓷电容器10，每个外部电极12经由焊料SOL连接到插入件20的每个第一导体焊盘22。 插入器20的每个导体通孔24在其内部具有通孔24a，并且在第二导体焊盘23侧的每个通孔24a中都存在未填充有焊料SOL的空隙GA。 具有中介层的多层陶瓷电容器能够抑制由于电致伸缩引起的噪声。

公开(公告)号：US09226409B2

公开(公告)日：2015-12-29

申请号：US13853087

申请日：2013-03-29

Applicant: IBIDEN CO., LTD.

Inventor： Atsushi Ishida ,  Ryojiro Tominaga ,  Kenji Sakai

IPC: H05K3/32 ,  H05K3/40 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K3/46

CPC classification number: H05K3/4038 ,  H05K1/0222 ,  H05K1/0231 ,  H05K1/115 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/49165

Abstract: A wiring board includes a substrate having first and second surfaces and a first penetrating hole through the substrate, a first conductive circuit on the first surface of the substrate, a second conductive circuit on the second surface of the substrate, an interlayer insulation layer on the substrate and the first or second circuit, and a third conductive circuit on the interlayer layer. The interlayer layer has a via conductor in the interlayer layer and connecting the third circuit and the second conductor. The substrate has a first through-hole conductor connecting the first and second circuits and on the inner wall of the first hole, a filler filled inside the first conductor and forming a second penetrating hole, and a second through-hole conductor in the second hole. The via conductor is shifted from the center of the second conductor in the direction parallel to the first surface of the substrate.

Abstract translation: 布线板包括具有第一表面和第二表面的基底和穿过基底的第一穿透孔，在基底的第一表面上的第一导电电路，在基底的第二表面上的第二导电电路， 衬底和第一或第二电路，以及在层间层上的第三导电电路。 层间层在层间层中具有通孔导体，并连接第三电路和第二导体。 衬底具有第一通孔导体，其连接第一和第二电路，并且在第一孔的内壁上填充填充在第一导体内部并形成第二穿透孔的填充物，以及在第二孔中形成第二通孔导体 。 通孔导体在平行于基板的第一表面的方向上从第二导体的中心偏移。

公开(公告)号：US09226401B2

公开(公告)日：2015-12-29

申请号：US14137600

申请日：2013-12-20

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Hai Joon Lee ,  Doo Young Kim ,  Byoung Hwa Lee ,  Eun Hyuk Chae

IPC: H01G4/30 ,  H05K1/18 ,  H01G4/12 ,  H01G4/008

CPC classification number: H05K1/185 ,  H01G4/008 ,  H01G4/012 ,  H01G4/12 ,  H01G4/232 ,  H01G4/30 ,  H01G4/40 ,  H05K2201/10015 ,  H05K2201/10636 ,  Y02P70/611

Abstract: There is provided a multilayer ceramic electronic part to be embedded in a board, including: a ceramic body including dielectric layers; first and second internal electrodes having first and second leads; and first and second external electrodes, wherein when lengths from edges of the first or second external electrode formed on first and second side surfaces of the ceramic body to points at which the first or second external electrode contacts the first and second leads are G1, lengths from the edges of the first or second external electrode formed on first and second side surfaces of the ceramic body to a corresponding end surface of the ceramic body are BW1, and lengths from the corresponding end surface of the ceramic body to points at which the first or second external electrode contacts the first and second leads are M1, 30 μm≦G1

Abstract translation: 提供了一种要嵌入板的多层陶瓷电子部件，包括：包括电介质层的陶瓷体; 第一和第二内部电极具有第一和第二引线; 以及第一外部电极和第二外部电极，其中当从陶瓷体的第一和第二侧表面上形成的第一或第二外部电极的边缘到第一或第二外部电极接触第一和第二引线的点的长度为G1时，长度 从形成在陶瓷体的第一和第二侧表面上的第一或第二外部电极的边缘到陶瓷体的相应端面的边缘为BW1，并且从陶瓷体的相应端面到第一 或第二外部电极接触第一和第二引线为M1，30μm和n1E; G1

公开(公告)号：US09226386B2

公开(公告)日：2015-12-29

申请号：US14050872

申请日：2013-10-10

Applicant: STMicroelectronics S.r.l ,  Freescale Semiconductor, Inc.

Inventor： Mario Rotigni ,  Richard Moseley ,  Piyush Bhatt ,  Gregory Edgington

IPC: H05K1/18 ,  H05K1/02

CPC classification number: H05K1/0231 ,  H05K1/0262 ,  H05K2201/09663 ,  H05K2201/10636 ,  H05K2201/10689 ,  Y02P70/611

Abstract: A printed circuit board including a first outer layer, a second outer layer and an integrated circuit mounted on the second outer layer. The integrated circuit has a single exposed pad electrically connected to a ground reference, a first supply pin electrically connected to a first power supply and a second supply pin electrically connected to a second power supply, wherein the first power supply is configured to generate a first supply current with frequency components higher than the frequency components of a second supply current generated by the second power supply.

Abstract translation: 一种印刷电路板，包括第一外层，第二外层和安装在第二外层上的集成电路。 集成电路具有电连接到接地基准的单个裸焊盘，电连接到第一电源的第一电源引脚和与第二电源电连接的第二电源引脚，其中第一电源被配置为产生第一 提供具有高于由第二电源产生的第二电源电流的频率分量的频率分量的电流。