摘要:
An embodiment of the invention provides a method for forming a chip package which includes: providing a substrate having a first surface and a second surface, wherein at least one optoelectronic device is formed in the substrate; forming an insulating layer on the substrate; forming a conducting layer on the insulating layer on the substrate, wherein the conducting layer is electrically connected to the at least one optoelectronic device; and spraying a solution of light shielding material on the second surface of the substrate to form a light shielding layer on the second surface of the substrate.
摘要:
An input detection device including: a reading part reading touch inputs from an input interface of a touch sensor by scanning every above two electrode lines which are adjacent on the scanning sequence from an end of the input interface to the opposite end, and acquiring a difference between detection data obtained from a half of the above two electrode lines which are successive and from the other half of the above two electrode lines which are successive; and a calculation part integrating the differences for the entire input interface to obtain touch information, wherein if an integration result obtained in the case where the above two lines stretches over the scanning finish end and the scanning start end is not satisfied with a predetermined value, the calculation part resets the detection data obtained from the electrode line located at the scanning finish end to be the predetermined value.
摘要:
A lighting apparatus includes a light-guiding plate and a lighting unit. The light-guiding plate includes a light-incident surface and a light-emitting surface. The lighting unit includes a first light source, a second light source and a circuit board. The first and second light sources are disposed on the circuit board, and the light emitted by the first and second light sources enters into the light-guiding plate through the light-incident surface and exits the light-guiding plate through the light-emitting surface. A first distance from the first light source to a reference line of the light-incident surface is not equal to a second distance from the second light source to the reference line.
摘要:
A chip package and a fabrication method thereof are provided according to an embodiment of the invention. The chip package includes a semiconductor substrate containing a chip and having a device area and a peripheral bonding pad area. A plurality of conductive pads is disposed at the peripheral bonding pad area and a passivation layer is formed over the semiconductor substrate to expose the conductive pads. An insulating protective layer is formed on the passivation layer at the device area. A packaging layer is disposed over the insulating protective layer to expose the conductive pads and the passivation layer at the peripheral bonding pad area. The method includes forming an insulating protective layer to cover a plurality of conductive pads during a cutting process and removing the insulating protective layer on the conductive pads through an opening of a packaging layer.
摘要:
Embodiments of the present invention provide a capacitive coupler packaging structure including a substrate with at least one capacitor and a receiver formed thereon, wherein the at least one capacitor at least includes a first electrode layer, a second electrode layer and a capacitor dielectric layer therebetween, and the first electrode layer is electrically connected to the receiver via a solder ball. The capacitive coupler packaging structure also includes a transmitter electrically connecting to the capacitor.
摘要:
An embodiment of the invention provides a chip package which includes: a substrate having a first surface and a second surface; an optoelectronic device formed in the substrate; a conducting layer disposed on the substrate, wherein the conducting layer is electrically connected to the optoelectronic device; an insulating layer disposed between the substrate and the conducting layer; a first light shielding layer disposed on the second surface of the substrate; and a second light shielding layer disposed on the first light shielding layer and directly contacting with the first light shielding layer, wherein a contact interface is between the first light shielding layer and the second light shielding layer.
摘要:
An embodiment of the present invention provides a manufacturing method of a chip package structure including: providing a first substrate having a plurality of predetermined scribe lines defined thereon, wherein the predetermined scribe lines define a plurality of device regions; bonding a second substrate to the first substrate, wherein a spacing layer is disposed therebetween and has a plurality of chip support rings located in the device regions respectively and a cutting support structure located on peripheries of the chip support rings, and the spacing layer has a gap pattern separating the cutting support structure from the chip support rings; and cutting the first substrate and the second substrate to form a plurality of chip packages. Another embodiment of the present invention provides a chip package structure.
摘要:
A method for fabricating a silicon submount for LED packaging. A silicon substrate is provided. A reflection layer is formed on the silicon substrate. Portions of the reflection layer and the silicon substrate are removed to form openings. A wafer backside grinding process is carried out to thin the silicon substrate thereby turning the openings into through silicon vias. An insulating layer is then deposited to cover the reflection layer and the silicon substrate. A seed layer is formed on the insulating layer. A resist pattern is then formed on the seed layer. A metal layer is formed on the seed layer not covered by the resist pattern. The resist pattern is then stripped. The seed layer not covered by the metal layer is then removed.
摘要:
An embodiment of the invention provides a chip package which includes a substrate having a first surface and a second surface; a conducting pad structure located on the first surface; a dielectric layer located on the first surface of the substrate and the conducting pad structure, wherein the dielectric layer has an opening exposing a portion of the conducting pad structure; and a cap layer located on the dielectric layer and filled into the opening.