公开(公告)号：US20140138803A1

公开(公告)日：2014-05-22

申请号：US13678577

申请日：2012-11-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Ralf Otremba ,  Josef Hoeglauer ,  Juergen Schredl ,  Xaver Schloegel ,  Klaus Schiess ,  Bernd Roemer ,  Edward Fuergut

IPC: H01L23/34 ,  H01L23/552 ,  H01L21/56 ,  H01L23/495

CPC classification number: H01L21/565 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/34 ,  H01L23/495 ,  H01L23/49562 ,  H01L23/49568 ,  H01L23/552 ,  H01L24/05 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/29099

Abstract: A chip arrangement is provided, the chip arrangement including: a carrier; a chip disposed over the carrier, the chip including one or more contact pads, wherein a first contact pad of the one or more contact pads is electrically contacted to the carrier; a first encapsulation material at least partially surrounding the chip; and a second encapsulation material at least partially surrounding the first encapsulation material.

Abstract translation: 提供了芯片布置，芯片布置包括：载体; 芯片，其设置在所述载体上方，所述芯片包括一个或多个接触焊盘，其中所述一个或多个接触焊盘的第一接触焊盘与所述载体电接触; 至少部分地围绕所述芯片的第一封装材料; 以及至少部分地围绕所述第一包封材料的第二包封材料。

公开(公告)号：US11942383B2

公开(公告)日：2024-03-26

申请号：US17501568

申请日：2021-10-14

Applicant: Infineon Technologies AG

Inventor： Edward Fuergut ,  Chii Shang Hong ,  Teck Sim Lee ,  Ralf Otremba ,  Daniel Pedone ,  Bernd Schmoelzer

IPC: H01L23/16 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367

CPC classification number: H01L23/16 ,  H01L21/4871 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3672

Abstract: A package for mounting on a mounting base is disclosed. In one example, the package comprises a carrier, an electronic component mounted at the carrier, leads electrically coupled with the electronic component and to be electrically coupled with the mounting base, and a linear spacer for defining a spacing with respect to the carrier.

公开(公告)号：US11876028B2

公开(公告)日：2024-01-16

申请号：US17502082

申请日：2021-10-15

Applicant: Infineon Technologies AG

Inventor： Edward Fuergut ,  Chii Shang Hong ,  Teck Sim Lee ,  Bernd Schmoelzer ,  Ke Yan Tean ,  Lee Shuang Wang

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/495 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/3121 ,  H01L21/56 ,  H01L23/49506 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49551 ,  H01L23/49555 ,  H01L23/49568 ,  H01L23/49838 ,  H01L24/46 ,  H01L24/49 ,  H01L24/83 ,  H01L23/49503 ,  H01L23/49575 ,  H01L2924/181

Abstract: A package is disclosed. In one example, the package includes a first main face for mounting a heat sink and an opposing second main face for being mounted on a mounting base. The package comprises a carrier, an electronic component mounted at the carrier, and an encapsulant encapsulating at least part of the electronic component and at least part of the carrier. Electrically insulating material covers electrically conductive material of the carrier at said first main face. The encapsulant comprises at least one step at the first main face.

公开(公告)号：US11049790B2

公开(公告)日：2021-06-29

申请号：US15256640

申请日：2016-09-05

Applicant: Infineon Technologies AG

Inventor： Edward Fuergut ,  Manfred Mengel

IPC: H01L23/367 ,  H01L23/31 ,  H01L23/433 ,  H01L21/52 ,  H01L21/56 ,  H01L21/3105 ,  H01L21/48 ,  H01L23/495 ,  H01L23/00 ,  H01L23/373

Abstract: Method for manufacturing an electronic semiconductor package, in which method an electronic chip (100) is coupled to a carrier, the electronic chip is at least partially encapsulated by means of an encapsulation structure having a discontinuity, and the carrier is partially encapsulated, and at least one part of the discontinuity and a volume connected thereto adjoining an exposed surface section of the carrier are covered by an electrically insulating thermal interface structure, which electrically decouples at least one part of the carrier with respect to its surroundings.

公开(公告)号：US10096584B2

公开(公告)日：2018-10-09

申请号：US15337733

申请日：2016-10-28

Applicant: Infineon Technologies AG

Inventor： Olaf Hohlfeld ,  Guido Boenig ,  Irmgard Escher-Poeppel ,  Edward Fuergut ,  Martin Gruber ,  Thorsten Meyer

IPC: H01L21/00 ,  H01L25/00 ,  H01L21/50 ,  H01L21/56 ,  H01L23/14 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065 ,  H01L25/07 ,  H01L21/60

Abstract: In order to produce a power semiconductor module, a circuit carrier is populated with a semiconductor chip and with an electrically conductive contact element. After populating, the semiconductor chip and the contact element are embedded into a dielectric embedding compound, and the contact element is exposed. In addition, an electrically conductive base layer is produced which electrically contacts the exposed contact element and which bears on the embedding compound and the exposed contact element. A prefabricated metal film is applied to the base layer by means of an electrically conductive connection layer.

公开(公告)号：US20180226276A1

公开(公告)日：2018-08-09

申请号：US15944306

申请日：2018-04-03

Applicant: Infineon Technologies AG

Inventor： Daniel Porwol ,  Edward Fuergut

IPC: H01L21/56 ,  H01L23/28 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L21/566 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/28 ,  H01L23/3107 ,  H01L23/3121 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/2518 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/92244 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/00

Abstract: A method for fabricating a semiconductor chip is disclosed. In an embodiment, the method includes providing a plurality of semiconductor chips, wherein each semiconductor chip comprises a first main face, a second main face opposite to the first main face and side faces connecting the first and second main faces, placing the semiconductor chips on a carrier with the second main faces facing the carrier and applying an encapsulation material by transfer molding thereby forming the semiconductor chip panel, wherein the encapsulation material is applied so that the side faces of the semiconductor chips are covered with the encapsulation material while the first main faces are not.

公开(公告)号：US10037972B2

公开(公告)日：2018-07-31

申请号：US15137062

申请日：2016-04-25

Applicant: Infineon Technologies AG

Inventor： Edward Fuergut ,  Martin Gruber ,  Wolfram Hable

IPC: H01L23/34 ,  H01L25/065 ,  H01L23/31 ,  H01L23/473 ,  H01L23/00 ,  H01L25/07 ,  H01L25/00 ,  H01L23/40

Abstract: Various embodiments provide an electronic module comprising a interposer comprising a fluid channel formed in an electrically isolating material and an electrically conductive structured layer; at least one electronic chip attached to the electrically conductive layer and in thermal contact to the fluid channel; and a molded encapsulation formed at least partially around the at least one electronic chip, wherein the electrically conductive structured layer is directly formed on the electrically isolating material.

公开(公告)号：US20180022601A1

公开(公告)日：2018-01-25

申请号：US15651522

申请日：2017-07-17

Applicant: Infineon Technologies AG

Inventor： Claus Waechter ,  Edward Fuergut ,  Bernd Goller ,  Michael Ledutke ,  Dominic Maier

IPC: B81C1/00 ,  B81B7/00

Abstract: The method comprises fabricating a semiconductor panel comprising a plurality of semiconductor devices, fabricating a cap panel comprising a plurality of caps, bonding the cap panel onto the semiconductor panel so that each one of the caps covers one or more of the semiconductor devices, and singulating the bonded panels into a plurality of semiconductor modules.

公开(公告)号：US20170287880A1

公开(公告)日：2017-10-05

申请号：US15470960

申请日：2017-03-28

Applicant: Infineon Technologies AG

Inventor： Edward Fuergut ,  Holger Doepke ,  Olaf Hohlfeld ,  Michael Juerss

IPC: H01L25/07 ,  H01L23/00 ,  H01L23/29 ,  H01L21/52 ,  H01L21/56

CPC classification number: H01L25/072 ,  H01L21/52 ,  H01L21/563 ,  H01L21/565 ,  H01L23/295 ,  H01L23/3135 ,  H01L23/3142 ,  H01L23/552 ,  H01L23/562 ,  H01L24/05 ,  H01L24/06 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/181 ,  H05K3/282 ,  H05K2201/09872 ,  H05K2203/1377 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

Abstract: A method for fabricating an electronic device package includes providing a carrier, disposing a semiconductor chip onto the carrier, the semiconductor chip having a contact pad on a main face thereof remote from the carrier, applying a contact element onto the contact pad, applying a dielectric layer on the carrier, the semiconductor chip, and the contact element, and applying an encapsulant onto the dielectric layer.

公开(公告)号：US20170125395A1

公开(公告)日：2017-05-04

申请号：US15337733

申请日：2016-10-28

Applicant: Infineon Technologies AG

Inventor： Olaf Hohlfeld ,  Guido Boenig ,  Irmgard Escher-Poeppel ,  Edward Fuergut ,  Martin Gruber ,  Thorsten Meyer

IPC: H01L25/00 ,  H01L25/065 ,  H01L23/14 ,  H01L21/50 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L23/538

CPC classification number: H01L25/50 ,  H01L21/50 ,  H01L21/56 ,  H01L21/561 ,  H01L23/142 ,  H01L23/295 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/5386 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0655 ,  H01L25/072 ,  H01L2021/60015 ,  H01L2021/60022 ,  H01L2021/60277 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/214 ,  H01L2224/291 ,  H01L2224/29139 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/4813 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48245 ,  H01L2224/73267 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/92244 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/10344 ,  H01L2924/1301 ,  H01L2924/13062 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/19107 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2924/014 ,  H01L2224/85399

Abstract: In order to produce a power semiconductor module, a circuit carrier is populated with a semiconductor chip and with an electrically conductive contact element. After populating, the semiconductor chip and the contact element are embedded into a dielectric embedding compound, and the contact element is exposed. In addition, an electrically conductive base layer is produced which electrically contacts the exposed contact element and which bears on the embedding compound and the exposed contact element. A prefabricated metal film is applied to the base layer by means of an electrically conductive connection layer.