公开(公告)号：US20110284265A1

公开(公告)日：2011-11-24

申请号：US13192931

申请日：2011-07-28

Applicant: Tadahiko Sakai ,  Hideki Eifuku ,  Yoshiyuki Wada

Inventor： Tadahiko Sakai ,  Hideki Eifuku ,  Yoshiyuki Wada

IPC: H01B5/00 ,  B23K35/24 ,  B23K1/20

CPC classification number: H05K3/323 ,  B23K35/262 ,  B23K35/3613 ,  B23K35/362 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29311 ,  H01L2224/75252 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/07811 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/10977 ,  H05K2203/0278 ,  H05K2203/0315 ,  H05K2203/0425 ,  H01L2924/00 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2924/00014 ,  H01L2224/29309

Abstract: To provide a components joining method and a components joining structure which can realize joining of components while securing conduction at a low electrical resistance with high reliability.In a construction in which by using a solder paste containing solder particles 5 in a thermosetting resin 3a, a rigid substrate 1 and a flexible substrate 7 are bonded by the thermosetting resin 3a, and a first terminal 2 and a second terminal 8 are electrically connected by the solder particles 5, a blending ratio of an activator of the thermosetting resin 3a in the solder paste is properly set and oxide film removed portions 2b, 8b, and 5b are partially formed in oxide films 2a, 8a, and 5a of the first terminal 2, the second terminal 8, and the solder particles 5. Thereby, the first terminal 2 and the second terminal 8 are electrically conducted by solder bonding the solder particles 5 to both the first terminal 2 and the second terminal 8 via the oxide film removed portions 2b and 8b, and while fusion of the solder particles 5 with each other is prevented in the thermosetting resin 3a, connection of components at a low electrical resistance is realized with high reliability.

Abstract translation: 提供一种部件接合方法和可实现组件接合的部件接合结构，同时以高可靠性确保低电阻下的导通。 在通过使用在热固性树脂3a中含有焊料粒子5的焊膏的情况下，通过热固性树脂3a将刚性基板1和柔性基板7接合，并且将第一端子2和第二端子8电连接 通过焊料颗粒5，适当地设定焊膏中的热固性树脂3a的活化剂的配合比例，并且氧化膜去除部分2b，8b和5b部分地形成在第一 端子2，第二端子8和焊料颗粒5.由此，第一端子2和第二端子8通过将焊料颗粒5通过氧化物膜焊接到第一端子2和第二端子8而进行导电 去除部分2b和8b，并且在热固性树脂3a中防止焊料颗粒5彼此熔化的同时，以高可靠性实现了低电阻下的部件的连接。

公开(公告)号：US08064212B2

公开(公告)日：2011-11-22

申请号：US12233682

申请日：2008-09-19

Applicant: Masami Motegi ,  Masashi Terauchi ,  Takashi Higo

Inventor： Masami Motegi ,  Masashi Terauchi ,  Takashi Higo

IPC: H05K7/00

CPC classification number: H05K3/284 ,  G09G3/296 ,  H05K1/0231 ,  H05K1/053 ,  H05K1/181 ,  H05K2201/10166 ,  H05K2201/10636 ,  H05K2201/10977 ,  H05K2203/1322 ,  Y02P70/611

Abstract: In a hybrid integrated circuit device that uses a metal substrate, a sound noise is prevented, which would otherwise be generated due to transmission, to the metal substrate, of vibration caused when a ceramic capacitor expands and contracts by switching ON and OFF a transistor. For improving a heat dissipation effect, a switching transistor driven by a driving pulse and a ceramic capacitor connected to the switching transistor are incorporated on a conductive path on an insulated metal substrate. Both ends of the ceramic capacitor are fixed to the conductive path by solders which are covered with a hard resin to be protected from a solder crack by thermal expansion of the metal substrate. The ceramic capacitor and the hard resin are wholly covered with a soft resin which absorbs noise due to expansion caused when the ceramic capacitor is switched, so that the metal substrate is prevented from resonating.

Abstract translation: 在使用金属基板的混合集成电路装置中，当陶瓷电容器通过接通和断开晶体管而膨胀和收缩时，防止由于传输而向金属基板产生振动的声音噪声。 为了提高散热效果，由驱动脉冲驱动的开关晶体管和连接到开关晶体管的陶瓷电容器并入绝缘金属基板上的导电路径上。 陶瓷电容器的两端通过被硬质树脂覆盖的焊料固定到导电路径上，以通过金属基板的热膨胀来防止焊料裂纹。 陶瓷电容器和硬树脂完全被柔性树脂覆盖，该软树脂在陶瓷电容器被切换时由于膨胀而吸收噪声，从而防止金属基板发生谐振。

公开(公告)号：US08064028B2

公开(公告)日：2011-11-22

申请号：US11953103

申请日：2007-12-10

Applicant: Shigenori Katayama ,  Tomohide Onogi ,  Kazuhiro Imao

Inventor： Shigenori Katayama ,  Tomohide Onogi ,  Kazuhiro Imao

IPC: G02F1/1345 ,  G02F1/1333

CPC classification number: G02F1/13452 ,  G02F1/136204 ,  G02F2202/023 ,  H01L27/0248 ,  H05K1/0259 ,  H05K1/181 ,  H05K3/284 ,  H05K3/361 ,  H05K2201/10977 ,  H05K2203/304

Abstract: A method for manufacturing an electro-optical device including an element substrate which includes a plurality of pixels including pixel electrodes and which is connected to a circuit board includes providing a UV-curable molding member on the element substrate such that the molding member extends from the element substrate to the circuit board and also includes curing the molding member by irradiating the molding member with UV light. The element substrate includes an electrostatic protection circuit. The electrostatic protection circuit is shielded from the UV light applied to the molding member in the operation of curing the molding member.

Abstract translation: 一种制造包括元件基板的电光装置的方法，该元件基板包括包括像素电极并且连接到电路板的多个像素，包括在元件基板上提供可UV固化的模制构件，使得模制构件从 元件基板连接到电路板，还包括通过用UV光照射模制构件来固化模制构件。 元件基板包括静电保护电路。 在固化成型构件的操作中，静电保护电路与施加到模制构件的UV光屏蔽。

公开(公告)号：US08012801B2

公开(公告)日：2011-09-06

申请号：US12717433

申请日：2010-03-04

Applicant: Seiji Karashima ,  Yoshihisa Yamashita ,  Satoru Tomekawa ,  Takashi Kitae ,  Seiichi Nakatani

Inventor： Seiji Karashima ,  Yoshihisa Yamashita ,  Satoru Tomekawa ,  Takashi Kitae ,  Seiichi Nakatani

IPC: H01L21/00

CPC classification number: H01L21/563 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/1152 ,  H01L2224/131 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/1601 ,  H01L2224/16145 ,  H01L2224/16238 ,  H01L2224/29011 ,  H01L2224/29035 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/293 ,  H01L2224/32052 ,  H01L2224/32145 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/818 ,  H01L2224/83102 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/83886 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/323 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/10977 ,  H05K2203/0278 ,  H05K2203/0425 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/254 ,  Y10T428/31681 ,  H01L2924/00 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/01083 ,  H01L2924/00012 ,  H01L2224/05599

Abstract: A flip chip mounting process includes the steps of supplying a resin (13) containing solder powder and a convection additive (12) onto a wiring substrate (10) having a plurality of electrode terminals (II), then bringing a semiconductor chip (20) having a plurality of connecting terminals (11) into contact with a surface of the supplied resin (13), and then heating the wiring substrate (10) to a temperature that enables the solder powder to melt. The heating step is carried out at a temperature that is higher than the boiling point of the convection additive (12) to allow the boiling convection additive (12) to move within the resin (12). During this heating step, the melted solder powder is allowed to self-assemble into the region between each electrode terminal (11) of the wiring substrate (10) and each connecting terminal (21) of the semiconductor chip to form an electrical connection between each electrode terminal (11) and each connecting terminal (21).

Abstract translation: 倒装芯片安装工艺包括以下步骤：将含有焊料粉末的树脂（13）和对流添加剂（12）提供到具有多个电极端子（II）的布线基板（10）上，然后将半导体芯片（20） 具有与供给的树脂（13）的表面接触的多个连接端子（11），然后将布线基板（10）加热到使焊料粉末熔化的温度。 加热步骤在高于对流添加剂（12）的沸点的温度下进行，以允许沸腾对流添加剂（12）在树脂（12）内移动。 在该加热步骤中，使熔融的焊料粉末自组装到布线基板（10）的每个电极端子（11）与半导体芯片的每个连接端子（21）之间的区域中，以形成每个 电极端子（11）和每个连接端子（21）。

公开(公告)号：US20110180206A1

公开(公告)日：2011-07-28

申请号：US13001024

申请日：2009-07-01

Applicant: Andreas Heinrich Dietzel ,  Jeroen Van Den Brand

Inventor： Andreas Heinrich Dietzel ,  Jeroen Van Den Brand

IPC: H05K1/11 ,  B32B38/04 ,  G02B6/12

CPC classification number: H05K3/361 ,  H05K3/0035 ,  H05K3/321 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4617 ,  H05K3/462 ,  H05K2201/058 ,  H05K2201/09727 ,  H05K2201/09845 ,  H05K2201/10977 ,  H05K2203/063 ,  Y10T156/1056

Abstract: According to one aspect, the invention provides a method of providing conductive structures between two foils in a multi-foil system. The system comprises at least two foils, from which at least one foil comprises a terminal. The method comprises the steps of (in any order) providing at least one solid state adhesive layer, patterning adhesive layer with through-holes; filling the through-holes with conductive material, so as to form the conductive structure, connected to the terminal; and bonding the at least two foils.One advantage of the invention is that it may be used in a manufacturing process for multi-foil systems.

Abstract translation: 根据一个方面，本发明提供了一种在多箔系统中在两个箔之间提供导电结构的方法。 该系统包括至少两个箔，至少一个箔包括一个端子。 该方法包括以下步骤（以任何顺序）提供至少一个固态粘合剂层，图案化具有通孔的粘合剂层; 用导电材料填充通孔，以形成连接到端子的导电结构; 以及接合所述至少两个箔。 本发明的一个优点是可以用于多箔系统的制造过程中。

公开(公告)号：US07985078B2

公开(公告)日：2011-07-26

申请号：US12644571

申请日：2009-12-22

Applicant: Kentaro Kumazawa ,  Masahiro Ono ,  Yoshihiro Tomura

Inventor： Kentaro Kumazawa ,  Masahiro Ono ,  Yoshihiro Tomura

IPC: H01R12/00

CPC classification number: H01R13/52 ,  H05K1/142 ,  H05K3/284 ,  H05K3/361 ,  H05K2201/10977

Abstract: The electrode junction structure includes: a glass substrate; a plurality of flexible substrates, in a planar view, arranged to cross over an edge of the glass substrate and arranged to have a space from each other along the edge; an adhesive for joining the glass substrate and each flexible substrate; and a sealing resin for covering junction portions between the glass substrate and each flexible substrate, wherein an edge of the sealing resin is formed so that the edge of the sealing resin has, in the planar view, a consecutive waveform portion in which a convex portion and a concave portion alternate with an imaginary line as a center axis, the imaginary line being parallel to the edge of the glass substrate and locating outer than the edge of the glass substrate, and wherein the convex portions are formed to be located on the flexible substrates.

Abstract translation: 电极结结构包括：玻璃基板; 多个柔性基板在平面图中布置成跨过玻璃基板的边缘并且被布置成沿着边缘彼此具有空间; 用于接合玻璃基板和每个柔性基板的粘合剂; 以及密封树脂，用于覆盖玻璃基板和每个柔性基板之间的接合部分，其中形成密封树脂的边缘，使得密封树脂的边缘在平面图中具有连续的波形部分，其中凸部 并且与假想线交替的凹部作为中心轴，所述假想线平行于所述玻璃基板的边缘并位于所述玻璃基板的边缘的外侧，并且其中所述凸部形成为位于所述柔性 底物。

公开(公告)号：US07982319B2

公开(公告)日：2011-07-19

申请号：US12637345

申请日：2009-12-14

Applicant: Yoshiharu Ogata

Inventor： Yoshiharu Ogata

IPC: H01L23/52

CPC classification number: H05K3/305 ,  H01L21/563 ,  H01L23/3128 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/29007 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/0271 ,  H05K3/3452 ,  H05K2201/09772 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2924/00014

Abstract: A semiconductor device comprises a wiring substrate including a wiring pattern; a semiconductor chip installed on the wiring substrate, including a plurality of pads formed on a surface of the semiconductor chip, which opposes the wiring substrate; a first resin layer covering over a part of the wiring pattern within a region of overlapping the semiconductor chip; and a second resin layer installed between the semiconductor chip and the first resin layer. The pads are oppose to and coupled with a part of the wiring pattern exposed over the first resin layer; and the linear expansion coefficient of the wiring substrate is larger than that of the semiconductor chip, the elastic modulus of the wiring substrate is lower than that of the semiconductor chip and the linear expansion coefficient of the first resin layer is larger than that of the second resin layer. The elastic modulus of the first resin layer is lower than that of the second resin layer.

Abstract translation: 半导体器件包括：布线基板，其包括布线图案; 安装在所述布线基板上的半导体芯片，包括与所述布线基板相对的形成在所述半导体芯片的表面上的多个焊盘; 覆盖所述布线图案的与所述半导体芯片重叠的区域的一部分上的第一树脂层; 以及安装在半导体芯片和第一树脂层之间的第二树脂层。 焊盘与暴露在第一树脂层上的布线图案的一部分相对并耦合; 并且布线基板的线膨胀系数大于半导体芯片的线膨胀系数，布线基板的弹性模量低于半导体芯片的弹性模量，并且第一树脂层的线膨胀系数大于第二树脂层的线膨胀系数 树脂层。 第一树脂层的弹性模量低于第二树脂层的弹性模量。

公开(公告)号：US07960752B2

公开(公告)日：2011-06-14

申请号：US12896998

申请日：2010-10-04

Applicant: Hiroshi Kobayashi

Inventor： Hiroshi Kobayashi

IPC: H01L33/00 ,  G08B13/14

CPC classification number: H05K1/0271 ,  G06K19/0723 ,  H01L21/563 ,  H01L23/4985 ,  H01L23/49855 ,  H01L24/12 ,  H01L24/29 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/75252 ,  H01L2224/81191 ,  H01L2224/83192 ,  H01L2224/90 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/14 ,  H01L2924/30105 ,  H05K1/189 ,  H05K3/305 ,  H05K3/3494 ,  H05K2201/09781 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2201/2009 ,  H05K2203/0195 ,  H05K2203/0278 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401

Abstract: An RFID tag including a base including a resin material, an antenna pattern disposed on a surface of the base, and a reinforcement pad disposed on the surface of the base. A thermosetting adhesive is applied onto the antenna pattern and the reinforcement pad, and a circuit chip is electrically coupled to the antenna pattern via the thermosetting adhesive. The reinforcement pad is formed within a region where the circuit chip is mounted, and the circuit chip includes a first protrusion contacting the antenna pattern and a second protrusion contacting the reinforcement pad.

Abstract translation: 一种RFID标签，包括具有树脂材料的底座，设置在基座表面上的天线图案以及设置在基座表面上的加强垫。 将热固性粘合剂施加到天线图案和加强垫上，并且电路芯片经由热固性粘合剂电耦合到天线图案。 加强垫形成在安装电路芯片的区域内，电路芯片包括接触天线图案的第一突起和与加强垫接触的第二突起。

公开(公告)号：US07955065B2

公开(公告)日：2011-06-07

申请号：US12020013

申请日：2008-01-25

Applicant: Shuichi Takeuchi

Inventor： Shuichi Takeuchi

IPC: H01L21/56

CPC classification number: H05K3/305 ,  H01L21/563 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2924/00011 ,  H01L2924/00014 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/1527 ,  Y02P70/613 ,  Y10T29/49002 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A resin filling apparatus, a filling method, and a method of manufacturing an electronic device fill a cavity between a substrate and an electronic component mounted on the substrate with resin. The resin filling apparatus includes a stage for supporting the substrate in an inclined state, and an application head for filling the cavity with resin from a lower side of the inclined substrate.

Abstract translation: 树脂填充装置，填充方法和电子装置的制造方法利用树脂填充基板和安装在基板上的电子部件之间的空腔。 树脂填充装置包括用于以倾斜状态支撑基板的台和用于从倾斜基板的下侧用树脂填充空腔的施加头。

公开(公告)号：US20110110050A1

公开(公告)日：2011-05-12

申请号：US12675080

申请日：2008-10-21

Applicant: Shigeaki Sakatani ,  Koso Matsuno ,  Atsushi Yamaguchi ,  Hidenori Miyakawa ,  Mikiya Ueda

Inventor： Shigeaki Sakatani ,  Koso Matsuno ,  Atsushi Yamaguchi ,  Hidenori Miyakawa ,  Mikiya Ueda

IPC: H05K7/00 ,  H05K3/30 ,  H05K1/16 ,  H05K1/00

CPC classification number: H05K3/305 ,  H01L21/563 ,  H01L23/295 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/12044 ,  H01L2924/15151 ,  H01L2924/18301 ,  H05K2201/09036 ,  H05K2201/09072 ,  H05K2201/10545 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2201/10977 ,  Y02P70/613 ,  Y10T29/49139 ,  H01L2924/00

Abstract: A structure with electronic component mounted therein includes a wiring board on which an electronic component is mounted at least on its first face, resin provided at least between the electronic component and the wiring board, and a plurality of holes formed in the wiring board at region corresponding to a mounting position of the electronic component. The holes are filled with the resin. This suppresses warpage of the structure with electronic component mounted therein, and also improves reliability by reducing a stress applied to a bonding section between the wiring board and the electronic component.

Abstract translation: 安装有电子部件的结构包括：至少在其第一面上安装有电子部件的布线基板，至少设置在电子部件和布线基板之间的树脂，以及在布线基板上形成的多个孔 对应于电子部件的安装位置。 孔用树脂填充。 这抑制了安装有电子部件的结构的翘曲，并且还通过减小施加到布线板和电子部件之间的接合部的应力来提高可靠性。