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    ELECTRICAL INTERCONNECT IC DEVICE SOCKET
    7.
    发明申请
    ELECTRICAL INTERCONNECT IC DEVICE SOCKET 有权
    电气互连IC器件插座

    公开(公告)号：US20130206468A1

    公开(公告)日：2013-08-15

    申请号：US13880461

    申请日：2011-12-05

    申请人： James Rathburn

    发明人： James Rathburn

    IPC分类号： H05K1/02 ,  H05K3/40

    CPC分类号： H05K1/0228 ,  H01R43/0256 ,  H05K1/0296 ,  H05K1/141 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/40 ,  H05K3/4046 ,  H05K2201/10378 ,  H05K2203/041 ,  Y10T29/49147

    摘要： A surface mount electrical interconnect is disclosed that provides an interface between a PCB and solder balls of a BGA device. The electrical interconnect includes a socket substrate and a plurality of electrically conductive contact members. The socket substrate has a first layer with a plurality of openings configured to receive solder balls of the BGA device and has a second layer with a plurality of slots defined therethrough that correspond to the plurality of openings. The contact members may be disposed in the openings in the first layer and through the plurality of slots of the second layer of the socket substrate. The contact members can be configured to engage a top portion, a center diameter, and a lower portion of the solder ball of the BGA device. Each contact member electrically couples a solder ball on the BGA device to the PCB.

    摘要翻译： 公开了一种表面贴装电互连，其提供了PCB与BGA器件的焊球之间的界面。 电互连包括插座衬底和多个导电接触构件。 插座衬底具有第一层，其具有多个开口，其被配置为接收BGA器件的焊球，并且具有第二层，其中限定了多个槽，其对应于多个开口。 接触构件可以设置在第一层中的开口中并且穿过插座衬底的第二层的多个槽中。 接触构件可以构造成接合BGA装置的焊球的顶部，中心直径和下部。 每个接触构件将BGA器件上的焊球电耦合到PCB。

    BUMPED SEMICONDUCTOR WAFER OR DIE LEVEL ELECTRICAL INTERCONNECT
    8.
    发明申请
    BUMPED SEMICONDUCTOR WAFER OR DIE LEVEL ELECTRICAL INTERCONNECT 有权
    保护半导体波形或电源电气互连

    公开(公告)号：US20120182035A1

    公开(公告)日：2012-07-19

    申请号：US13413032

    申请日：2012-03-06

    申请人： JAMES RATHBURN

    发明人： JAMES RATHBURN

    IPC分类号： G01R31/20

    CPC分类号： G01R31/2889

    摘要： A probe assembly that acts as a temporary interconnect between terminals on an IC device and a test station. The probe assembly includes a plurality of stud bumps arranged on a first surface of a substrate in a configuration corresponding to the terminal on the IC device. The stud bumps include a shape adapted to temporarily couple with the terminals on the IC device. A plurality of conductive traces on the substrate electrically couple the stud bumps with the test station.

    摘要翻译： 探针组件，用作IC器件和测试台之间的端子之间的临时互连。 探针组件包括布置在基板的第一表面上的多个突起凸块，其配置对应于IC器件上的端子。 螺柱凸块包括适于临时与IC器件上的端子连接的形状。 基板上的多个导电迹线使柱形突起与测试台电耦合。

    SEMICONDUCTOR SOCKET
    9.
    发明申请
    SEMICONDUCTOR SOCKET 有权
    半导体插座

    公开(公告)号：US20120051016A1

    公开(公告)日：2012-03-01

    申请号：US13319158

    申请日：2010-06-15

    申请人： James Rathburn

    发明人： James Rathburn

    IPC分类号： H05K7/00 ,  H01R9/00 ,  H05K1/11

    CPC分类号： H05K1/141 ,  H01R12/52 ,  H01R12/57 ,  H05K3/3436 ,  H05K2201/0311 ,  H05K2201/049 ,  H05K2201/10295 ,  H05K2201/10719 ,  Y10T29/49139 ,  Y10T29/49147

    摘要： A semiconductor socket including a substrate with a plurality of through holes extending from a first surface to a second surface. A plurality of discrete contact members are located in the plurality of the through holes. The plurality of contact members each include a proximal end accessible from the second surface, and a distal end extending above the first surface. At least one dielectric layer is bonded to the second surface of the substrate with recesses corresponding to target circuit geometry. A conductive material deposited in at least a portion of the recesses to form conductive traces redistributing terminal pitch of the proximal ends of the contact members.

    摘要翻译： 一种半导体插座，包括具有从第一表面延伸到第二表面的多个通孔的基板。 多个离散接触构件位于多个通孔中。 多个接触构件各自包括可从第二表面接近的近端和在第一表面上方延伸的远端。 至少一个电介质层与基板的第二表面结合，其凹部对应于目标电路几何形状。 沉积在至少一部分凹陷中的导电材料以形成重新分布接触构件的近端的端子间距的导电迹线。

    COMPLIANT PRINTED CIRCUIT PERIPHERAL LEAD SEMICONDUCTOR TEST SOCKET
    10.
    发明申请
    COMPLIANT PRINTED CIRCUIT PERIPHERAL LEAD SEMICONDUCTOR TEST SOCKET 有权
    合格打印电路外围引线半导体测试插座

    公开(公告)号：US20120049877A1

    公开(公告)日：2012-03-01

    申请号：US13318171

    申请日：2010-05-27

    申请人： James Rathburn

    发明人： James Rathburn

    IPC分类号： G01R31/00 ,  H05K3/00

    CPC分类号： G01R1/0483 ,  G01R1/0466 ,  H05K7/1061

    摘要： A test socket that provides a temporary interconnect between terminals on an integrated circuit (IC) device and contact pads on a test printed circuit board (PCB). The test socket includes a compliant printed circuit and a socket housing. The compliant printed circuit includes at least one compliant layer, a plurality of first contact members located along a first major surface, a plurality of second contact members located along a second major surface, and a plurality of conductive traces electrically coupling the first and second contact members. The compliant layer is positioned to bias the first contact members against the terminals on the IC device and the second contact members against contact pads on the test PCB. The socket housing is coupled to the compliant printed circuit so the first contact members are positioned in a recess of the socket housing sized to receive the IC device.

    摘要翻译： 一个测试插座，用于在集成电路（IC）器件的端子和测试印刷电路板（PCB）上的接触焊盘之间提供临时互连。 测试插座包括兼容印刷电路和插座外壳。 柔性印刷电路包括至少一个柔性层，沿着第一主表面定位的多个第一接触构件，沿着第二主表面定位的多个第二接触构件，以及多个导电迹线，电耦合第一和第二接触 会员 柔性层被定位成将第一接触构件抵靠在IC器件上的端子上，并且第二接触构件抵抗测试PCB上的接触焊盘。 插座壳体耦合到柔性印刷电路，使得第一接触构件位于插座壳体的凹部中，其尺寸设置成接收IC器件。