公开(公告)号：US07911017B1

公开(公告)日：2011-03-22

申请号：US12459536

申请日：2009-07-02

申请人： Arsenio de Guzman ,  Robert F. Darveaux ,  Young Ho Kim

发明人： Arsenio de Guzman ,  Robert F. Darveaux ,  Young Ho Kim

IPC分类号： H01L23/02 ,  H01L27/146 ,  H01L31/101 ,  H01L31/0203 ,  H01L31/113

CPC分类号： G02B7/021 ,  G02B7/023 ,  G02B13/001 ,  H01L27/14618 ,  H01L27/14625 ,  H01L27/14685 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15311 ,  H04N5/2254 ,  H04N5/2257 ,  H01L2924/00014 ,  H01L2924/00

摘要： An optical module includes an image sensor having an active area and a window mounted directly to the image sensor above the active area. The optical module further includes a mount mounted to the window, the mount supporting a barrel having a lens assembly. By mounting the window directly to the image sensor and the mount directly to the window, the substrate surface area of the optical module is minimized.

摘要翻译： 光学模块包括具有活动区域的图像传感器和直接安装在有源区域上方的图像传感器的窗口。 光学模块还包括安装到窗户的安装座，该安装件支撑具有透镜组件的镜筒。 通过将窗口直接安装到图像传感器和安装件直接连接到窗户，光学模块的基板表面区域被最小化。

公开(公告)号：US07576401B1

公开(公告)日：2009-08-18

申请号：US11177904

申请日：2005-07-07

申请人： Arsenio de Guzman ,  Robert F. Darveaux ,  Young Ho Kim

发明人： Arsenio de Guzman ,  Robert F. Darveaux ,  Young Ho Kim

IPC分类号： H01L31/02 ,  H01L27/146 ,  H01L31/101 ,  H01L31/0203 ,  H01L31/113 ,  G02B7/00 ,  G02B7/02

CPC分类号： G02B7/021 ,  G02B7/023 ,  G02B13/001 ,  H01L27/14618 ,  H01L27/14625 ,  H01L27/14685 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15311 ,  H04N5/2254 ,  H04N5/2257 ,  H01L2924/00014 ,  H01L2924/00

摘要： An optical module includes an image sensor having an active area and a window mounted directly to the image sensor above the active area. The optical module further includes a mount mounted to the window, the mount supporting a barrel having a lens assembly. By mounting the window directly to the image sensor and the mount directly to the window, the substrate surface area of the optical module is minimized.

摘要翻译： 光学模块包括具有活动区域的图像传感器和直接安装在有源区域上方的图像传感器的窗口。 光学模块还包括安装到窗户的安装座，该安装件支撑具有透镜组件的镜筒。 通过将窗口直接安装到图像传感器和安装件直接连接到窗户，光学模块的基板表面区域被最小化。

公开(公告)号：US08365611B1

公开(公告)日：2013-02-05

申请号：US12627484

申请日：2009-11-30

申请人： Robert F. Darveaux ,  Christopher J. Berry

发明人： Robert F. Darveaux ,  Christopher J. Berry

IPC分类号： G01N3/32 ,  G01N3/00 ,  G01R31/02 ,  G01R27/28

CPC分类号： G01R31/2642 ,  G01N3/32 ,  G01N2203/0023 ,  G01N2203/0226 ,  G01R31/2875 ,  G01R31/2881

摘要： A bend test method includes bending a flip chip device into a bent configuration, heating the flip chip device, and inspecting the flip chip device for failure. The bend test method is completed in a relatively short amount of time, e.g., within one to three days. Thus, appropriate failure modes in flip chip devices are created in an accelerated manner so that reliability assessment of various flip chip device designs, materials, and process options can be completed in a few days instead of a few months. This greatly reduced development cycle time typically results in a larger market share for new flip chip device products.

摘要翻译： 弯曲测试方法包括将倒装芯片器件弯曲成弯曲配置，加热倒装芯片器件，以及检查倒装芯片器件是否发生故障。 弯曲测试方法在相对较短的时间内完成，例如在一到三天之内。 因此，以加速的方式创建倒装芯片器件中的适当故障模式，从而可以在几天而不是几个月内完成各种倒装芯片器件设计，材料和工艺选项的可靠性评估。 这大大减少了开发周期的时间通常会为新的倒装芯片设备产品带来更大的市场份额。

公开(公告)号：US08129824B1

公开(公告)日：2012-03-06

申请号：US12327716

申请日：2008-12-03

申请人： Roger D. St. Amand ,  Nozad O. Karim ,  Joseph M. Longo ,  Lee J. Smith ,  Robert F. Darveaux ,  Jong Ok Chun ,  Jingkun Mao

发明人： Roger D. St. Amand ,  Nozad O. Karim ,  Joseph M. Longo ,  Lee J. Smith ,  Robert F. Darveaux ,  Jong Ok Chun ,  Jingkun Mao

IPC分类号： H01L27/10

CPC分类号： H01L25/0657 ,  H01L23/552 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06541 ,  H01L2225/06558 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/207 ,  H01L2224/05599

摘要： A semiconductor device has a substrate. A first die is electrically attached to a first surface of the substrate. A shield spacer having a first and second surface is provided wherein the second surface of the shield spacer is attached to a first surface of the first die. A plurality of wirebonds are attached to the shield spacer and to the substrate. A mold compound is provided for encapsulating the first die, the shield spacer, and the wirebonds.

摘要翻译： 半导体器件具有基板。 第一裸片电连接至基片的第一表面。 提供具有第一和第二表面的屏蔽间隔件，其中屏蔽间隔件的第二表面附接到第一管芯的第一表面。 多个引线附接到屏蔽间隔件和基板。 提供了一种模制化合物，用于封装第一模具，屏蔽间隔件和引线键合。

公开(公告)号：US5552636A

公开(公告)日：1996-09-03

申请号：US345979

申请日：1994-11-28

申请人： Robert F. Darveaux

发明人： Robert F. Darveaux

IPC分类号： H01L23/32 ,  H01L23/367 ,  H01L23/043 ,  H01L23/10

CPC分类号： H01L23/32 ,  H01L23/3675 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/3011 ,  Y10S257/924

摘要： A discrete element electronic package (100) includes a heat spreader (180) with a cavity (185) for receiving a substrate (110), a substrate (110) mounted within the cavity (185) of the heat spreader (180), a heat-generating semiconductor device (170), such as a power transistor (170), mounted on the substrate (110), and electrical connectors (140) located on the substrate (110) to provide an electrical interface to the semiconductor device (170).

摘要翻译： 分立元件电子封装（100）包括散热器（180），其具有用于接收基板（110）的空腔（185），安装在散热器（180）的空腔（185）内的基板（110） 安装在基板（110）上的诸如功率晶体管（170）的发热半导体器件（170）和位于基板（110）上的电连接器（140）以提供到半导体器件（170）的电接口 ）。

公开(公告)号：US06400033B1

公开(公告)日：2002-06-04

申请号：US09585506

申请日：2000-06-01

申请人： Robert F. Darveaux

发明人： Robert F. Darveaux

IPC分类号： H01L2940

CPC分类号： H01L24/81 ,  H01L23/10 ,  H01L24/75 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/303 ,  H05K3/3436 ,  H05K2201/10568 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2201/2036 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/0401

摘要： A method and apparatus for reinforcing the solder connections between a semiconductor device and a substrate includes the provision of a rigid frame having a central opening through it, a planar top surface, a bottom surface opposite and parallel to the top surface, and a thickness between the two surfaces to equal to the height of the solder connections. The top surface of the frame is attached to the bottom surface of the semiconductor device at the peripheral edges thereof and outside of a plurality of input/output terminals thereon. The bottom surface of the frame is attached to the top surface of the substrate. The frame reinforces the solder connections between a C4-mounted semiconductor die or a C5-mounted semiconductor package and a substrate against the stresses acting on the connections with bending of the PCB.

摘要翻译： 一种用于加强半导体器件和衬底之间的焊料连接的方法和装置包括提供刚性框架，其具有通过其的中心开口，平面顶表面，与顶表面相对并平行的底表面， 两个表面等于焊料连接的高度。 框架的顶面在其外围边缘处和其上的多个输入/输出端子的外部附接到半导体器件的底表面。 框架的底面附着到基板的顶面。 该框架加强了C4安装的半导体管芯或C5安装的半导体封装和基板之间的焊接连接，以抵抗作用在PCB上弯曲的连接上的应力。

公开(公告)号：US6124637A

公开(公告)日：2000-09-26

申请号：US161189

申请日：1998-09-25

申请人： Bruce J. Freyman ,  Robert F. Darveaux

发明人： Bruce J. Freyman ,  Robert F. Darveaux

IPC分类号： H01L23/12 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498

CPC分类号： H01L23/3128 ,  H01L23/49816 ,  H01L23/4985 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/854 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181

摘要： A grid array assembly method and apparatus uses a flex circuitry substrate and includes providing a series of conforming flex circuitry substrates, the flex circuitry substrates include bonding pads and metallization on a first surface and, holes in the substrate which define a contact pad array on the opposite surface. The substrates are tested and acceptable, then mounted on a carrier strip with longitudinally aligned apertures. The carrier strip is typically a metal such as copper. The strip with mounted substrates is then passed to a station where an IC die is mounted on the substrate first surfaces wire bonds are placed from the die to the bonding pads, and the assembly is encapsulated by auto-molding to form a package body. Subsequently, interconnecting bumps are placed on the contact pads and the assembly is removed from the strip.

摘要翻译： 栅格阵列组装方法和装置使用柔性电路衬底并且包括提供一系列一致的柔性电路衬底，所述柔性电路衬底包括在第一表面上的接合焊盘和金属化，以及在所述衬底中的在所述衬底上界定接触焊盘阵列的孔 相反的表面。 基板被测试和可接受，然后安装在具有纵向对齐的孔的载体条上。 载体条通常是诸如铜的金属。 然后将带有安装的基板的条带传送到其中IC芯片安装在基板上的工位，第一表面上，引线从管芯放置到焊盘，并且通过自动模制来封装组件以形成封装体。 随后，将互连凸块放置在接触垫上，并将组件从带上移除。

公开(公告)号：US5152451A

公开(公告)日：1992-10-06

申请号：US678410

申请日：1991-04-01

申请人： Robert F. Darveaux ,  Kingshuk Banerji ,  Francisco da Costa Alves

发明人： Robert F. Darveaux ,  Kingshuk Banerji ,  Francisco da Costa Alves

IPC分类号： B23K1/20 ,  H05K3/34

CPC分类号： B23K1/20 ,  H05K3/3415 ,  H05K3/3442 ,  H05K3/3457 ,  B23K2201/42 ,  H05K2201/10636 ,  H05K2203/0315 ,  H05K2203/0485 ,  H05K2203/1105 ,  H05K2203/1476 ,  H05K2203/1572 ,  H05K3/3473 ,  H05K3/3489 ,  Y02P70/611 ,  Y02P70/613

摘要： A method of soldering leadless components to a printed circuit board without using solder paste is disclosed. A thick layer of solder (42) is plated onto a printed circuit board (40), and an oxide layer (43) is formed by heating. Solder flux (45) is applied to those solder pads that are intended to be reflowed, and components (54) are placed. The printed circuit board is heated, and a solder joint (68) is effected between the components (54) and the circuit board (40), while the unfluxed solder pads (66) do not reflow and remain flat. Solder flux is then applied to the remaining solder pads (66) on the same or the opposite side of the circuit board. Additional components (77) are placed, and the circuit board (40) is reflowed a second time.

摘要翻译： 公开了一种将无铅组件焊接到印刷电路板而不使用焊膏的方法。 将厚的焊料层（42）电镀在印刷电路板（40）上，通过加热形成氧化物层（43）。 焊接焊剂（45）被施加到要被回流的那些焊盘，并且部件（54）被放置。 印刷电路板被加热，并且在组件（54）和电路板（40）之间实现焊接接头（68），而未焊接的焊盘（66）不回流并保持平坦。 然后将焊剂焊剂施加到电路板的相同或相对侧上的剩余焊盘（66）。 放置附加部件（77），并且电路板（40）第二次回流。

公开(公告)号：US07923645B1

公开(公告)日：2011-04-12

申请号：US11765806

申请日：2007-06-20

申请人： Ronald Patrick Huemoeller ,  Sukianto Rusli ,  Robert F. Darveaux

发明人： Ronald Patrick Huemoeller ,  Sukianto Rusli ,  Robert F. Darveaux

IPC分类号： H05K1/03

CPC分类号： H05K3/428 ,  H01L2224/48091 ,  H05K1/185 ,  H05K3/205 ,  H05K3/421 ,  H05K3/4658 ,  H05K2201/0394 ,  H05K2201/10674 ,  H05K2203/0361 ,  H05K2203/0384 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49204 ,  Y10T29/49222 ,  H01L2924/00014

摘要： A first patterned etch stop layer and a first patterned conductor layer are laminated by a dielectric material to a second patterned etch stop layer and a second patterned conductor layer. As the etch stop metal of the first and second patterned etch stop layers is selectively etchable compared to a conductor metal of the first and second patterned conductor layers, the first and second patterned etch stop layers provide an etch stop for substrate formation etch processes. In this manner, etching of the first and second patterned conductor layers is avoided insuring that impedance is controlled to within tight tolerance.

摘要翻译： 第一图案化蚀刻停止层和第一图案化导体层通过电介质材料层压到第二图案化蚀刻停止层和第二图案化导体层。 由于与第一和第二图案化导体层的导体金属相比，第一和第二图案化蚀刻停止层的蚀刻停止金属是可选择的可蚀刻的，所以第一和第二图案化蚀刻停止层提供用于衬底形成蚀刻工艺的蚀刻停止。 以这种方式，避免了第一和第二图案化导体层的蚀刻，确保阻抗被控制在紧密公差内。

公开(公告)号：US07253503B1

公开(公告)日：2007-08-07

申请号：US10986634

申请日：2004-11-12

申请人： James M. Fusaro ,  Robert F. Darveaux ,  Pablo Rodriguez

发明人： James M. Fusaro ,  Robert F. Darveaux ,  Pablo Rodriguez

IPC分类号： H01L23/495

CPC分类号： H01L23/66 ,  H01L23/3121 ,  H01L24/28 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/40 ,  H01L2224/45 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48 ,  H01L2224/48091 ,  H01L2224/48195 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012

摘要： Integrated circuit device packages and substrates for making the packages are disclosed. One embodiment of a substrate includes a planar sheet of polyimide having a first surface, an opposite second surface, and apertures between the first and second surfaces. A planar metal die pad and planar metal are attached to the second surface of the polyimide sheet. The apertures in the polyimide sheet are juxtaposed to the leads. A package made using the substrate includes an integrated circuit device mounted above the first surface of the polyimide sheet opposite the die pad. Bond wires are connected between the integrated circuit device and the leads through the apertures in the polyimide sheet. An encapsulant material covers the first surface of the polyimide sheet, the integrated circuit device, the bone wires, and the apertures. The die pad and leads are exposed at an exterior surface of the package.

摘要翻译： 公开了用于制造封装的集成电路器件封装和衬底。 衬底的一个实施例包括具有第一表面，相对的第二表面以及第一和第二表面之间的孔的聚酰亚胺的平面片。 平面金属管芯焊盘和平面金属附接到聚酰亚胺片的第二表面。 聚酰亚胺片中的孔与引线并列。 使用该基板制成的封装包括集成电路装置，安装在与芯片衬垫相对的聚酰亚胺片的第一表面上方。 接合线通过聚酰亚胺片中的孔连接在集成电路器件和引线之间。 密封剂材料覆盖聚酰亚胺片的第一表面，集成电路器件，骨线和孔。 芯片焊盘和引线暴露在封装的外表面。