Plasma cleaning of a CVD or etch reactor using a low or mixed frequency
excitation field
    1.
    发明授权
    Plasma cleaning of a CVD or etch reactor using a low or mixed frequency excitation field 失效
    使用低或混合频率激发场的CVD或蚀刻反应器的等离子体清洁

    公开(公告)号:US5882424A

    公开(公告)日:1999-03-16

    申请号:US786604

    申请日:1997-01-21

    摘要: An apparatus and method for cleaning the interior of a vacuum chamber of a plasma reactor which includes introducing an etchant gas through inlet ports into the vacuum chamber and applying RF power to a RF plasma excitation apparatus so as to ignite and sustain a plasma within the chamber. The frequency of the RF signal is less than 1 MHz. Alternately, an apparatus and method for cleaning the aforementioned vacuum chamber where at least two different RF power signals can be employed. In one embodiment of this alternate method the step of applying RF power involves providing a first and second RF signal, where each signal exhibits a different frequency. The first RF signal is of a higher frequency and provided to ignite a plasma within the chamber, and thereafter terminated, whereas the second RF signal is of a lower frequency, less than 1 MHz, and provided to sustain the plasma. In another embodiment, the step of applying RF power again comprises providing separate RF signals, where each signal exhibits a different frequency. However, in this embodiment, the signals are used to generate a mixed frequency RF excitation field from the RF plasma excitation apparatus to ignite and sustain a plasma within the chamber. Here again, the first RF signal is of a higher frequency and the second RF signal is of a lower frequency, i.e. less than 1 MHz.

    摘要翻译: 一种用于清洁等离子体反应器的真空室的内部的装置和方法,其包括将蚀刻剂气体通过入口引入真空室中,并将RF功率施加到RF等离子体激发装置,以便点燃和维持腔室内的等离子体 。 RF信号的频率小于1MHz。 或者,用于清洁上述真空室的装置和方法,其中可以采用至少两个不同的RF功率信号。 在该替代方法的一个实施例中,施加RF功率的步骤涉及提供第一和第二RF信号,其中每个信号呈现不同的频率。 第一RF信号具有较高的频率并被提供以点燃室内的等离子体,然后终止,而第二RF信号具有小于1MHz的较低频率,并被提供以维持等离子体。 在另一个实施例中,再次施加RF功率的步骤包括提供单独的RF信号,其中每个信号呈现不同的频率。 然而,在本实施例中,信号用于从RF等离子体激发装置产生混频RF激励场,以点燃和维持室内的等离子体。 这里再次,第一RF信号具有较高频率,第二RF信号具有较低频率,即小于1MHz。

    INTEGRATED TOOL SETS AND PROCESS TO KEEP SUBSTRATE SURFACE WET DURING PLATING AND CLEAN IN FABRICATION OF ADVANCED NANO-ELECTRONIC DEVICES
    4.
    发明申请
    INTEGRATED TOOL SETS AND PROCESS TO KEEP SUBSTRATE SURFACE WET DURING PLATING AND CLEAN IN FABRICATION OF ADVANCED NANO-ELECTRONIC DEVICES 审中-公开
    综合工具集和工艺在高级纳米电子设备制造过程中保护基底表面湿润清洗和清洁

    公开(公告)号:US20110143553A1

    公开(公告)日:2011-06-16

    申请号:US12965765

    申请日:2010-12-10

    摘要: Methods and systems for handling a substrate through processes including an integrated electroless deposition process includes processing a surface of the substrate in an electroless deposition module to deposit a layer over conductive features of the substrate using a deposition fluid. The surface of the substrate is then rinsed in the electroless deposition module with a rinsing fluid. The rinsing is controlled to prevent de-wetting of the surface so that a transfer film defined from the rinsing fluid remains coated over the surface of the substrate. The substrate is removed from the electroless deposition module while maintaining the transfer film over the surface of the substrate. The transfer film over the surface of the substrate prevents drying of the surface of the substrate so that the removing is wet. The substrate, once removed from the electroless deposition module, is moved into a post-deposition module while maintaining the transfer film over the surface of the substrate.

    摘要翻译: 用于通过包括集成无电沉积工艺的工艺处理衬底的方法和系统包括在无电沉积模块中处理衬底的表面以使用沉积流体在衬底的导电特征上沉积层。 然后用清洗液在无电沉积模块中冲洗基材的表面。 控制冲洗以防止表面的脱湿,使得从冲洗流体限定的转印膜保持涂覆在基材的表面上。 将基底从无电沉积模块移除,同时将转印膜保持在衬底的表面上。 衬底表面上的转印膜防止了衬底表面的干燥,使得去除被弄湿。 一旦从无电镀沉积模块中取出的衬底被移动到后沉积模块中,同时将转印膜保持在衬底的表面上。

    Methods of Fabricating a Barrier Layer Over Interconnect Structures in Atomic Deposition Environments
    5.
    发明申请
    Methods of Fabricating a Barrier Layer Over Interconnect Structures in Atomic Deposition Environments 审中-公开
    在原子沉积环境中互连结构上形成阻挡层的方法

    公开(公告)号:US20110065273A1

    公开(公告)日:2011-03-17

    申请号:US12950952

    申请日:2010-11-19

    IPC分类号: H01L21/768

    摘要: Methods of depositing a barrier layer on an interconnect structure in an atomic deposition environment are provided. One method includes depositing a barrier layer on the interconnect structure with a first nitrogen concentration during a first phase of deposition in the atomic deposition environment, The interconnect structure is formed in a dielectric layer. Then, continuing the deposition of the barrier layer on the interconnect structure with a second nitrogen concentration during a second phase deposition in the atomic deposition environment. The nitrogen concentration step-wisely decreases from the first nitrogen concentration in the first phase of the barrier layer to the second nitrogen concentration in the second phase of the barrier layer, and the first nitrogen concentration is highest where the barrier layer is in contact with the dielectric layer. A copper layer is then formed over the barrier layer, such that a nitrogen concentration in the barrier layer is lowest where the barrier layer is in contact with the copper layer.

    摘要翻译: 提供了在原子沉积环境中在互连结构上沉积势垒层的方法。 一种方法包括在原子沉积环境中的第一沉积阶段期间,在互连结构上沉积具有第一氮浓度的阻挡层。互连结构形成在电介质层中。 然后,在原子沉积环境中的第二相沉积期间,继续以互补结构沉积第二氮浓度。 氮浓度从势垒层的第一相中的第一氮浓度逐渐降低到阻挡层的第二相中的第二氮浓度,并且第一氮浓度最高,其中阻挡层与 电介质层。 然后在阻挡层上形成铜层,使阻挡层中的氮浓度最低,其中阻挡层与铜层接触。

    Methods and systems for low interfacial oxide contact between barrier and copper metallization
    6.
    发明授权
    Methods and systems for low interfacial oxide contact between barrier and copper metallization 有权
    屏障和铜金属化之间的低界面氧化物接触的方法和系统

    公开(公告)号:US07749893B2

    公开(公告)日:2010-07-06

    申请号:US11641361

    申请日:2006-12-18

    IPC分类号: H01L21/4763

    摘要: The present invention relates to methods and systems for the metallization of semiconductor devices. One aspect of the present invention is a method of depositing a copper layer onto a barrier layer so as to produce a substantially oxygen free interface therebetween. In one embodiment, the method includes providing a substantially oxide free surface of the barrier layer. The method also includes depositing an amount of atomic layer deposition (ALD) copper on the oxide free surface of the barrier layer effective to prevent oxidation of the barrier layer. The method further includes depositing a gapfill copper layer over the ALD copper. Another aspect of the present invention is a system for depositing a copper layer onto barrier layer so as to produce a substantially oxygen-free interface therebetween. In one embodiment, the integrated system includes at least one barrier deposition module. The system also includes an ALD copper deposition module configured to deposit copper by atomic layer deposition. The system further includes a copper gapfill module and at least one transfer module coupled to the at least one barrier deposition module and to the ALD copper deposition module. The transfer module is configured so that the substrate can be transferred between the modules substantially without exposure to an oxide-forming environment.

    摘要翻译: 本发明涉及用于半导体器件金属化的方法和系统。 本发明的一个方面是将铜层沉积在阻挡层上以在其间产生基本上无氧的界面的方法。 在一个实施例中,该方法包括提供阻挡层的基本上无氧化物的表面。 该方法还包括在阻挡层的无氧化物表面上沉积一定量的原子层沉积(ALD)铜,以有效地防止阻挡层的氧化。 该方法还包括在ALD铜上沉积间隙填充铜层。 本发明的另一方面是一种用于在阻挡层上沉积铜层以在其间产生基本上无氧的界面的系统。 在一个实施例中,集成系统包括至少一个阻挡层沉积模块。 该系统还包括配置为通过原子层沉积沉积铜的ALD铜沉积模块。 该系统还包括铜间隙填充模块和耦合到至少一个阻挡层沉积模块和ALD铜沉积模块的至少一个传输模块。 转移模块被配置为使得基板可以在基本上不暴露于氧化物形成环境的基础之间传递。

    Wafer edge surface treatment with liquid meniscus
    7.
    发明授权
    Wafer edge surface treatment with liquid meniscus 失效
    晶圆边缘表面处理液体半月板

    公开(公告)号:US07584761B1

    公开(公告)日:2009-09-08

    申请号:US11292465

    申请日:2005-12-02

    IPC分类号: B08B3/00

    摘要: A method for cleaning an edge surface of a semiconductor substrate is disclosed. The proximity head unit is positioned so that the flow head portion and the collection head portion of the proximity head unit are proximate to the edge surface of the semiconductor substrate. The semiconductor substrate is then rotated using one or more powered rollers. During the rotation of the semiconductor substrate, the flow head portion applies a fluid to the edge surface while the collection head portion collects fluid from the edge surface. Additional methods, an apparatuses, and a system for cleaning an edge surface of a semiconductor substrate are also described.

    摘要翻译: 公开了一种用于清洁半导体衬底的边缘表面的方法。 邻近头单元被定位成使得接近头单元的流动头部分和收集头部分靠近半导体衬底的边缘表面。 然后使用一个或多个动力辊旋转半导体衬底。 在半导体基板旋转期间,流动头部向边缘表面施加流体,而收集头部分从边缘表面收集流体。 还描述了另外的方法,装置和用于清洁半导体衬底的边缘表面的系统。

    Apparatus and method for confined area planarization
    8.
    发明申请
    Apparatus and method for confined area planarization 有权
    限制区域平面化的装置和方法

    公开(公告)号:US20070227656A1

    公开(公告)日:2007-10-04

    申请号:US11395881

    申请日:2006-03-31

    IPC分类号: H01L21/461 H01L21/306

    CPC分类号: H01L21/32115 C25F7/00

    摘要: A proximity head and associated method of use is provided for performing confined area planarization of a semiconductor wafer. The proximity head includes a chamber defined to maintain an electrolyte solution. A cathode is disposed within the chamber in exposure to the electrolyte solution. A cation exchange membrane is disposed over a lower opening of the chamber. A top surface of the cation exchange membrane is in direct exposure to the electrolyte solution to be maintained within the chamber. A fluid supply channel is defined to expel fluid at a location adjacent to a lower surface of the cation exchange membrane. A vacuum channel is defined to provide suction at a location adjacent to the lower surface of the cation exchange membrane, such that the fluid to be expelled from the fluid supply channel is made to flow over the lower surface of the cation exchange membrane.

    摘要翻译: 提供接近头和相关联的使用方法用于执行半导体晶片的限定区域平坦化。 邻近头包括限定为维持电解质溶液的室。 在室内暴露于电解质溶液中设置阴极。 阳离子交换膜设置在室的下部开口的上方。 阳离子交换膜的顶表面直接暴露于电解质溶液中以保持在室内。 流体供应通道被定义为在邻近阳离子交换膜的下表面的位置排出流体。 定义真空通道以在邻近阳离子交换膜的下表面的位置处提供吸力,使得要从流体供应通道排出的流体流过阳离子交换膜的下表面。

    Advanced electrolytic polish (AEP) assisted metal wafer planarization method and apparatus
    10.
    发明授权
    Advanced electrolytic polish (AEP) assisted metal wafer planarization method and apparatus 失效
    先进的电解抛光(AEP)辅助金属晶圆平面化方法和装置

    公开(公告)号:US06299741B1

    公开(公告)日:2001-10-09

    申请号:US09450858

    申请日:1999-11-29

    IPC分类号: C25D1700

    CPC分类号: H01L21/3212 H01L21/32115

    摘要: In advanced electrolytic polish (AEP) method, a metal wafer (10) acts as an anodic electrodes and another metal plate (65) is used as a cathodic electrode. A voltage differential is applied to the anode and cathode under a predetermined anodic dissolution current density. This causes a reaction that provides a planarized surface on the metal wafers. Additives are included in the electrolyte solution (55) which adsorb onto the wafer surface urging a higher removal rate at higher spots and a lower removal rate at lower spots. Also, in another embodiment of the present invention is a pulsed-electrolytic process (260) in which positive and negative potentials are applied to the anodic and cathodic electrodes alternately, further encouraging surface planarization.

    摘要翻译: 在高级电解抛光(AEP)方法中,金属晶片(10)用作阳极电极,另一金属板(65)用作阴极电极。 在预定的阳极溶解电流密度下,对阳极和阴极施加电压差。 这导致在金属晶片上提供平坦化表面的反应。 添加剂被包括在吸附在晶片表面上的电解质溶液(55)中,促使较高点处的更高的去除率和较低的去除率降低。 此外,在本发明的另一实施例中,脉冲电解方法(260)其中正电位和负电位交替地施加到阳极和阴极电极,进一步促进了表面平坦化。