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公开(公告)号:US08865585B2
公开(公告)日:2014-10-21
申请号:US13546300
申请日:2012-07-11
申请人: Meng-Wei Chou , Hung-Jui Kuo , Ming-Che Ho , Chung-Shi Liu
发明人: Meng-Wei Chou , Hung-Jui Kuo , Ming-Che Ho , Chung-Shi Liu
IPC分类号: H01L21/44
CPC分类号: H01L23/525 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/11 , H01L2224/02331 , H01L2224/03464 , H01L2224/0361 , H01L2224/0401 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/05027 , H01L2224/0508 , H01L2224/05124 , H01L2224/05139 , H01L2224/05147 , H01L2224/05184 , H01L2224/05548 , H01L2224/05572 , H01L2224/05624 , H01L2224/05639 , H01L2224/05647 , H01L2224/05684 , H01L2224/13022 , H01L2224/13024 , H01L2224/13111 , H01L2924/00014 , H01L2924/12042 , H01L2924/01047 , H01L2924/01029 , H01L2924/00012 , H01L2224/05552 , H01L2924/00
摘要: A method of forming post passivation interconnects comprises forming a passivation layer over a substrate, wherein a metal pad is embedded in the passivation layer, depositing a first dielectric layer on the passivation layer, applying a first patterning process to the first dielectric layer to form a first opening, forming a first seed layer over the first opening, filling the first opening with a conductive material, depositing a second dielectric layer on the first dielectric layer, applying a second patterning process to the second dielectric layer to form a second opening, forming an under bump metallization structure over the second opening and mounting an interconnect bump over the under bump metallization structure.
摘要翻译: 形成后钝化互连的方法包括在衬底上形成钝化层,其中金属焊盘嵌入钝化层中,在钝化层上沉积第一介电层,将第一图案化工艺应用于第一介电层以形成 第一开口,在第一开口上形成第一种子层,用导电材料填充第一开口,在第一介电层上沉积第二介电层,向第二介电层施加第二图案化工艺以形成第二开口,形成 在第二开口上方的凸块下金属化结构,并且在凸块下金属化结构之上安装互连凸块。
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公开(公告)号:US10128206B2
公开(公告)日:2018-11-13
申请号:US12904506
申请日:2010-10-14
申请人: Chih-Wei Lin , Ming-Da Cheng , Wen-Hsiung Lu , Meng-Wei Chou , Hung-Jui Kuo , Chung-Shi Liu
发明人: Chih-Wei Lin , Ming-Da Cheng , Wen-Hsiung Lu , Meng-Wei Chou , Hung-Jui Kuo , Chung-Shi Liu
IPC分类号: H01L21/768 , H01L23/48 , H01L23/00
摘要: The invention relates to a bump structure of a semiconductor device. An exemplary structure for a semiconductor device comprises a substrate; a contact pad over the substrate; a passivation layer extending over the substrate having an opening over the contact pad; and a conductive pillar over the opening of the passivation layer, wherein the conductive pillar comprises an upper portion substantially perpendicular to a surface of the substrate and a lower portion having tapered sidewalls.
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公开(公告)号:US20140015122A1
公开(公告)日:2014-01-16
申请号:US13546300
申请日:2012-07-11
申请人: Meng-Wei Chou , Hung-Jui Kuo , Ming-Che Ho , Chung-Shi Liu
发明人: Meng-Wei Chou , Hung-Jui Kuo , Ming-Che Ho , Chung-Shi Liu
IPC分类号: H01L21/768 , H01L23/498
CPC分类号: H01L23/525 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/11 , H01L2224/02331 , H01L2224/03464 , H01L2224/0361 , H01L2224/0401 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/05027 , H01L2224/0508 , H01L2224/05124 , H01L2224/05139 , H01L2224/05147 , H01L2224/05184 , H01L2224/05548 , H01L2224/05572 , H01L2224/05624 , H01L2224/05639 , H01L2224/05647 , H01L2224/05684 , H01L2224/13022 , H01L2224/13024 , H01L2224/13111 , H01L2924/00014 , H01L2924/12042 , H01L2924/01047 , H01L2924/01029 , H01L2924/00012 , H01L2224/05552 , H01L2924/00
摘要: A method of forming post passivation interconnects comprises forming a passivation layer over a substrate, wherein a metal pad is embedded in the passivation layer, depositing a first dielectric layer on the passivation layer, applying a first patterning process to the first dielectric layer to form a first opening, forming a first seed layer over the first opening, filling the first opening with a conductive material, depositing a second dielectric layer on the first dielectric layer, applying a second patterning process to the second dielectric layer to form a second opening, forming an under bump metallization structure over the second opening and mounting an interconnect bump over the under bump metallization structure.
摘要翻译: 形成后钝化互连的方法包括在衬底上形成钝化层,其中金属焊盘嵌入钝化层中,在钝化层上沉积第一介电层,将第一图案化工艺应用于第一介电层以形成 第一开口,在第一开口上形成第一种子层,用导电材料填充第一开口,在第一介电层上沉积第二介电层,向第二介电层施加第二图案化工艺以形成第二开口,形成 在第二开口上方的凸块下金属化结构,并且在凸块下金属化结构之上安装互连凸块。
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公开(公告)号:US20120009777A1
公开(公告)日:2012-01-12
申请号:US12832005
申请日:2010-07-07
申请人: Chung-Shi Liu , Hung-Jui Kuo , Meng-Wei Chou
发明人: Chung-Shi Liu , Hung-Jui Kuo , Meng-Wei Chou
IPC分类号: H01L21/768
CPC分类号: H01L24/03 , H01L23/3157 , H01L24/05 , H01L24/11 , H01L2224/02311 , H01L2224/02331 , H01L2224/02381 , H01L2224/0239 , H01L2224/0345 , H01L2224/03831 , H01L2224/0401 , H01L2224/05001 , H01L2224/05572 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/11424 , H01L2224/11462 , H01L2224/11464 , H01L2224/11622 , H01L2224/1308 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/16145 , H01L2224/16225 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/01327 , H01L2924/014 , H01L2924/10329 , H01L2924/14 , H01L2924/00 , H01L2224/05552
摘要: A method of forming a device includes forming an under-bump metallurgy (UBM) layer including a barrier layer and a seed layer over the barrier layer; and forming a mask over the UBM layer. The mask covers a first portion of the UBM layer, and a second portion of the UBM layer is exposed through an opening in the mask. The first portion of the UBM layer includes a barrier layer portion and a seed layer portion. A metal bump is formed in the opening and on the second portion of the UBM layer. The mask is then removed. A wet etch is performed to remove the seed layer portion. A dry etch is performed to remove the barrier layer portion.
摘要翻译: 一种形成器件的方法包括在阻挡层上形成包括阻挡层和籽晶层的凸起下金属(UBM)层; 并在UBM层上形成掩模。 掩模覆盖UBM层的第一部分,并且UBM层的第二部分通过掩模中的开口暴露。 UBM层的第一部分包括阻挡层部分和种子层部分。 在UBM层的开口和第二部分上形成金属凸块。 然后取下面具。 执行湿蚀刻以去除种子层部分。 执行干蚀刻以去除阻挡层部分。
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公开(公告)号:US08609526B2
公开(公告)日:2013-12-17
申请号:US12842617
申请日:2010-07-23
申请人: Chung-Shi Liu , Cheng-Chung Lin , Ming-Che Ho , Kuo Cheng Lin , Meng-Wei Chou
发明人: Chung-Shi Liu , Cheng-Chung Lin , Ming-Che Ho , Kuo Cheng Lin , Meng-Wei Chou
IPC分类号: H01L21/445 , H01L21/4757
CPC分类号: H01L24/05 , H01L21/0206 , H01L21/02068 , H01L24/03 , H01L24/11 , H01L24/13 , H01L2224/0346 , H01L2224/0347 , H01L2224/0361 , H01L2224/0381 , H01L2224/0401 , H01L2224/05027 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05568 , H01L2224/05573 , H01L2224/05655 , H01L2224/1146 , H01L2224/1147 , H01L2224/11849 , H01L2224/13083 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/81022 , H01L2224/94 , H01L2924/00013 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2924/00014 , H01L2224/11 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2224/05552
摘要: A method of forming an integrated circuit structure includes forming a copper-containing seed layer on a wafer, and performing a descum step on an exposed surface of the copper-containing seed layer. The descum step is performed using a process gas including fluorine and oxygen. A reduction/purge step is then performed on the exposed surface of the copper-containing seed layer using a nitrogen-containing gas. A copper-containing layer is plated on the copper-containing seed layer.
摘要翻译: 形成集成电路结构的方法包括在晶片上形成含铜晶种层,并在含铜种子层的暴露表面上进行除氧步骤。 除氧步骤使用包括氟和氧的工艺气体进行。 然后使用含氮气体在含铜种子层的暴露表面上进行还原/吹扫步骤。 含铜层镀在含铜种子层上。
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公开(公告)号:US20120049346A1
公开(公告)日:2012-03-01
申请号:US12871565
申请日:2010-08-30
申请人: Cheng-Chung Lin , Chung-Shi Liu , Meng-Wei Chou , Kuo Cheng Lin , Wen-Hsiung Lu , Chien Ling Hwang , Ying-Jui Huang , De-Yuan Lu
发明人: Cheng-Chung Lin , Chung-Shi Liu , Meng-Wei Chou , Kuo Cheng Lin , Wen-Hsiung Lu , Chien Ling Hwang , Ying-Jui Huang , De-Yuan Lu
IPC分类号: H01L23/498 , H01L21/768
CPC分类号: H01L24/11 , H01L21/02052 , H01L21/32125 , H01L21/76873 , H01L21/76885 , H01L23/488 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2221/1084 , H01L2224/03912 , H01L2224/0401 , H01L2224/05073 , H01L2224/05541 , H01L2224/05573 , H01L2224/1111 , H01L2224/1132 , H01L2224/1145 , H01L2224/11452 , H01L2224/1146 , H01L2224/11462 , H01L2224/11464 , H01L2224/11472 , H01L2224/11474 , H01L2224/11614 , H01L2224/1181 , H01L2224/11849 , H01L2224/11903 , H01L2224/1191 , H01L2224/11912 , H01L2224/13005 , H01L2224/13017 , H01L2224/13018 , H01L2224/1308 , H01L2224/13082 , H01L2224/13083 , H01L2224/13084 , H01L2224/13111 , H01L2224/13116 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/81191 , H01L2924/00013 , H01L2924/01006 , H01L2924/01019 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01059 , H01L2924/01072 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/0541 , H01L2924/07025 , H01L2924/10329 , H01L2924/14 , H01L2924/20102 , H01L2924/3512 , H01L2924/381 , H01L2924/3841 , H01L2924/0105 , H01L2924/00014 , H01L2224/13099 , H01L2924/207
摘要: Apparatus and methods for providing solder pillar bumps. Pillar bump connections are formed on input/output terminals for integrated circuits by forming a pillar of conductive material using plating of a conductive material over terminals of an integrated circuit. A base portion of the pillar bump has a greater width than an upper portion. A cross-section of the base portion of the pillar bump may make a trapezoidal, rectangular or sloping shape. Solder material may be formed on the top surface of the pillar. The resulting solder pillar bumps form fine pitch package solder connections that are more reliable than those of the prior art.
摘要翻译: 用于提供焊料柱凸块的装置和方法。 通过在集成电路的端子上通过导电材料的电镀形成导电材料的支柱,在集成电路的输入/输出端子上形成支柱凸点连接。 柱状凸块的基部具有比上部更大的宽度。 柱形凸起的基部的横截面可以形成梯形,矩形或倾斜的形状。 焊料可以形成在柱的顶表面上。 所得到的焊料柱凸起形成比现有技术更可靠的细间距封装焊接连接。
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公开(公告)号:US20110092064A1
公开(公告)日:2011-04-21
申请号:US12842617
申请日:2010-07-23
申请人: Chung-Shi Liu , Cheng-Chung Lin , Ming-Che Ho , Kuo Cheng Lin , Meng-Wei Chou
发明人: Chung-Shi Liu , Cheng-Chung Lin , Ming-Che Ho , Kuo Cheng Lin , Meng-Wei Chou
IPC分类号: H01L21/3205
CPC分类号: H01L24/05 , H01L21/0206 , H01L21/02068 , H01L24/03 , H01L24/11 , H01L24/13 , H01L2224/0346 , H01L2224/0347 , H01L2224/0361 , H01L2224/0381 , H01L2224/0401 , H01L2224/05027 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05568 , H01L2224/05573 , H01L2224/05655 , H01L2224/1146 , H01L2224/1147 , H01L2224/11849 , H01L2224/13083 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/81022 , H01L2224/94 , H01L2924/00013 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2924/00014 , H01L2224/11 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2224/05552
摘要: A method of forming an integrated circuit structure includes forming a copper-containing seed layer on a wafer, and performing a descum step on an exposed surface of the copper-containing seed layer. The descum step is performed using a process gas including fluorine and oxygen. A reduction/purge step is then performed on the exposed surface of the copper-containing seed layer using a nitrogen-containing gas. A copper-containing layer is plated on the copper-containing seed layer.
摘要翻译: 形成集成电路结构的方法包括在晶片上形成含铜晶种层,并在含铜种子层的暴露表面上进行除氧步骤。 除氧步骤使用包括氟和氧的工艺气体进行。 然后使用含氮气体在含铜种子层的暴露表面上进行还原/吹扫步骤。 含铜层镀在含铜种子层上。
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公开(公告)号:US08823166B2
公开(公告)日:2014-09-02
申请号:US12871565
申请日:2010-08-30
申请人: Cheng-Chung Lin , Chung-Shi Liu , Meng-Wei Chou , Kuo Cheng Lin , Wen-Hsiung Lu , Chien Ling Hwang , Ying-Jui Huang , De-Yuan Lu
发明人: Cheng-Chung Lin , Chung-Shi Liu , Meng-Wei Chou , Kuo Cheng Lin , Wen-Hsiung Lu , Chien Ling Hwang , Ying-Jui Huang , De-Yuan Lu
CPC分类号: H01L24/11 , H01L21/02052 , H01L21/32125 , H01L21/76873 , H01L21/76885 , H01L23/488 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2221/1084 , H01L2224/03912 , H01L2224/0401 , H01L2224/05073 , H01L2224/05541 , H01L2224/05573 , H01L2224/1111 , H01L2224/1132 , H01L2224/1145 , H01L2224/11452 , H01L2224/1146 , H01L2224/11462 , H01L2224/11464 , H01L2224/11472 , H01L2224/11474 , H01L2224/11614 , H01L2224/1181 , H01L2224/11849 , H01L2224/11903 , H01L2224/1191 , H01L2224/11912 , H01L2224/13005 , H01L2224/13017 , H01L2224/13018 , H01L2224/1308 , H01L2224/13082 , H01L2224/13083 , H01L2224/13084 , H01L2224/13111 , H01L2224/13116 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/81191 , H01L2924/00013 , H01L2924/01006 , H01L2924/01019 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01059 , H01L2924/01072 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/0541 , H01L2924/07025 , H01L2924/10329 , H01L2924/14 , H01L2924/20102 , H01L2924/3512 , H01L2924/381 , H01L2924/3841 , H01L2924/0105 , H01L2924/00014 , H01L2224/13099 , H01L2924/207
摘要: Apparatus and methods for providing solder pillar bumps. Pillar bump connections are formed on input/output terminals for integrated circuits by forming a pillar of conductive material using plating of a conductive material over terminals of an integrated circuit. A base portion of the pillar bump has a greater width than an upper portion. A cross-section of the base portion of the pillar bump may make a trapezoidal, rectangular or sloping shape. Solder material may be formed on the top surface of the pillar. The resulting solder pillar bumps form fine pitch package solder connections that are more reliable than those of the prior art.
摘要翻译: 用于提供焊料柱凸块的装置和方法。 通过在集成电路的端子上通过导电材料的电镀形成导电材料的支柱,在集成电路的输入/输出端子上形成支柱凸点连接。 柱状凸块的基部具有比上部更大的宽度。 柱形凸起的基部的横截面可以形成梯形,矩形或倾斜的形状。 焊料可以形成在柱的顶表面上。 所得到的焊料柱凸起形成比现有技术更可靠的细间距封装焊接连接。
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