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    PCB having chips embedded therein and method of manfacturing the same
    3.
    发明申请
    PCB having chips embedded therein and method of manfacturing the same 审中-公开
    具有嵌入芯片的PCB及其制造方法

    公开(公告)号：US20090316373A1

    公开(公告)日：2009-12-24

    申请号：US12230942

    申请日：2008-09-08

    申请人： Dong Kuk Kim ,  Tae Hyun Kim

    发明人： Dong Kuk Kim ,  Tae Hyun Kim

    IPC分类号： H05K1/18 ,  H05K3/36

    CPC分类号： H05K1/185 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H05K1/186 ,  H05K1/188 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4614 ,  H05K3/462 ,  H05K3/4647 ,  H05K3/4652 ,  H05K2201/10378 ,  H05K2201/10674 ,  Y10T29/49126

    摘要： Provided is a PCB having chips embedded therein, the PCB including a first core substrate that has a first chip embedded therein, the first chip having a plurality of first pads provided on the top surface thereof, and first circuit patterns provided on both surfaces thereof; a second core substrate that is disposed under the first core substrate so as to be spaced at a predetermined space from the first core substrate and has a second chip embedded therein, the second chip having a plurality of second pads provided on the bottom surface thereof, and second circuit patterns provided on both surfaces thereof; a first insulating layer that is laminated on the first core substrate and has a plurality of first conductive bumps formed therein, the first conductive bumps passing through the first insulating layer and being connected to the first circuit patterns and the first pads; a second insulating layer that is laminated between the first core substrate and the second core substrate and has a plurality of second conductive bumps formed therein, the second conductive bumps passing through the second insulating layer and connecting the first circuit patterns to the second circuit patterns; and a third insulating layer that is laminated under the second core substrate and has a plurality of third conductive bumps formed therein, the third conductive bumps passing through the third insulating layer and being connected to the second circuit patterns and the second pads.

    摘要翻译： 提供了具有嵌入其中的芯片的PCB，PCB包括具有嵌入其中的第一芯片的第一芯基板，第一芯片具有设置在其顶表面上的多个第一焊盘，以及设置在其两个表面上的第一电路图案; 第二芯基板，其设置在所述第一芯基板的下方，以与所述第一芯基板隔开预定空间，并且具有嵌入其中的第二芯片，所述第二芯片具有设置在其底表面上的多个第二焊盘， 和在其两个表面上提供的第二电路图案; 第一绝缘层，层叠在第一芯基板上，并且在其中形成有多个第一导电凸块，第一导电凸块穿过第一绝缘层并连接到第一电路图案和第一焊盘; 第二绝缘层，层叠在第一芯基板和第二芯基板之间，并且在其中形成有多个第二导电凸块，第二导电凸块穿过第二绝缘层并将第一电路图案连接到第二电路图案; 以及第三绝缘层，层叠在所述第二芯基板的下方，并且在其中形成有多个第三导电凸块，所述第三导电凸块通过所述第三绝缘层并且连接到所述第二电路图案和所述第二焊盘。

    Apparatus for cutting a wafer
    4.
    发明授权
    Apparatus for cutting a wafer 有权
    用于切割晶片的装置

    公开(公告)号：US06620028B2

    公开(公告)日：2003-09-16

    申请号：US10103465

    申请日：2002-03-22

    申请人： Sun Mo Yang ,  Dong Kuk Kim

    发明人： Sun Mo Yang ,  Dong Kuk Kim

    IPC分类号： B24B100

    CPC分类号： B23D59/001 ,  B28D5/0058 ,  B28D5/0094

    摘要： The present invention relates to an apparatus for cutting a wafer, wherein the wafer cutting process is performed along a back side of a wafer, a semiconductor chip being formed on the front side thereof, by cutting the wafer along the back side of the wafer by directly recognizing the semiconductor chip shape formed on the front side of the wafer thereby minimizing cutting defects due to sawing blade misalignment. The present invention includes a hole formed in the center portion of a chuck table on which the wafer, which is facing down, is attached and a camera installed under the hole of the chuck table. After the wafer is properly aligned by the camera recognizing the semiconductor chip shape formed on the front side of the wafer, a wafer cutting process is performed by a sawing blade.

    摘要翻译： 本发明涉及一种用于切割晶片的设备，其中晶片切割处理沿着晶片的背面进行，半导体芯片在其前侧形成，通过沿着晶片的背面切割晶片，通过 直接识别在晶片正面形成的半导体芯片形状，从而最大限度地减少由于锯片不对准引起的切割缺陷。本发明包括一个形成在卡盘台的中心部分上的孔，其上面朝下的晶片是 并安装在卡盘孔下方的相机。 在通过识别形成在晶片的前侧上的半导体芯片形状的相机正确对准晶片之后，通过锯切刀片执行晶片切割处理。