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公开(公告)号:US06742561B2
公开(公告)日:2004-06-01
申请号:US10116786
申请日:2002-04-04
申请人: Shi Baek Nam , Dong Kuk Kim
发明人: Shi Baek Nam , Dong Kuk Kim
IPC分类号: H01L2144
CPC分类号: H01L24/32 , H01L23/49513 , H01L23/49562 , H01L23/49575 , H01L24/29 , H01L24/75 , H01L24/83 , H01L2224/29083 , H01L2224/2919 , H01L2224/32013 , H01L2224/32225 , H01L2224/83101 , H01L2224/83192 , H01L2224/8385 , H01L2924/01004 , H01L2924/01006 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , Y10S414/141 , Y10T29/41 , Y10T29/49121 , Y10T29/53178 , Y10T156/1077 , Y10T156/1093 , Y10T156/1097 , Y10T156/1098 , Y10T156/133 , Y10T156/1339 , Y10T156/1751 , Y10T156/1778 , H01L2924/00 , H01L2924/01026 , H01L2924/01028 , H01L2924/3512
摘要: The present invention provides an apparatus for bonding a semiconductor chip to substrate using a non-conductive adhesive tape. The non-conductive adhesive tape may be a polyimide tape. The apparatus may include a tape provider having a reel on which the non-adhesive tape may be spooled, rollers, and a tape cutter which cuts the tape to a suitable size. A tape holder and a tape presser may also be provided to hold the tape in place while the tape cutter cuts the tape. A tape pick-up tool may be provided to transfer the cut tape to a die bonding area on the substrate. The tape holder and the tape pick-up tool may include a suction opening for providing a suction force. The apparatus may further include a die pick up tool for transferring a semiconductor chip from a semiconductor chip provider to the adhesive tape affixed to the substrate.
摘要翻译: 本发明提供一种使用非导电性胶带将半导体芯片与基板接合的装置。 非导电胶带可以是聚酰亚胺胶带。 该设备可以包括具有卷轴的带式供应器,非卷材上的非胶带,辊子以及将胶带切割成合适尺寸的带切割器。 还可以提供带固定器和带式压带器,以在带切割器切割带时将带保持在适当位置。 可以提供带拾取工具以将切割的带传送到基板上的芯片粘合区域。 带固定器和拾取工具可以包括用于提供抽吸力的抽吸开口。 该装置还可以包括用于将半导体芯片从半导体芯片提供器传送到固定到基板的粘合带的芯片拾取工具。
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公开(公告)号:US20100002407A1
公开(公告)日:2010-01-07
申请号:US12232251
申请日:2008-09-12
申请人: Tae Hyun Kim , Sung Taek Kwon , Tae Ha Lee , Dong Kuk Kim
发明人: Tae Hyun Kim , Sung Taek Kwon , Tae Ha Lee , Dong Kuk Kim
IPC分类号: H05K7/02
CPC分类号: H01L24/33 , H01L23/3128 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L25/18 , H01L2224/04042 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06562 , H01L2924/00014 , H01L2924/01014 , H01L2924/01033 , H01L2924/01047 , H01L2924/01061 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/078 , H01L2924/07802 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/00 , H01L2924/3512 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599
摘要: Provided is a system-in-package module including a system circuit board; a first element that is disposed on the system circuit board; a second element that is disposed on the first element so as to be shifted to one side from the center of the first element, while partially exposing the first element; a third element that is electrically connected to the system circuit board and is disposed on the second element; and a plurality of bump pads that are disposed on the bottom surface of the system circuit board.
摘要翻译: 提供了一种包括系统电路板的系统级封装模块; 布置在所述系统电路板上的第一元件; 第二元件,其设置在第一元件上,以便从第一元件的中心偏移到一侧,同时部分地暴露第一元件; 电连接到所述系统电路板并设置在所述第二元件上的第三元件; 以及设置在所述系统电路板的底面上的多个凸点焊盘。
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公开(公告)号:US06620028B2
公开(公告)日:2003-09-16
申请号:US10103465
申请日:2002-03-22
申请人: Sun Mo Yang , Dong Kuk Kim
发明人: Sun Mo Yang , Dong Kuk Kim
IPC分类号: B24B100
CPC分类号: B23D59/001 , B28D5/0058 , B28D5/0094
摘要: The present invention relates to an apparatus for cutting a wafer, wherein the wafer cutting process is performed along a back side of a wafer, a semiconductor chip being formed on the front side thereof, by cutting the wafer along the back side of the wafer by directly recognizing the semiconductor chip shape formed on the front side of the wafer thereby minimizing cutting defects due to sawing blade misalignment. The present invention includes a hole formed in the center portion of a chuck table on which the wafer, which is facing down, is attached and a camera installed under the hole of the chuck table. After the wafer is properly aligned by the camera recognizing the semiconductor chip shape formed on the front side of the wafer, a wafer cutting process is performed by a sawing blade.
摘要翻译: 本发明涉及一种用于切割晶片的设备,其中晶片切割处理沿着晶片的背面进行,半导体芯片在其前侧形成,通过沿着晶片的背面切割晶片,通过 直接识别在晶片正面形成的半导体芯片形状,从而最大限度地减少由于锯片不对准引起的切割缺陷。本发明包括一个形成在卡盘台的中心部分上的孔,其上面朝下的晶片是 并安装在卡盘孔下方的相机。 在通过识别形成在晶片的前侧上的半导体芯片形状的相机正确对准晶片之后,通过锯切刀片执行晶片切割处理。
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公开(公告)号:US07679928B2
公开(公告)日:2010-03-16
申请号:US12232251
申请日:2008-09-12
申请人: Tae Hyun Kim , Sung Taek Kwon , Tae Ha Lee , Dong Kuk Kim
发明人: Tae Hyun Kim , Sung Taek Kwon , Tae Ha Lee , Dong Kuk Kim
IPC分类号: H05K7/10
CPC分类号: H01L24/33 , H01L23/3128 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L25/18 , H01L2224/04042 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06562 , H01L2924/00014 , H01L2924/01014 , H01L2924/01033 , H01L2924/01047 , H01L2924/01061 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/078 , H01L2924/07802 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/00 , H01L2924/3512 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599
摘要: Provided is a system-in-package module including a system circuit board; a first element that is disposed on the system circuit board; a second element that is disposed on the first element so as to be shifted to one side from the center of the first element, while partially exposing the first element; a third element that is electrically connected to the system circuit board and is disposed on the second element; and a plurality of bump pads that are disposed on the bottom surface of the system circuit board.
摘要翻译: 提供了一种包括系统电路板的系统级封装模块; 布置在所述系统电路板上的第一元件; 第二元件,其设置在第一元件上,以便从第一元件的中心偏移到一侧,同时部分地暴露第一元件; 电连接到所述系统电路板并设置在所述第二元件上的第三元件; 以及设置在所述系统电路板的底面上的多个凸点焊盘。
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5.
公开(公告)号:US20090316373A1
公开(公告)日:2009-12-24
申请号:US12230942
申请日:2008-09-08
申请人: Dong Kuk Kim , Tae Hyun Kim
发明人: Dong Kuk Kim , Tae Hyun Kim
CPC分类号: H05K1/185 , H01L23/5389 , H01L24/19 , H01L2224/04105 , H01L2224/20 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H05K1/186 , H05K1/188 , H05K3/4069 , H05K3/4602 , H05K3/4614 , H05K3/462 , H05K3/4647 , H05K3/4652 , H05K2201/10378 , H05K2201/10674 , Y10T29/49126
摘要: Provided is a PCB having chips embedded therein, the PCB including a first core substrate that has a first chip embedded therein, the first chip having a plurality of first pads provided on the top surface thereof, and first circuit patterns provided on both surfaces thereof; a second core substrate that is disposed under the first core substrate so as to be spaced at a predetermined space from the first core substrate and has a second chip embedded therein, the second chip having a plurality of second pads provided on the bottom surface thereof, and second circuit patterns provided on both surfaces thereof; a first insulating layer that is laminated on the first core substrate and has a plurality of first conductive bumps formed therein, the first conductive bumps passing through the first insulating layer and being connected to the first circuit patterns and the first pads; a second insulating layer that is laminated between the first core substrate and the second core substrate and has a plurality of second conductive bumps formed therein, the second conductive bumps passing through the second insulating layer and connecting the first circuit patterns to the second circuit patterns; and a third insulating layer that is laminated under the second core substrate and has a plurality of third conductive bumps formed therein, the third conductive bumps passing through the third insulating layer and being connected to the second circuit patterns and the second pads.
摘要翻译: 提供了具有嵌入其中的芯片的PCB,PCB包括具有嵌入其中的第一芯片的第一芯基板,第一芯片具有设置在其顶表面上的多个第一焊盘,以及设置在其两个表面上的第一电路图案; 第二芯基板,其设置在所述第一芯基板的下方,以与所述第一芯基板隔开预定空间,并且具有嵌入其中的第二芯片,所述第二芯片具有设置在其底表面上的多个第二焊盘, 和在其两个表面上提供的第二电路图案; 第一绝缘层,层叠在第一芯基板上,并且在其中形成有多个第一导电凸块,第一导电凸块穿过第一绝缘层并连接到第一电路图案和第一焊盘; 第二绝缘层,层叠在第一芯基板和第二芯基板之间,并且在其中形成有多个第二导电凸块,第二导电凸块穿过第二绝缘层并将第一电路图案连接到第二电路图案; 以及第三绝缘层,层叠在所述第二芯基板的下方,并且在其中形成有多个第三导电凸块,所述第三导电凸块通过所述第三绝缘层并且连接到所述第二电路图案和所述第二焊盘。
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6.
公开(公告)号:US07347950B2
公开(公告)日:2008-03-25
申请号:US11214965
申请日:2005-08-29
申请人: Bum Young Myung , Dong Kuk Kim , Young Po Park , Young Seok Yoon , Dek Gin Yang
发明人: Bum Young Myung , Dong Kuk Kim , Young Po Park , Young Seok Yoon , Dek Gin Yang
CPC分类号: H05K3/4691 , C23C26/00 , C23C28/00 , C23C28/023 , H05K3/4652 , H05K2201/0187 , H05K2201/0355 , H05K2201/0382 , H05K2201/09109 , H05K2203/063 , Y10T29/49155
摘要: A rigid flexible printed circuit board (PCB) and a method of fabricating the same. Since a polyimide copper clad laminate is not used during the fabrication of the rigid flexible PCB, an increase in cost resulting from use of the polyimide copper clad laminate and poor reliability of adhesion at an interface between different materials are avoided.
摘要翻译: 一种刚性柔性印刷电路板(PCB)及其制造方法。 由于在刚性柔性PCB的制造期间不使用聚酰亚胺覆铜层压板,所以避免了使用聚酰亚胺覆铜层压板所产生的成本的增加以及在不同材料之间的界面处的粘附可靠性差。
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7.
公开(公告)号:US07346982B2
公开(公告)日:2008-03-25
申请号:US11086642
申请日:2005-03-22
申请人: Chong Ho Kim , Dong Kuk Kim , Hyo Soo Lee , Young Hwan Shin
发明人: Chong Ho Kim , Dong Kuk Kim , Hyo Soo Lee , Young Hwan Shin
IPC分类号: H05K3/02
CPC分类号: H05K3/4682 , H05K3/0097 , H05K3/205 , H05K3/28 , H05K2201/0355 , H05K2203/054 , H05K2203/1536 , Y10T29/49126 , Y10T29/49156 , Y10T29/49163 , Y10T29/49165 , Y10T428/24917 , Y10T428/24926
摘要: A method is directed towards fabricating a printed circuit board (PCB) having a thin core layer. In the method, a substrate, where a copper foil is formed on a release film and a prepreg, is employed as a base substrate and a core insulating layer is removed after the fabrication of the PCB, thereby reducing the thickness of the final product.
摘要翻译: 一种方法涉及制造具有薄芯层的印刷电路板(PCB)。 在该方法中,在剥离膜和预浸料坯上形成铜箔的基板被用作基底基板,并且在PCB的制造之后去除芯绝缘层,从而减小最终产品的厚度。
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