公开(公告)号：US20090109641A1

公开(公告)日：2009-04-30

申请号：US12285222

申请日：2008-09-30

申请人： Masakazu Ishino ,  Hiroaki Ikeda ,  Hideharu Miyake ,  Shiro Uchiyama ,  Hiroyuki Tenmei ,  Kunihiko Nishi ,  Yasuhiro Naka ,  Nae Hisano

发明人： Masakazu Ishino ,  Hiroaki Ikeda ,  Hideharu Miyake ,  Shiro Uchiyama ,  Hiroyuki Tenmei ,  Kunihiko Nishi ,  Yasuhiro Naka ,  Nae Hisano

IPC分类号： H05K7/00

CPC分类号： H05K1/0296 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/81 ,  H01L24/90 ,  H01L25/0657 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/11902 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/2518 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/90 ,  H01L2225/06513 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K1/09 ,  H05K3/3436 ,  H05K2201/0367 ,  H05K2201/10674 ,  Y02P70/613

摘要： A wafer (or a circuit board), which is used to perform three-dimensional mounting, has protrusion 20 which is provided in low melting point metal 15 for electrically connecting mutually joined wafers 61 and 62, and which defines an interval between mutually joined wafers 61 and 62 without being deformed at the time when low melting point metal 15 is melted. A joining structure of wafers 61 and 62 is manufactured by using wafers 61 and 62, at least one of which has protrusion 20. In the manufactured joining structure of wafers 61 and 62, wafers 61 and 62 are electrically connected to each other by low melting point metal 15, and protrusion 20, which defines the interval between wafers 61 and 62 without being deformed at the time when low melting point metal 15 is melted, is provided in low melting point metal 15.

摘要翻译： 用于进行三维安装的晶片（或电路板）具有突起20，该突起20设置在用于电连接相互接合的晶片61和62的低熔点金属15中，并且限定相互连接的晶片之间的间隔 61和62，在低熔点金属15熔化时不变形。 通过使用晶片61和62中的至少一个具有突起20来制造晶片61和62的接合结构。在制造的晶片61和62的接合结构中，晶片61和62通过低熔点彼此电连接 点金属15和在低熔点金属15熔化时不会变形的晶片61和62之间的间隔的突起20设置在低熔点金属15中。

公开(公告)号：US20090134498A1

公开(公告)日：2009-05-28

申请号：US12273590

申请日：2008-11-19

申请人： Hiroaki IKEDA ,  Masakazu Ishino ,  Hideharu Miyake ,  Shiro Uchiyama ,  Yasuhiro Naka ,  Nae Hisano ,  Hisashi Tanie ,  Kunihiko Nishi ,  Hiroyuki Tenmei

发明人： Hiroaki IKEDA ,  Masakazu Ishino ,  Hideharu Miyake ,  Shiro Uchiyama ,  Yasuhiro Naka ,  Nae Hisano ,  Hisashi Tanie ,  Kunihiko Nishi ,  Hiroyuki Tenmei

IPC分类号： H01L23/538 ,  H01L23/52 ,  H01L23/58

CPC分类号： H01L23/3128 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/02 ,  H01L24/11 ,  H01L24/12 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/2518 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

摘要： The present invention includes a semiconductor element provided with an electrode passing through front and back sides. The electrode is formed as a cylinder including a hollow portion, and stress relaxing material is provided in the hollow portion, which is used to reduce stress that is induced between the semiconductor element and the electrode. The stress relaxing material is an elastic body made of resin material.

摘要翻译： 本发明包括具有通过正面和背面的电极的半导体元件。 电极形成为包括中空部分的圆柱体，并且应力松弛材料设置在中空部分中，其用于减小在半导体元件和电极之间感应的应力。 应力松弛材料是由树脂材料制成的弹性体。

公开(公告)号：US08334465B2

公开(公告)日：2012-12-18

申请号：US12285222

申请日：2008-09-30

申请人： Masakazu Ishino ,  Hiroaki Ikeda ,  Hideharu Miyake ,  Shiro Uchiyama ,  Hiroyuki Tenmei ,  Kunihiko Nishi ,  Yasuhiro Naka ,  Nae Hisano

发明人： Masakazu Ishino ,  Hiroaki Ikeda ,  Hideharu Miyake ,  Shiro Uchiyama ,  Hiroyuki Tenmei ,  Kunihiko Nishi ,  Yasuhiro Naka ,  Nae Hisano

IPC分类号： H05K1/16 ,  H05K1/00 ,  H05K1/03 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H05K1/0296 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/81 ,  H01L24/90 ,  H01L25/0657 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/11902 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/2518 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/90 ,  H01L2225/06513 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K1/09 ,  H05K3/3436 ,  H05K2201/0367 ,  H05K2201/10674 ,  Y02P70/613

摘要： A wafer (or a circuit board), which is used to perform three-dimensional mounting, has protrusion 20 which is provided in low melting point metal 15 for electrically connecting mutually joined wafers 61 and 62, and which defines an interval between mutually joined wafers 61 and 62 without being deformed at the time when low melting point metal 15 is melted. A joining structure of wafers 61 and 62 is manufactured by using wafers 61 and 62, at least one of which has protrusion 20. In the manufactured joining structure of wafers 61 and 62, wafers 61 and 62 are electrically connected to each other by low melting point metal 15, and protrusion 20, which defines the interval between wafers 61 and 62 without being deformed at the time when low melting point metal 15 is melted, is provided in low melting point metal 15.

摘要翻译： 用于进行三维安装的晶片（或电路板）具有突起20，该突起20设置在用于电连接相互接合的晶片61和62的低熔点金属15中，并且限定相互连接的晶片之间的间隔 61和62，在低熔点金属15熔化时不变形。 通过使用晶片61和62中的至少一个具有突起20来制造晶片61和62的接合结构。在制造的晶片61和62的接合结构中，晶片61和62通过低熔点彼此电连接 点金属15和在低熔点金属15熔化时不会变形的晶片61和62之间的间隔的突起20设置在低熔点金属15中。

公开(公告)号：US08937390B2

公开(公告)日：2015-01-20

申请号：US14199078

申请日：2014-03-06

申请人： Nae Hisano ,  Shigeo Ohashi ,  Yasuo Osone ,  Yasuhiro Naka ,  Hiroyuki Tenmei ,  Kunihiko Nishi ,  Hiroaki Ikeda ,  Masakazu Ishino ,  Hideharu Miyake ,  Shiro Uchiyama

发明人： Nae Hisano ,  Shigeo Ohashi ,  Yasuo Osone ,  Yasuhiro Naka ,  Hiroyuki Tenmei ,  Kunihiko Nishi ,  Hiroaki Ikeda ,  Masakazu Ishino ,  Hideharu Miyake ,  Shiro Uchiyama

IPC分类号： H01L23/48 ,  H01L23/02 ,  H01L23/00 ,  H01L23/31 ,  H01L23/473 ,  H01L23/34

CPC分类号： H01L24/14 ,  H01L23/3128 ,  H01L23/34 ,  H01L23/473 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06565 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00

摘要： A semiconductor device comprises a mounting substrate, a semiconductor element provided above said mounting substrate, a package substrate provided above said mounting substrate with said semiconductor element therebetween and electrically connected to said semiconductor element via a primary connecting bump, a liquid cooling module cooling said semiconductor element by a liquid refrigerant, in which a heat receiving section of the liquid cooling module is disposed between said semiconductor element and said mounting substrate, and a plurality of secondary connecting bumps provided between said package substrate and said mounting substrate.

摘要翻译： 半导体器件包括安装基板，设置在所述安装基板上方的半导体元件，设置在所述安装基板上方的封装基板，其间具有所述半导体元件，并通过主连接凸块与所述半导体元件电连接;冷却所述半导体 液体制冷剂的热接收部分设置在所述半导体元件和所述安装基板之间，以及设置在所述封装基板和所述安装基板之间的多个次级连接凸块。

公开(公告)号：US08704352B2

公开(公告)日：2014-04-22

申请号：US12683085

申请日：2010-01-06

申请人： Nae Hisano ,  Shigeo Ohashi ,  Yasuo Osone ,  Yasuhiro Naka ,  Hiroyuki Tenmei ,  Kunihiko Nishi ,  Hiroaki Ikeda ,  Masakazu Ishino ,  Hideharu Miyake ,  Shiro Uchiyama

发明人： Nae Hisano ,  Shigeo Ohashi ,  Yasuo Osone ,  Yasuhiro Naka ,  Hiroyuki Tenmei ,  Kunihiko Nishi ,  Hiroaki Ikeda ,  Masakazu Ishino ,  Hideharu Miyake ,  Shiro Uchiyama

IPC分类号： H01L23/02 ,  H01L23/34

CPC分类号： H01L24/14 ,  H01L23/3128 ,  H01L23/34 ,  H01L23/473 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06565 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00

摘要： A semiconductor device comprises a mounting substrate, a semiconductor element provided above said mounting substrate, a package substrate provided above said mounting substrate with said semiconductor element therebetween and electrically connected to said semiconductor element via a primary connecting bump, a liquid cooling module cooling said semiconductor element by a liquid refrigerant, in which a heat receiving section of the liquid cooling module is disposed between said semiconductor element and said mounting substrate, and a plurality of secondary connecting bumps provided between said package substrate and said mounting substrate.

摘要翻译： 半导体器件包括安装基板，设置在所述安装基板上方的半导体元件，设置在所述安装基板上方的封装基板，其间具有所述半导体元件，并通过主连接凸块与所述半导体元件电连接;冷却所述半导体 液体制冷剂的热接收部分设置在所述半导体元件和所述安装基板之间，以及设置在所述封装基板和所述安装基板之间的多个次级连接凸块。

公开(公告)号：US07618847B2

公开(公告)日：2009-11-17

申请号：US12187622

申请日：2008-08-07

申请人： Hiroyuki Tenmei ,  Kunihiko Nishi ,  Yasuhiro Naka ,  Nae Hisano ,  Hiroaki Ikeda ,  Masakazu Ishino

发明人： Hiroyuki Tenmei ,  Kunihiko Nishi ,  Yasuhiro Naka ,  Nae Hisano ,  Hiroaki Ikeda ,  Masakazu Ishino

IPC分类号： H01L21/00

CPC分类号： H01L24/73 ,  H01L21/76898 ,  H01L23/544 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/50 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/0508 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05568 ,  H01L2224/05655 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/2919 ,  H01L2224/73104 ,  H01L2224/75753 ,  H01L2224/8113 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81815 ,  H01L2224/831 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/83205 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/83871 ,  H01L2224/83907 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2224/27

摘要： A bonding method (three-dimensional mounting) of semiconductor substrates is provided to sequentially bond a principal surface of a silicon wafer on which coupling bumps are formed, and a principal surface of the other silicon wafer on which pads are formed, by an adhesive applied to at least one of the principal surfaces. However, there is a problem of poor electrical coupling due to displacement of the bumps and the pads when bonded together. The present invention solves such a problem by conducting temporary positioning of the silicon wafers, adjusting the positions of the coupling bumps and pads while confirming the positions by a method such as x-ray capable of passing through the silicon wafers, and bonding the bumps and the pads together while hardening an interlayer adhesive provided between the principal surfaces of the silicon wafers by thermocompression.

摘要翻译： 提供半导体衬底的接合方法（三维安装），以通过施加的粘合剂顺序地接合形成有耦合凸块的硅晶片的主表面和形成有焊盘的另一个硅晶片的主表面 到至少一个主表面。 然而，由于当焊接在一起时由于凸起和焊盘的位移而存在差的电耦合的问题。 本发明通过进行硅晶片的临时定位来解决这样的问题，通过诸如能够通过硅晶片的x射线的方法确认位置来确定位置，并且将凸块和 一边通过热压而使设置在硅晶片的主表面之间的层间粘合剂硬化。

公开(公告)号：US07754581B2

公开(公告)日：2010-07-13

申请号：US11956560

申请日：2007-12-14

申请人： Hiroaki Ikeda ,  Masakazu Ishino ,  Hiroyuki Tenmei ,  Naoya Kanda ,  Yasuhiro Naka ,  Kunihiko Nishi

发明人： Hiroaki Ikeda ,  Masakazu Ishino ,  Hiroyuki Tenmei ,  Naoya Kanda ,  Yasuhiro Naka ,  Kunihiko Nishi

IPC分类号： H01L21/30

CPC分类号： H01L21/46 ,  H01L21/76898 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/50 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/83194 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A method for manufacturing a semiconductor device includes the steps of forming first and second semiconductor wafers each including an array of chips and elongate electrodes, forming a groove on scribe lines separating the chips from one another; coating a surface of one of the semiconductor wafers with adhesive; bonding together the semiconductor wafers while allowing the groove to receive therein excessive adhesive; and heating the wafers to connect the elongate electrodes of both the semiconductor wafers.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：形成第一和第二半导体晶片，每个半导体晶片均包括芯片和细长电极阵列，在将芯片彼此分开的划线上形成凹槽; 用粘合剂涂覆其中一个半导体晶片的表面; 将半导体晶片粘合在一起，同时允许凹槽在其中容纳过多的粘合剂; 并加热晶片以连接两个半导体晶片的细长电极。

公开(公告)号：US20080164575A1

公开(公告)日：2008-07-10

申请号：US11956560

申请日：2007-12-14

申请人： Hiroaki Ikeda ,  Masakazu Ishino ,  Hiroyuki Tenmei ,  Naoya Kanda ,  Yasuhiro Naka ,  Kunihiko Nishi

发明人： Hiroaki Ikeda ,  Masakazu Ishino ,  Hiroyuki Tenmei ,  Naoya Kanda ,  Yasuhiro Naka ,  Kunihiko Nishi

IPC分类号： H01L21/46 ,  H01L29/06

CPC分类号： H01L21/46 ,  H01L21/76898 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/50 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/83194 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A method for manufacturing a semiconductor device includes the steps of forming first and second semiconductor wafers each including an array of chips and elongate electrodes, forming a groove on scribe lines separating the chips from one another; coating a surface of one of the semiconductor wafers with adhesive; bonding together the semiconductor wafers while allowing the groove to receive therein excessive adhesive; and heating the wafers to connect the elongate electrodes of both the semiconductor wafers.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：形成第一和第二半导体晶片，每个半导体晶片均包括芯片和细长电极阵列，在将芯片彼此分开的划线上形成凹槽; 用粘合剂涂覆其中一个半导体晶片的表面; 将半导体晶片粘合在一起，同时允许凹槽在其中容纳过多的粘合剂; 并加热晶片以连接两个半导体晶片的细长电极。

公开(公告)号：USRE42972E1

公开(公告)日：2011-11-29

申请号：US11182039

申请日：2005-07-15

申请人： Atsushi Nakamura ,  Kunihiko Nishi

发明人： Atsushi Nakamura ,  Kunihiko Nishi

IPC分类号： H01L23/13 ,  H01L23/48 ,  H01L23/31 ,  H01L23/12 ,  H01L23/498 ,  H01L23/28

CPC分类号： H01L24/49 ,  B29C45/0046 ,  B29C45/14655 ,  B29C45/14836 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/16 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48221 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/85206 ,  H01L2224/85207 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/01082 ,  H01L2224/13111 ,  H01L2924/0695 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A semiconductor device comprising a semiconductor pellet mounted on a pellet mounting area of the main surface of a base substrate, in which first electrode pads arranged on the back of the base substrate are electrically connected to bonding pads arranged on the main surface of the semiconductor pellet. The base substrate is formed of a rigid substrate, and its first electrode pads are electrically connected to the second electrode pads arranged on its reverse side. The semiconductor pellet is mounted on the pellet mounting area of the main surface of the base substrate, with its main surface downward, and its bonding pads are connected electrically with the second electrode pads of the base substrate through bonding wires passing through slits formed in the base substrate.

摘要翻译： 一种半导体器件，包括安装在基底基板的主表面的芯片安装区域上的半导体芯片，其中布置在基底衬底背面的第一电极焊盘电连接到布置在半导体芯片的主表面上的焊盘 。 基底由刚性基板形成，其第一电极焊盘电连接到布置在其背面的第二电极焊盘。 半导体芯片安装在基板的主表面的芯片安装区域上，其主表面向下，并且其焊盘通过穿过形成在其中的狭缝的接合线与基底衬底的第二电极焊盘电连接 基底。

公开(公告)号：US07678706B2

公开(公告)日：2010-03-16

申请号：US11780585

申请日：2007-07-20

申请人： Yoshinori Miyaki ,  Hiromichi Suzuki ,  Kazunari Suzuki ,  Takafumi Nishita ,  Fujio Ito ,  Kunihiro Tsubosaki ,  Akihiko Kameoka ,  Kunihiko Nishi

发明人： Yoshinori Miyaki ,  Hiromichi Suzuki ,  Kazunari Suzuki ,  Takafumi Nishita ,  Fujio Ito ,  Kunihiro Tsubosaki ,  Akihiko Kameoka ,  Kunihiko Nishi

IPC分类号： H01L21/302

CPC分类号： H01L24/27 ,  H01L21/56 ,  H01L23/3142 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/562 ,  H01L24/28 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/743 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/274 ,  H01L2224/29007 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32014 ,  H01L2224/32055 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/743 ,  H01L2224/83192 ,  H01L2224/83855 ,  H01L2224/85 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/01028 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/85399

摘要： The occurrence of a package crack in the back vicinity of a die pad is restrained by making the outward appearance of the die pad of a lead frame smaller than that of a semiconductor chip which is mounted on it, and also the occurrence of a package crack in the main surface vicinity of the semiconductor chip is restrained by forming a layer of organic material with good adhesion property with the resin that constitutes the package body on the final passivation film (final passivation film) that covers the top layer of conductive wirings of the semiconductor chip.

摘要翻译： 通过使引线框架的管芯焊盘的外观比安装在其上的半导体芯片的外观更小，从而抑制芯片焊盘背面附近的封装裂缝的发生，并且还发生封装裂纹 通过在最终钝化膜（最终钝化膜）上形成覆盖顶层导电布线的最终钝化膜（最终钝化膜）的与构成封装体的树脂具有良好粘附性的有机材料层来抑制半导体芯片附近的主表面。 半导体芯片