摘要:
A semiconductor structure includes an electrically conductive structure formed upon an uppermost organic layer of a semiconductor substrate. A capping layer is formed upon the uppermost organic layer covering the electrically conductive structure. A maskless selective removal lasering technique ejects portions of the capping layer while retaining the portion of the capping layer covering the electrically conductive structure. Portions of the capping layer are ejected from the uppermost organic layer by a shockwave as a result of the laser beam vaporizing the uppermost organic layer of the semiconductor substrate. Portions of the capping layer contacting the electrically conductive structure are retained by the conductive structure dissipating heat from the laser that would otherwise vaporize the uppermost organic layer of the semiconductor substrate.
摘要:
Alignment marks on a semiconductor device surface are exposed and exposed surfaces cleaned after an obscuring coating is applied over the surface and marks. The surface can be an attachment surface of the device and can include C4 solder bumps of a flip-chip type device and the coating can include a wafer level underfill coating that is substantially optically opaque. Laser ablation, such as with a UV laser, can remove the coating while minimizing heat transfer to the device.
摘要:
A method including forming a stack of layers on top of a dielectric layer and within an opening in the dielectric layer, the stack of layers comprising a first layer, a second layer, a third layer, and a fourth layer, each formed successively one on top of another, removing a first portion of the fourth layer outside the opening to expose a portion of the third layer, a second portion of the fourth layer remains within the opening, filling the opening with a metal by applying an electrical potential to the second layer during an electroplating technique in which the metal plates out on the fourth layer but does not plate out on the third layer, and removing portions of the first layer, the second layer, and the third layer to expose an upper surface of the dielectric layer between the opening and an adjacent opening.
摘要:
A semiconductor structure includes an electrically conductive structure formed upon an uppermost organic layer of a semiconductor substrate. A capping layer is formed upon the uppermost organic layer covering the electrically conductive structure. A maskless selective removal lasering technique ejects portions of the capping layer while retaining the portion of the capping layer covering the electrically conductive structure. Portions of the capping layer are ejected from the uppermost organic layer by a shockwave as a result of the laser beam vaporizing the uppermost organic layer of the semiconductor substrate. Portions of the capping layer contacting the electrically conductive structure are retained by the conductive structure dissipating heat from the laser that would otherwise vaporize the uppermost organic layer of the semiconductor substrate.
摘要:
A method of selectively locating a barrier layer on a substrate includes forming a barrier layer on a surface of the substrate. The barrier layer comprises of a metal element and a non-metal element. The barrier layer may also be formed from a metal element and non-metal element. The method further includes forming an electrically conductive film layer on the barrier layer, and forming a metallic portion in the electrically conductive film layer. The method further includes selectively ablating portions of the barrier layer from the dielectric layer to selectively locate place the barrier layer on the substrate.
摘要:
A laser etching system includes a laser source configured to generate a plurality of laser pulses during an etching pass. A workpiece is aligned with respect to the laser source. The workpiece includes an etching material that is etched in response to receiving the plurality of laser pulses. A mask reticle is interposed between the laser source and the workpiece. The mask reticle includes at least one mask pattern configured to regulate the fluence or a number of laser pulses realized by the workpiece such that a plurality of features having different depths with respect to one another are etched in the etching material.
摘要:
Electronic devices including solder bumps embedded in a pre-applied coating of underfill material and/or solder resist are fabricated, thereby improving chip-package interaction reliability. Underfill can be directly applied to a wafer, enabling increased filler loadings. Passages formed in the underfill and/or solder resist coating expose electrically conductive pads or metal pillars. Such passages can be filled with molten solder to form the solder bumps.
摘要:
An ablation system includes an ablation tool configured to generate an energy beam to ablate an energy-sensitive material formed on at least one embedded feature of a workpiece. The ablation tool selects an initial fluence and an initial pulse rate of the energy beam to ablate a first portion of the energy-sensitive layer. The ablation tool further reduces at least one of the initial fluence and the initial pulse rate of the energy beam to ablate a second remaining portion of the energy-sensitive layer such that the embedded feature is exposed without being damaged or deformed.
摘要:
A method of selectively locating a barrier layer on a substrate includes forming a barrier layer on a surface of the substrate. The barrier layer comprises of a metal element and a non-metal element. The barrier layer may also be formed from a metal element and non-metal element. The method further includes forming an electrically conductive film layer on the barrier layer, and forming a metallic portion in the electrically conductive film layer. The method further includes selectively ablating portions of the barrier layer from the dielectric layer to selectively locate place the barrier layer on the substrate.
摘要:
A method of selectively locating a barrier layer on a substrate includes forming a barrier layer on a surface of the substrate. The barrier layer comprises of a metal element and a non-metal element. The barrier layer may also be formed from a metal element and non-metal element. The method further includes forming an electrically conductive film layer on the barrier layer, and forming a metallic portion in the electrically conductive film layer. The method further includes selectively ablating portions of the barrier layer from the dielectric layer to selectively locate place the barrier layer on the substrate.