公开(公告)号：US4920546A

公开(公告)日：1990-04-24

申请号：US176294

申请日：1988-03-31

申请人： Kazuo Iguchi ,  Tetsuo Soejima ,  Kazuo Murano ,  Shigeo Amemiya ,  Hiroaki Komine ,  Toshiaki Watanabe ,  Tomohiro Shinomiya

发明人： Kazuo Iguchi ,  Tetsuo Soejima ,  Kazuo Murano ,  Shigeo Amemiya ,  Hiroaki Komine ,  Toshiaki Watanabe ,  Tomohiro Shinomiya

IPC分类号： H04J3/06

CPC分类号： H04J3/0605

摘要： Disclosed is a frame synchronizing apparatus in a receiving equipment for receiving digital signals for PCM communication. The digital signals consists serial signals at a rate of f.sub.0 (bps). The serial signals include a frame synchronizing signal consituting n bits or a part of the frame synchronizing signal, collectively arranged in one frame. To attain a high-speed operation and a shorter synchronization establishing time, the apparatus comprises a latching circuit for converting the serial signals into parallel signals and for latching the parallel signals, and a circuit for detecting a plural number of times of synchronization during the n bit interval in one frame.

公开(公告)号：US4977558A

公开(公告)日：1990-12-11

申请号：US485833

申请日：1990-02-28

申请人： Kazuo Iguchi ,  Tetsuo Soejima ,  Toshiaki Watanabe ,  Shigeo Amemiya

发明人： Kazuo Iguchi ,  Tetsuo Soejima ,  Toshiaki Watanabe ,  Shigeo Amemiya

IPC分类号： H04J3/06

CPC分类号： H04J3/0602

摘要： A circuit which operates at the fixed timing and discriminates the control signal is provided and the timing pulse for demultiplexing is controlled in accordance with the discriminated control signal in the receiving part of the synchronized multiplexing system in which the basic signals are generated by inserting the control signal required for multiplexing on the frame structure of basic signal rate and the high level multiplexing signal is formed by multiplexing such basic signals, thereby stable correspondence between the channel at the time of multiplexing in the sending side and the channel after the demultiplexing in the receiving side can be ensured.

公开(公告)号：US4984238A

公开(公告)日：1991-01-08

申请号：US320588

申请日：1989-03-08

申请人： Toshiaki Watanabe ,  Kazuo Iguchi ,  Tetsuo Soejima

发明人： Toshiaki Watanabe ,  Kazuo Iguchi ,  Tetsuo Soejima

IPC分类号： H04J3/06 ,  H04L7/08

CPC分类号： H04J3/0605 ,  H04L7/08

摘要： A frame synchronization method in which a synchronization detection of a frame synchronization signal using one of n-multiplexed frame synchronization signals derived from a sequence of frame synchronization signals each delayed by one bit from the preceding frame synchronization signal, a synchronization confirmation as synchronization guard by detecting a repetition of the synchronization detections of the frame synchronization signal, a confirmation of the subsequent frame identification signal based on the synchronization confirmation; and a separation of the received multiplexed signals into a plurality of channels based on the synchronization confirmed frame synchronization signal and the confirmed frame identification signal are carried out.

公开(公告)号：US4920535A

公开(公告)日：1990-04-24

申请号：US284395

申请日：1988-12-14

申请人： Toshiaki Watanabe ,  Kazuo Iguchi ,  Tetsuo Soejima ,  Shinji Ohta

发明人： Toshiaki Watanabe ,  Kazuo Iguchi ,  Tetsuo Soejima ,  Shinji Ohta

IPC分类号： H04J3/04 ,  H04J3/06 ,  H04L7/08

CPC分类号： H04J3/0602 ,  H04J3/047

摘要： A demultiplexing circuit includes a frame synchronization circuit which simultaneously detects the occurrence of a predetermined frame synchronization pattern and the occurrence of a predetermined identification byte within the frame synchronization pattern. Since the pattern and identification bit are detected simultaneously and from the same data, the circuit is simplified and the demultiplexing is performed more quickly and efficiently.

公开(公告)号：US4975913A

公开(公告)日：1990-12-04

申请号：US250167

申请日：1988-09-28

申请人： Toshiaki Watanabe ,  Kazuo Murano ,  Tetsuo Soejima

发明人： Toshiaki Watanabe ,  Kazuo Murano ,  Tetsuo Soejima

IPC分类号： H04J3/06 ,  H04J3/16 ,  H04L7/033 ,  H04Q11/04

CPC分类号： H04Q11/0428 ,  H04J3/1641 ,  H04L7/0331 ,  H04J3/0685

摘要： A programmable multiplexing/demultiplexing system used in a digital communication network, suitable for an ISDN to be developed. The system including a phase adjusting unit, a bit length varying unit, a start timing control unit, and a processor which variably controls the three units. The phase adjusting unit variably controls the phase of an internal clock in accordance with received data, and the thus-adjusted clock is used by the remaining two units. The bit length varying unit variably controls the bit length of the received data. The start timing control variably controls the start timing of each transmission and reception processing carried out alternately by the processor.

公开(公告)号：US20070061679A1

公开(公告)日：2007-03-15

申请号：US11584584

申请日：2006-10-23

申请人： Yoshihiro Kikuchi ,  Toshiaki Watanabe ,  Kenshi Dachiku ,  Takeshi Chujoh ,  Takeshi Nagai ,  Toshiaki Watanabe ,  Kenshi Dachiku ,  Takeshi Chujoh ,  Takeshi Nagai

发明人： Yoshihiro Kikuchi ,  Toshiaki Watanabe ,  Kenshi Dachiku ,  Takeshi Chujoh ,  Takeshi Nagai ,  Toshiaki Watanabe ,  Kenshi Dachiku ,  Takeshi Chujoh ,  Takeshi Nagai

IPC分类号： H03M13/00

CPC分类号： H04L1/0042 ,  G11B20/1813 ,  G11B27/3027 ,  H03M13/15 ,  H03M13/152 ,  H03M13/23 ,  H03M13/33 ,  H03M13/356 ,  H04J3/0602 ,  H04L1/0041 ,  H04L1/0047 ,  H04L1/0068 ,  H04L1/007 ,  H04L1/0075 ,  H04L1/0079 ,  H04L1/0083 ,  H04L7/041 ,  H04L7/048 ,  H04L2001/0098 ,  H04N7/56 ,  H04N19/00 ,  H04N19/61 ,  H04N19/68 ,  H04N19/70 ,  H04N19/89

摘要： In a coding system wherein an error correction/detection coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detection are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.

摘要翻译： 在其中纠错/检测编码与使用同步码的同步恢复技术组合的编码系统中，解决了由于错误检测引起的伪同步和失步的问题。 提供了一个用于将输入的多路复用代码串201编码到包括信息位和校验位的纠错/检测码的编码部分212，以及代码串组合部分213，用于将同步码插入多个周期性的任一个 代码串201中的预定同步代码插入位置，用于将信息位布置在代码串中的可选位置处，并且用于将校验位排列在代码串201中的同步代码插入位置以外的位置，以组合输出 代码串205。

公开(公告)号：US20070061678A1

公开(公告)日：2007-03-15

申请号：US11584583

申请日：2006-10-23

申请人： Yoshihiro Kikuchi ,  Toshiaki Watanabe ,  Kenshi Dachiku ,  Takeshi Chujoh ,  Takeshi Nagai ,  Toshiaki Watanabe ,  Kenshi Dachiku ,  Takeshi Chujoh ,  Takeshi Nagai

发明人： Yoshihiro Kikuchi ,  Toshiaki Watanabe ,  Kenshi Dachiku ,  Takeshi Chujoh ,  Takeshi Nagai ,  Toshiaki Watanabe ,  Kenshi Dachiku ,  Takeshi Chujoh ,  Takeshi Nagai

IPC分类号： H03M13/00

CPC分类号： H04L1/0042 ,  G11B20/1813 ,  G11B27/3027 ,  H03M13/15 ,  H03M13/152 ,  H03M13/23 ,  H03M13/33 ,  H03M13/356 ,  H04J3/0602 ,  H04L1/0041 ,  H04L1/0047 ,  H04L1/0068 ,  H04L1/007 ,  H04L1/0075 ,  H04L1/0079 ,  H04L1/0083 ,  H04L7/041 ,  H04L7/048 ,  H04L2001/0098 ,  H04N7/56 ,  H04N19/00 ,  H04N19/61 ,  H04N19/68 ,  H04N19/70 ,  H04N19/89

摘要： In a coding system where in an error correction/detection coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detection are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting-/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.

摘要翻译： 在将错误校正/检测编码与使用同步码的同步恢复技术组合的编码系统中，解决了由于错误检测引起的伪同步和失步的问题。 提供了编码部分212，用于将输入的多路复用代码串201编码到包括信息位和校验位的纠错/检测码，以及代码串组合部分213，用于将同步码插入到多个 在代码串201中周期性地预定的同步代码插入位置，用于将信息位布置在代码串中的可选位置处，并且用于将校验位排列在代码串201中的同步代码插入位置以外的位置，以组合 输出代码串205。

公开(公告)号：US09482888B2

公开(公告)日：2016-11-01

申请号：US13877603

申请日：2011-10-05

申请人： Shinji Makikawa ,  Toshiaki Watanabe ,  Akio Yamanaka ,  Hirotaka Naruse

发明人： Shinji Makikawa ,  Toshiaki Watanabe ,  Akio Yamanaka ,  Hirotaka Naruse

IPC分类号： G02F1/09 ,  C01F17/00 ,  G02B1/00 ,  G02F1/095 ,  C30B13/24 ,  C30B15/08 ,  C30B29/22 ,  G02F1/00 ,  H01S3/00

CPC分类号： G02F1/0955 ,  C01F17/0018 ,  C01F17/0043 ,  C01P2002/50 ,  C01P2006/60 ,  C30B13/24 ,  C30B15/08 ,  C30B29/22 ,  G02B1/00 ,  G02F1/0036 ,  H01S3/0064

摘要： It is an object of the present invention to provide a magneto-optical material containing as a main component an oxide that includes a terbium oxide and having a large Verdet constant at a wavelength in the 1.06 μm region (0.9 to 1.1 μm) and high transparency, and to provide a small-sized optical isolator suitably used in a fiber laser for a processing machine. The magneto-optical material of the present invention contains an oxide represented by Formula (I), TbxR1−x)2O3, where x satisfies 0.4≦×≦1.0 and R includes at least one element selected from the group consisting of scandium, yttrium, and lanthanoid elements other than terbium, at a content of at least 99 wt %.

摘要翻译： 本发明的目的是提供一种磁光材料，其包含氧化物作为主要成分，所述氧化物包括氧化铽，并且在1.06μm区域（0.9至1.1μm）中的波长处具有较大的Verdet常数，并且高透明度 并且提供适用于用于加工机器的光纤激光器中的小型光隔离器。 本发明的磁光材料含有由式（I）表示的氧化物，TbxR1-x）2O3，其中x满足0.4≤x≤1.0，并且R包括选自钪，钇， 和铽以外的镧系元素，含量至少为99重量％。

公开(公告)号：US08951603B2

公开(公告)日：2015-02-10

申请号：US13471845

申请日：2012-05-15

申请人： Toshiaki Watanabe ,  Hideaki Sakurai ,  Nobuyuki Soyama ,  Toshihiro Doi

发明人： Toshiaki Watanabe ,  Hideaki Sakurai ,  Nobuyuki Soyama ,  Toshihiro Doi

IPC分类号： B05D5/12 ,  B32B9/04 ,  H01L49/02 ,  H01L21/02 ,  H01L41/08 ,  H01L41/318 ,  H01L41/319 ,  H01L21/28 ,  H01L41/187

CPC分类号： H01L41/1876 ,  C30B1/023 ,  C30B29/16 ,  H01L21/02186 ,  H01L21/02194 ,  H01L21/02197 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/28291 ,  H01L28/55 ,  H01L28/56 ,  H01L28/65 ,  H01L28/75 ,  H01L29/516 ,  H01L35/22 ,  H01L35/34 ,  H01L41/0815 ,  H01L41/318 ,  H01L41/319 ,  Y10T428/249921 ,  Y10T428/25 ,  Y10T428/26 ,  Y10T428/265

摘要： A method for producing a ferroelectric thin film comprising: coating a composition for forming a ferroelectric thin film on a base electrode of a substrate having a substrate body and the base electrode that has crystal daces oriented in the (111) direction, calcining the coated composition, and subsequently performing firing the coated composition to crystallize the coated composition, and thereby forming a ferroelectric thin film on the base electrode, wherein the method includes formation of an orientation controlling layer by coating the composition on the base electrode, calcining the coated composition, and firing the coated composition, where an amount of the composition coated on the base electrode is controlled such that a thickness of the orientation controlling layer after crystallization is in a range of 5 nm to 30 nm, and thereby controlling the preferential crystal orientation of the orientation controlling layer to be in the (110) plane.

摘要翻译： 一种铁电薄膜的制造方法，其特征在于，在具有基板主体的基板的基极上涂布形成铁电薄膜的组合物，并且在（111）方向上取向晶体取向的基极，对所述涂布组合物进行煅烧 ，然后进行焙烧，使涂布的组合物结晶，使基底电极上形成铁电薄膜，其中，该方法包括通过将该组合物涂布在基极上，煅烧涂布组合物而形成取向控制层， 并且对涂覆组合物进行焙烧，其中涂覆在基极上的组合物的量被控制为使结晶后的取向控制层的厚度在5nm至30nm的范围内，从而控制 取向控制层位于（110）面。

公开(公告)号：US08773521B2

公开(公告)日：2014-07-08

申请号：US12516074

申请日：2007-11-22

申请人： Toshiaki Watanabe ,  Ryo Karasawa

发明人： Toshiaki Watanabe ,  Ryo Karasawa

IPC分类号： A62B1/04

CPC分类号： A61B1/041 ,  A61B1/00096 ,  A61B1/00165 ,  A61B1/00181 ,  A61B1/043 ,  A61B1/0638 ,  A61B1/07

摘要： The distal end of an inserted portion, having a simple structure, is reduced in diameter, loss of light incident from a body cavity is reduced, and light from two different directions is observed simultaneously and in a separated fashion. Provided is an endoscope apparatus (1) including an inserted portion (2) to be inserted inside a body cavity; a first dichroic mirror (8), disposed in a distal end portion of the inserted portion (2), that transmits light (L4) in a first wavelength band, which is incident from a longitudinal axial direction and that deflects light (L2) in a second wavelength band, which is incident from a radial direction, in the longitudinal axial direction, thereby multiplexing it with the light (L4) in the first wavelength band; a second dichroic mirror (13) that splits the light (L2, L4) multiplexed by the first dichroic mirror (8) into each wavelength band; and two image-acquisition units (16, 17) that respectively acquire the light (L2, L4) in the first and second wavelength bands split by the second dichroic mirror (13).

摘要翻译： 具有简单结构的插入部分的远端的直径减小，从体腔入射的光的损失减少，并且同时并以分离的方式观察来自两个不同方向的光。 提供一种内窥镜装置（1），其具有插入体腔内的插入部（2） 设置在所述插入部分（2）的远端部分中的第一分色镜（8），其透射从纵向轴向入射的第一波长带中的光（L4），并使光（L2）偏转 从纵向轴向从径向入射的第二波长带，由此将其与第一波长带中的光（L4）进行多路复用; 将由所述第一分色镜（8）复用的光（L2，L4）分割成各波长带的第二分色镜（13） 以及分别获取由第二分色镜（13）分割的第一和第二波长带中的光（L2，L4）的两个图像获取单元（16,17）。