公开(公告)号：US09543252B2

公开(公告)日：2017-01-10

申请号：US14412778

申请日：2012-07-11

申请人： Mamoru Terai ,  Shiori Idaka ,  Kei Yamamoto ,  Yoshiyuki Nakaki

发明人： Mamoru Terai ,  Shiori Idaka ,  Kei Yamamoto ,  Yoshiyuki Nakaki

IPC分类号： H01L23/00 ,  H01L23/495 ,  H01L23/29 ,  H01L23/373 ,  H01L21/56 ,  H01L21/78 ,  H01L29/16 ,  H01L23/31 ,  H01L23/433 ,  H01L25/07

CPC分类号： H01L23/562 ,  H01L21/56 ,  H01L21/78 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/3171 ,  H01L23/3185 ,  H01L23/3736 ,  H01L23/4334 ,  H01L23/49579 ,  H01L24/03 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/072 ,  H01L29/1608 ,  H01L2224/02166 ,  H01L2224/0382 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/29101 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/4847 ,  H01L2224/73265 ,  H01L2924/10272 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A plurality of semiconductor devices provided on a silicon carbide substrate are provided with electrode layers, respectively. The silicon carbide substrate is cut at a region of an exposed surface of the silicon carbide substrate that separates the electrode layers to individually separate the semiconductor devices. A stress relaxation resin is applied to each individually separated semiconductor device to cover the exposed surface at a peripheral end portion of that surface of the semiconductor device which has the electrode layer thereon. A semiconductor apparatus can thus be obtained that also allows a semiconductor device with a silicon carbide or similar compound semiconductor substrate to adhere to a sealant resin via large adhesive strength and thus allows the sealant resin to be less crackable, less peelable and the like by thermal stress caused in operation.

摘要翻译： 设置在碳化硅衬底上的多个半导体器件分别设置有电极层。 在碳化硅衬底的暴露表面的区域处切割碳化硅衬底，其分离电极层以单独地分离半导体器件。 应力松弛树脂被施加到每个单独分离的半导体器件以覆盖其上具有电极层的半导体器件的该表面的外周端部处的暴露表面。 因此，可以获得半导体装置，其也允许具有碳化硅或类似化合物半导体衬底的半导体器件通过大的粘合强度粘附到密封剂树脂，并且因此允许密封剂树脂通过热可靠性更小，可剥离性更差 操作引起的压力。

公开(公告)号：US20150171026A1

公开(公告)日：2015-06-18

申请号：US14412778

申请日：2012-07-11

申请人： Mamoru Terai ,  Shiori Idaka ,  Kei Yamamoto ,  Yoshiyuki Nakaki

发明人： Mamoru Terai ,  Shiori Idaka ,  Kei Yamamoto ,  Yoshiyuki Nakaki

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/495 ,  H01L23/29 ,  H01L23/373 ,  H01L21/78 ,  H01L29/16

CPC分类号： H01L23/562 ,  H01L21/56 ,  H01L21/78 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/3171 ,  H01L23/3185 ,  H01L23/3736 ,  H01L23/4334 ,  H01L23/49579 ,  H01L24/03 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/072 ,  H01L29/1608 ,  H01L2224/02166 ,  H01L2224/0382 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/29101 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/4847 ,  H01L2224/73265 ,  H01L2924/10272 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A plurality of semiconductor devices provided on a silicon carbide substrate are provided with electrode layers, respectively. The silicon carbide substrate is cut at a region of an exposed surface of the silicon carbide substrate that separates the electrode layers to individually separate the semiconductor devices. A stress relaxation resin is applied to each individually separated semiconductor device to cover the exposed surface at a peripheral end portion of that surface of the semiconductor device which has the electrode layer thereon. A semiconductor apparatus can thus be obtained that also allows a semiconductor device with a silicon carbide or similar compound semiconductor substrate to adhere to a sealant resin via large adhesive strength and thus allows the sealant resin to be less crackable, less peelable and the like by thermal stress caused in operation.

摘要翻译： 设置在碳化硅衬底上的多个半导体器件分别设置有电极层。 在碳化硅衬底的暴露表面的区域处切割碳化硅衬底，其分离电极层以单独地分离半导体器件。 应力松弛树脂被施加到每个单独分离的半导体器件以覆盖其上具有电极层的半导体器件的该表面的外周端部处的暴露表面。 因此，可以获得半导体装置，其也允许具有碳化硅或类似化合物半导体衬底的半导体器件通过大的粘合强度粘附到密封剂树脂，并且因此允许密封剂树脂通过热可靠性更小，可剥离性更差 操作引起的压力。

公开(公告)号：US20150162219A1

公开(公告)日：2015-06-11

申请号：US14412847

申请日：2012-07-11

申请人： Mamoru Terai ,  Shiori Idaka ,  Yoshiyuki Nakaki ,  Yoshiyuki Suehiro

发明人： Mamoru Terai ,  Shiori Idaka ,  Yoshiyuki Nakaki ,  Yoshiyuki Suehiro

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L29/417 ,  H01L21/78

CPC分类号： H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/4334 ,  H01L23/49503 ,  H01L23/49548 ,  H01L23/49568 ,  H01L23/562 ,  H01L24/36 ,  H01L24/37 ,  H01L24/40 ,  H01L29/417 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40137 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2924/00014 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/84

摘要： A plurality of semiconductor elements for power control are formed on a semiconductor substrate. A stress relaxation resin layer covering a crossing region where band-shaped dicing areas dividing the semiconductor elements adjacent to each other cross is formed. The crossing region is diced to cut the stress relaxation resin layer to obtain the separate semiconductor elements. Accordingly, even with semiconductor elements produced with a compound semiconductor substrate of SiC or the like, a semiconductor device having high adhesive strength with a sealing resin and being less likely to cause cracking or peeling of the sealing resin due to thermal stress during an operation can be obtained.

摘要翻译： 用于功率控制的多个半导体元件形成在半导体衬底上。 覆盖交叉区域的应力松弛树脂层，形成分割相邻的半导体元件交叉的带状切割区域。 切割交叉区域以切割应力松弛树脂层以获得单独的半导体元件。 因此，即使利用SiC等的化合物半导体基板制造的半导体元件，也可以使用与密封树脂相比具有高粘合强度并且不太可能由于操作期间的热应力而引起的密封树脂的破裂或剥离的半导体器件， 得到。

公开(公告)号：US09385007B2

公开(公告)日：2016-07-05

申请号：US14412847

申请日：2012-07-11

申请人： Mamoru Terai ,  Shiori Idaka ,  Yoshiyuki Nakaki ,  Yoshiyuki Suehiro

发明人： Mamoru Terai ,  Shiori Idaka ,  Yoshiyuki Nakaki ,  Yoshiyuki Suehiro

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L29/417 ,  H01L21/78 ,  H01L23/433 ,  H01L23/00 ,  H01L23/495

CPC分类号： H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/4334 ,  H01L23/49503 ,  H01L23/49548 ,  H01L23/49568 ,  H01L23/562 ,  H01L24/36 ,  H01L24/37 ,  H01L24/40 ,  H01L29/417 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40137 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2924/00014 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/84

摘要： A plurality of semiconductor elements for power control are formed on a semiconductor substrate. A stress relaxation resin layer covering a crossing region where band-shaped dicing areas dividing the semiconductor elements adjacent to each other cross is formed. The crossing region is diced to cut the stress relaxation resin layer to obtain the separate semiconductor elements. Accordingly, even with semiconductor elements produced with a compound semiconductor substrate of SiC or the like, a semiconductor device having high adhesive strength with a sealing resin and being less likely to cause cracking or peeling of the sealing resin due to thermal stress during an operation can be obtained.

摘要翻译： 用于功率控制的多个半导体元件形成在半导体衬底上。 覆盖交叉区域的应力松弛树脂层，形成分割相邻的半导体元件交叉的带状切割区域。 切割交叉区域以切割应力松弛树脂层以获得单独的半导体元件。 因此，即使利用SiC等的化合物半导体基板制造的半导体元件，也可以使用与密封树脂相比具有高粘合强度并且不太可能由于操作期间的热应力而引起的密封树脂的破裂或剥离的半导体器件， 得到。

公开(公告)号：US20120286292A1

公开(公告)日：2012-11-15

申请号：US13521586

申请日：2011-01-12

申请人： Yasushi Nakayama ,  Takayoshi Miki ,  Takeshi Oi ,  Kazuhiro Tada ,  Shiori Idaka ,  Shigeru Hasegawa ,  Takeshi Tanaka

发明人： Yasushi Nakayama ,  Takayoshi Miki ,  Takeshi Oi ,  Kazuhiro Tada ,  Shiori Idaka ,  Shigeru Hasegawa ,  Takeshi Tanaka

IPC分类号： H01L29/24 ,  H01L29/16 ,  H01L29/20

CPC分类号： H01L25/18 ,  H01L23/24 ,  H01L23/3135 ,  H01L23/3735 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L29/1608 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/10253 ,  H01L2924/10254 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/12031 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A power semiconductor module in which temperature rise of switching elements made of a Si semiconductor can be suppressed low and efficiency of cooling the module can be enhanced. To that end, the power semiconductor module includes switching elements made of the Si semiconductor and diodes made of a wide-bandgap semiconductor, the diodes are arranged in the middle region of the power semiconductor module, and the switching elements are arranged in both sides or in the periphery of the middle region of the power semiconductor module.

摘要翻译： 可以抑制由Si半导体构成的开关元件的温度上升的功率半导体模块，并且可以提高冷却模块的效率。 为此，功率半导体模块包括由Si半导体制成的开关元件和由宽带隙半导体制成的二极管，二极管被布置在功率半导体模块的中间区域中，并且开关元件布置在两侧或 在功率半导体模块的中间区域的外围。

公开(公告)号：US20070141750A1

公开(公告)日：2007-06-21

申请号：US11637097

申请日：2006-12-12

申请人： Toshihiro Iwasaki ,  Shiori Idaka ,  Yasumichi Hatanaka

发明人： Toshihiro Iwasaki ,  Shiori Idaka ,  Yasumichi Hatanaka

IPC分类号： H01L21/00

CPC分类号： H01L25/0657 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/056 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/1181 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13644 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/141 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/73204 ,  H01L2224/81013 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8182 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A method of manufacturing a semiconductor device includes a first step of forming solder film on metal posts of a mother chip, a second step of forming solder balls after the first step by printing a solder paste on the mother chip and heating the mother chip so that the solder paste is ref lowed, a third step of bonding the metal posts of the mother chip and metal posts of a daughter chip to each other in a thermocompression bonding manner by means of the solder film after the second step, and a fourth step of flip-chip-connecting the mother chip on a circuit substrate by using the solder balls. In the second step, the mother chip is heated in a nitrogen atmosphere in which the oxygen concentration is 500 ppm or less.

摘要翻译： 一种制造半导体器件的方法包括：在母芯片的金属柱上形成焊料膜的第一步骤;第一步骤之后，通过在母芯片上印刷焊膏并加热母芯片，形成焊球的第二步骤， 焊膏被降低，第三步骤是通过在第二步骤之后的焊料膜以热压接方式将母芯片的金属柱和子芯片的金属柱彼此接合，并且第四步骤 通过使用焊球将母芯片倒装芯片连接在电路基板上。 在第二步中，在氧浓度为500ppm以下的氮气氛中加热母体芯片。

公开(公告)号：US20140138707A1

公开(公告)日：2014-05-22

申请号：US14131581

申请日：2012-07-05

申请人： Takayoshi Miki ,  Yasushi Nakayama ,  Takeshi Oi ,  Kazuhiro Tada ,  Shiori Idaka ,  Shigeru Hasegawa ,  Tomohiro Kobayashi ,  Yukio Nakashima

发明人： Takayoshi Miki ,  Yasushi Nakayama ,  Takeshi Oi ,  Kazuhiro Tada ,  Shiori Idaka ,  Shigeru Hasegawa ,  Tomohiro Kobayashi ,  Yukio Nakashima

IPC分类号： H01L25/18 ,  H01L23/28

CPC分类号： H01L23/28 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/36 ,  H01L23/3735 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/48227 ,  H01L2224/49111 ,  H01L2224/4917 ,  H01L2224/49175 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

摘要： A power semiconductor module is provided which is capable of keeping low the degrees of increases in temperatures of wide bandgap semiconductor elements, reducing the degree of increase in chip's total surface area of the wide bandgap semiconductor elements, and being fabricated at low costs, when Si semiconductor elements and the wide bandgap semiconductor elements are placed within one and the same power semiconductor module. The Si semiconductor elements are placed in a central region of the power semiconductor module, and the wide bandgap semiconductor elements are placed on opposite sides relative to the central region or in edge regions surrounding the central region.

摘要翻译： 提供功率半导体模块，其能够保持宽带隙半导体元件的温度升高程度，降低宽带隙半导体元件的芯片总表面积的增加程度，并且以低成本制造，当Si 半导体元件和宽带隙半导体元件放置在同一个功率半导体模块内。 Si半导体元件被放置在功率半导体模块的中心区域中，并且宽带隙半导体元件相对于中心区域或围绕中心区域的边缘区域放置在相对侧上。

公开(公告)号：US07951699B2

公开(公告)日：2011-05-31

申请号：US11637097

申请日：2006-12-12

申请人： Toshihiro Iwasaki ,  Shiori Idaka ,  Yasumichi Hatanaka

发明人： Toshihiro Iwasaki ,  Shiori Idaka ,  Yasumichi Hatanaka

IPC分类号： H01L21/603 ,  H01L33/62

CPC分类号： H01L25/0657 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/056 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/1181 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13644 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/141 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/73204 ,  H01L2224/81013 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8182 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A method of manufacturing a semiconductor device includes a first step of forming solder film on metal posts of a mother chip, a second step of forming solder balls after the first step by printing a solder paste on the mother chip and heating the mother chip so that the solder paste is ref lowed, a third step of bonding the metal posts of the mother chip and metal posts of a daughter chip to each other in a thermocompression bonding manner by means of the solder film after the second step, and a fourth step of flip-chip-connecting the mother chip on a circuit substrate by using the solder balls. In the second step, the mother chip is heated in a nitrogen atmosphere in which the oxygen concentration is 500 ppm or less.

摘要翻译： 一种制造半导体器件的方法包括：在母芯片的金属柱上形成焊料膜的第一步骤;第一步骤之后，通过在母芯片上印刷焊膏并加热母芯片，形成焊球的第二步骤， 焊膏被降低，第三步骤是通过在第二步骤之后的焊料膜以热压接方式将母芯片的金属柱和子芯片的金属柱彼此接合，并且第四步骤 通过使用焊球将母芯片倒装芯片连接在电路基板上。 在第二步中，在氧浓度为500ppm以下的氮气氛中加热母体芯片。

公开(公告)号：US09299628B2

公开(公告)日：2016-03-29

申请号：US14131581

申请日：2012-07-05

申请人： Takayoshi Miki ,  Yasushi Nakayama ,  Takeshi Oi ,  Kazuhiro Tada ,  Shiori Idaka ,  Shigeru Hasegawa ,  Tomohiro Kobayashi ,  Yukio Nakashima

发明人： Takayoshi Miki ,  Yasushi Nakayama ,  Takeshi Oi ,  Kazuhiro Tada ,  Shiori Idaka ,  Shigeru Hasegawa ,  Tomohiro Kobayashi ,  Yukio Nakashima

IPC分类号： H01L23/28 ,  H01L25/18 ,  H01L25/07 ,  H01L23/31 ,  H01L23/373 ,  H01L23/36

CPC分类号： H01L23/28 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/36 ,  H01L23/3735 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/48227 ,  H01L2224/49111 ,  H01L2224/4917 ,  H01L2224/49175 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

摘要： A power semiconductor module is provided which is capable of keeping low the degrees of increases in temperatures of wide bandgap semiconductor elements, reducing the degree of increase in chip's total surface area of the wide bandgap semiconductor elements, and being fabricated at low costs, when Si semiconductor elements and the wide bandgap semiconductor elements are placed within one and the same power semiconductor module. The Si semiconductor elements are placed in a central region of the power semiconductor module, and the wide bandgap semiconductor elements are placed on opposite sides relative to the central region or in edge regions surrounding the central region.

摘要翻译： 提供功率半导体模块，其能够保持宽带隙半导体元件的温度升高程度，降低宽带隙半导体元件的芯片总表面积的增加程度，并且以低成本制造，当Si 半导体元件和宽带隙半导体元件放置在同一个功率半导体模块内。 Si半导体元件被放置在功率半导体模块的中心区域中，并且宽带隙半导体元件相对于中心区域或围绕中心区域的边缘区域放置在相对侧上。

公开(公告)号：US08575745B2

公开(公告)日：2013-11-05

申请号：US13223600

申请日：2011-09-01

申请人： Seiji Oka ,  Shiori Idaka ,  Hiroshi Yoshida

发明人： Seiji Oka ,  Shiori Idaka ,  Hiroshi Yoshida

IPC分类号： H01L23/48 ,  H01L23/04

CPC分类号： H05K3/325 ,  H01L2924/0002 ,  H05K2201/0311 ,  H05K2201/10166 ,  H05K2201/1031 ,  H05K2201/1059 ,  Y02P70/611 ,  H01L2924/00

摘要： A power semiconductor device includes a conductive insertion member as an external terminal projecting from a surface of the power semiconductor device facing a printed wiring board. The printed wiring board includes a conductive fitting member mounted on a pad part of the printed wiring board. The fitting member receives the insertion member therein when the power semiconductor device is connected to the printed wiring board. The insertion member has a recessed portion formed on a side surface of the insertion member. The fitting member has a projecting portion with elasticity formed on an inner side surface of the fitting member. The elasticity causes the projecting portion of the fitting member to contact the recessed portion of the insertion member under pressure when the insertion member is inserted into the fitting member.

摘要翻译： 功率半导体器件包括作为外部端子的导电插入构件，其从面向印刷线路板的功率半导体器件的表面突出。 印刷线路板包括安装在印刷线路板的焊盘部分上的导电配件。 当功率半导体器件连接到印刷线路板时，配件构件在其中容纳插入构件。 插入构件具有形成在插入构件的侧表面上的凹部。 装配构件具有形成在装配构件的内侧表面上的弹性的突出部分。 当插入构件插入到装配构件中时，弹性使得装配构件的突出部分在压力下接触插入构件的凹部。