公开(公告)号：US06054371A

公开(公告)日：2000-04-25

申请号：US162155

申请日：1998-09-29

申请人： Masakatsu Tsuchiaki ,  Yasushi Nakasaki ,  Akira Nishiyama ,  Yukihito Oowaki ,  Hirotaka Nishino

发明人： Masakatsu Tsuchiaki ,  Yasushi Nakasaki ,  Akira Nishiyama ,  Yukihito Oowaki ,  Hirotaka Nishino

IPC分类号： H01L21/762 ,  H01L21/02 ,  H01L21/68 ,  H01L25/04 ,  H01L25/18 ,  H01L27/108 ,  H01L27/12 ,  H01L21/30 ,  H01L21/00 ,  H01L21/44 ,  H01L21/46 ,  H01L21/84

CPC分类号： H01L21/6835 ,  H01L2221/68313 ,  H01L27/10897 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3025

摘要： Disclosed is a method of manufacturing a semiconductor device, comprising the step of detachably mounting a plurality of semiconductor substrates to a first holder board so as to form a complex semiconductor substrate, and the step of subjecting the plural semiconductor substrates included in the complex semiconductor substrates to common steps of manufacturing a semiconductor device. At least one of the plural semiconductor substrates is mounted to a second holder board. The particular semiconductor substrate is detached from the second holder board and, then, mounted to the first holder board. Alternatively, at least one of the plural semiconductor substrates is detached from the first holder board and, then, mounted to a third holder board differing in size from the first holder board.

摘要翻译： 公开了一种制造半导体器件的方法，包括以下步骤：将多个半导体衬底可拆卸地安装到第一保持器板以形成复合半导体衬底;以及对包含在复合半导体衬底中的多个半导体衬底进行处理的步骤 涉及制造半导体器件的常规步骤。 多个半导体衬底中的至少一个安装到第二保持器板。 特定的半导体衬底从第二保持器板分离，然后安装到第一保持器板。 或者，多个半导体衬底中的至少一个从第一保持器板分离，然后安装到尺寸与第一保持器板不同的第三保持器板。

公开(公告)号：US20090236653A1

公开(公告)日：2009-09-24

申请号：US12453928

申请日：2009-05-27

申请人： Shoko Kikuchi ,  Naoki Yasuda ,  Koichi Muraoka ,  Yukie Nishikawa ,  Hirotaka Nishino

发明人： Shoko Kikuchi ,  Naoki Yasuda ,  Koichi Muraoka ,  Yukie Nishikawa ,  Hirotaka Nishino

IPC分类号： H01L29/788

CPC分类号： H01L21/28202 ,  H01L21/2807 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/518

摘要： A nonvolatile semiconductor memory device includes a tunnel insulating film, a floating gate electrode, an inter-electrode insulating film, and a control gate electrode. The tunnel insulating film is formed on a selected part of a surface of a semiconductor substrate. The floating gate electrode is formed on the tunnel insulating film. At least that interface region of the floating gate electrode, which is opposite to the substrate, is made of n-type Si or metal-based conductive material. The inter-electrode insulating film is formed on the floating gate electrode and made of high-permittivity material. The control gate electrode is formed on the inter-electrode insulating film. At least that interface region of the control gate electrode, which is on the side of the inter-electrode insulating film, is made of a p-type semiconductor layer containing at least one of Si and Ge.

公开(公告)号：US20090114995A1

公开(公告)日：2009-05-07

申请号：US12200599

申请日：2008-08-28

申请人： Masamichi Suzuki ,  Masato Koyama ,  Yoshinori Tsuchiya ,  Hirotaka Nishino ,  Reika Ichihara ,  Akira Takashima

发明人： Masamichi Suzuki ,  Masato Koyama ,  Yoshinori Tsuchiya ,  Hirotaka Nishino ,  Reika Ichihara ,  Akira Takashima

IPC分类号： H01L27/08 ,  H01L21/3205

CPC分类号： H01L21/823857 ,  H01L21/26506 ,  H01L21/31155 ,  H01L21/823842 ,  H01L29/517 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/7842 ,  H01L29/7846 ,  H01L29/785

摘要： A complementary semiconductor device includes a semiconductor substrate, a first semiconductor region formed on a surface of the semiconductor substrate, a second semiconductor region formed on the surface of the semiconductor substrate apart from the first semiconductor region, an n-MIS transistor having a first gate insulating film including La and Al, formed on the first semiconductor region, and a first gate electrode formed on the gate insulating film, and a p-MIS transistor having a second gate insulating film including La and Al, formed on the second semiconductor region, and a second gate electrode formed on the gate insulating film, an atomic density ratio Al/La in the second gate insulating film being larger than an atomic density ratio Al/La in the first gate insulating film.

摘要翻译： 互补半导体器件包括半导体衬底，形成在半导体衬底的表面上的第一半导体区域，形成在半导体衬底的离开第一半导体区域的表面上的第二半导体区域，具有第一栅极的n-MIS晶体管 形成在第一半导体区域上的包括La和Al的绝缘膜和形成在栅极绝缘膜上的第一栅电极和形成在第二半导体区上的具有包括La和Al的第二栅极绝缘膜的p-MIS晶体管， 以及形成在所述栅极绝缘膜上的第二栅电极，所述第二栅极绝缘膜中的原子密度比Al / La大于所述第一栅极绝缘膜中的原子密度比Al / La。

公开(公告)号：US07767538B2

公开(公告)日：2010-08-03

申请号：US11507007

申请日：2006-08-21

申请人： Hirotaka Nishino ,  Koichi Kato

发明人： Hirotaka Nishino ,  Koichi Kato

IPC分类号： H01L21/26 ,  H01L27/14 ,  H01L27/30

CPC分类号： H01L21/3211 ,  C23C16/56 ,  H01L21/02148 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/02345 ,  H01L21/28273 ,  H01L21/3105 ,  H01L21/31616 ,  H01L21/31645 ,  H01L21/3185

摘要： It is made possible to form a silicon nitride film, an aluminum oxide film and a transition metal high-k insulation film of high quality. A manufacturing method includes: forming an insulation film having at least one kind of bonds selected out of silicon-nitrogen bonds, aluminum-oxygen bonds, transition metal-oxygen-silicon bonds, transition metal-oxygen-aluminum bonds, and transition metal-oxygen bonds on either a film having a semiconductor as a main component or a semiconductor substrate, and irradiating the insulation film with pulse infrared light having a wavelength corresponding to a maximum intensity in a wavelength region depending upon the insulation film and having a wavelength absorbed by the insulation film.

摘要翻译： 可以形成高质量的氮化硅膜，氧化铝膜和过渡金属高k绝缘膜。 一种制造方法包括：形成具有选自硅 - 氮键，铝 - 氧键，过渡金属 - 氧 - 硅键，过渡金属 - 氧 - 铝键和过渡金属 - 氧中的至少一种键的绝缘膜 在具有半导体作为主要成分的膜或半导体衬底上的膜上键合，并且用绝缘膜照射具有与波长区域中的最大强度相对应的波长的脉冲红外光，该波长区域取决于绝缘膜并且具有由 绝缘膜。

公开(公告)号：US20060208320A1

公开(公告)日：2006-09-21

申请号：US11230823

申请日：2005-09-21

申请人： Yoshinori Tsuchiya ,  Masato Koyama ,  Hirotaka Nishino

发明人： Yoshinori Tsuchiya ,  Masato Koyama ,  Hirotaka Nishino

IPC分类号： H01L29/76 ,  H01L21/3205

CPC分类号： H01L21/823835 ,  H01L21/823842 ,  H01L21/823857 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/785

摘要： A MIS-type semiconductor device is configured with a semiconductor substrate, and a p-type MIS transistor, and a n-type MIS transistor which is provided on the semiconductor substrate, the p-type MIS transistor including a gate electrode which is made of Ge and one element which is selected from the group consisting of Ta, V and Nb.

摘要翻译： MIS型半导体器件配置有半导体衬底，p型MIS晶体管和设置在半导体衬底上的n型MIS晶体管，p型MIS晶体管包括栅电极，该栅电极由 Ge和选自Ta，V和Nb中的一种元素。

公开(公告)号：US06933216B2

公开(公告)日：2005-08-23

申请号：US10314364

申请日：2002-12-09

申请人： Atsuko Sakata ,  Keiichi Sasaki ,  Nobuo Hayasaka ,  Katsuya Okumura ,  Hirotaka Nishino

发明人： Atsuko Sakata ,  Keiichi Sasaki ,  Nobuo Hayasaka ,  Katsuya Okumura ,  Hirotaka Nishino

IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L21/60 ,  H01L23/485 ,  H01L21/20

CPC分类号： H01L24/03 ,  H01L23/481 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/742 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/11001 ,  H01L2224/1131 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2924/00011 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/81805

摘要： After a barrier film is formed on a pad electrode, Ni particles having a diameter of 2 μm or less are selectively deposited on the barrier film, thereby forming a Ni fine particle film. Then, a bump electrode made of a solder ball is provided on the pad electrode through the Ni fine particle film. Thereafter, the bump electrode is melted by a heat treatment to join the Ni fine particle film to the bump electrode. Thus, a bump electrode structure is finished.

公开(公告)号：US5864161A

公开(公告)日：1999-01-26

申请号：US526696

申请日：1995-09-11

申请人： Yuichiro Mitani ,  Ichiro Mizushima ,  Shigeru Kambayashi ,  Hirotaka Nishino ,  Masahiro Kashiwagi

发明人： Yuichiro Mitani ,  Ichiro Mizushima ,  Shigeru Kambayashi ,  Hirotaka Nishino ,  Masahiro Kashiwagi

IPC分类号： H01L21/302 ,  H01L21/20 ,  H01L21/205 ,  H01L21/3065 ,  H01L21/316 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/08 ,  H01L29/417 ,  H01L29/45 ,  H01L29/78 ,  H01L29/786 ,  H01L27/01 ,  H01L27/12 ,  H01L29/76

CPC分类号： H01L29/78618 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/823814 ,  H01L29/0847 ,  H01L29/41725 ,  H01L29/41733 ,  H01L29/456 ,  H01L29/458 ,  H01L29/66575 ,  H01L29/66628 ,  H01L29/66636

摘要： A method of manufacturing a semiconductor device includes the steps of forming an insulating film on a silicon region of a substrate having the silicon region on a surface the insulating film having an opening for forming an exposed region of the silicon region, supplying a gas containing a halogen onto the silicon region, and supplying a source gas of silicon onto the silicon region, thereby selectively depositing the silicon on the exposed region of the silicon region.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在具有用于形成硅区域的暴露区域的开口的绝缘膜的表面上的具有硅区域的衬底的硅区上形成绝缘膜的步骤，提供含有 卤素到硅区域，并且将硅源气体供应到硅区域上，由此在硅区域的暴露区域上选择性地沉积硅。

公开(公告)号：US20120117354A1

公开(公告)日：2012-05-10

申请号：US13293399

申请日：2011-11-10

申请人： Kosuke Tatsumura ,  Atsuhiro Kinoshita ,  Hirotaka Nishino ,  Masamichi Suzuki ,  Yoshifumi Nishi ,  Takao Marukame ,  Takahiro Kurita

发明人： Kosuke Tatsumura ,  Atsuhiro Kinoshita ,  Hirotaka Nishino ,  Masamichi Suzuki ,  Yoshifumi Nishi ,  Takao Marukame ,  Takahiro Kurita

IPC分类号： G06F12/02

CPC分类号： H04L49/253 ,  G06F3/0605 ,  G06F3/0635 ,  G06F3/0656 ,  G06F3/0658 ,  G06F3/0683 ,  H04L12/6418 ,  H04L45/74

摘要： According to one embodiment, a storage device includes a plurality of memory nodes. Each of memory nodes includes a plurality of input ports, a plurality of output ports, a selector, a packet controller and a memory. The selector outputs a packet input to the input port to one of the output ports. The packet controller controls the selector. The memory stores data. The memory nodes are mutually connected at the input ports and the output ports. The memory node has an address that is determined by its physical position. The packet controller switches the output port that outputs the packet based on information including at least a destination address of the packet and an address of the memory node having the packet controller when receiving a packet that is not addressed to the memory node having the packet controller.

摘要翻译： 根据一个实施例，存储设备包括多个存储器节点。 每个存储器节点包括多个输入端口，多个输出端口，选择器，分组控制器和存储器。 选择器将输入到输入端口的数据包输出输出到其中一个输出端口。 分组控制器控制选择器。 内存存储数据。 存储器节点在输入端口和输出端口相互连接。 存储器节点具有由其物理位置确定的地址。 当接收到没有寻址到具有分组控制器的存储器节点的分组时，分组控制器基于包括分组的目的地地址的信息和具有分组控制器的存储器节点的地址来切换输出分组的输出端口 。

公开(公告)号：US20120077341A1

公开(公告)日：2012-03-29

申请号：US13081629

申请日：2011-04-07

申请人： Yoshifumi Nishi ,  Atsuhiro Kinoshita ,  Hirotaka Nishino ,  Masamichi Suzuki

发明人： Yoshifumi Nishi ,  Atsuhiro Kinoshita ,  Hirotaka Nishino ,  Masamichi Suzuki

IPC分类号： H01L21/283

CPC分类号： H01L21/28518 ,  H01L29/1608 ,  H01L29/41708 ,  H01L29/456 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/6609 ,  H01L29/66272 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/66712 ,  H01L29/732 ,  H01L29/7833 ,  H01L29/861

摘要： In a semiconductor device manufacturing method according to an exemplary embodiment, a sulfur-containing film containing sulfur is deposited on an n-type semiconductor, a first metal film containing a first metal is deposited on the sulfur-containing film, a heat treatment is performed to form a metal semiconductor compound film by reacting the n-type semiconductor and the sulfur-containing film, and to introduce sulfur to an interface between the n-type semiconductor and the metal semiconductor compound film being formed.

摘要翻译： 在根据示例性实施例的半导体器件制造方法中，在n型半导体上沉积含硫的含硫膜，在含硫膜上沉积含有第一金属的第一金属膜，进行热处理 通过使n型半导体和含硫膜反应形成金属半导体化合物膜，并将硫引入到正在形成的n型半导体和金属半导体化合物膜之间的界面上。

公开(公告)号：US5030319A

公开(公告)日：1991-07-09

申请号：US457946

申请日：1989-12-27

申请人： Hirotaka Nishino ,  Nobuo Hayasaka ,  Haruo Okano

发明人： Hirotaka Nishino ,  Nobuo Hayasaka ,  Haruo Okano

IPC分类号： H01L21/311 ,  H01L21/768

CPC分类号： H01L21/76802 ,  H01L21/31116

摘要： Oxide material, on a substrate, in a reactor, is etched by dissolving a hydrogen halide reaction product in a liquid phase reaction product. Both the hydrogen halide and liquid phase reaction products are produced through a chemical reaction of a reactive gas containing hydrogen and halogen elements as well as at least one gaseous compound which has been remotely activated. The liquid phase reaction product is obtained by condensation on the oxide material. The use of charged particle beams and irradiating light is discussed.