公开(公告)号：US08643185B2

公开(公告)日：2014-02-04

申请号：US12246811

申请日：2008-10-07

申请人： Ryoichi Kajiwara ,  Kazutoshi Itou ,  Hiroi Oka ,  Takuya Nakajo ,  Yuichi Yato

发明人： Ryoichi Kajiwara ,  Kazutoshi Itou ,  Hiroi Oka ,  Takuya Nakajo ,  Yuichi Yato

IPC分类号： H01L23/488 ,  H01L21/60 ,  H01B1/22

CPC分类号： H01L23/49562 ,  H01L23/49513 ,  H01L23/49524 ,  H01L24/16 ,  H01L24/29 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/0603 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/32013 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/8184 ,  H01L2224/83455 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/351 ,  H05K3/321 ,  H05K2201/0116 ,  H05K2201/0218 ,  H05K2201/0272 ,  H05K2201/10636 ,  H05K2203/1131 ,  H05K2203/121 ,  H05K2203/125 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01032 ,  H01L2924/3512 ,  H01L2924/00012

摘要： A die bonding portion is metallically bonded by well-conductive Cu metal powders with a maximum particle diameter of about 15 μm to 200 μm and adhesive layers of Ag, and minute holes are evenly dispersed in a joint layer. With this structure, the reflow resistance of about 260° C. and reliability under thermal cycle test can be ensured without using lead.

摘要翻译： 芯片接合部分由具有约15μm至200μm的最大粒径和Ag的粘合剂层的良好导电的Cu金属粉末金属地结合，并且微孔均匀地分散在接合层中。 利用这种结构，可以在不使用铅的情况下确保约260℃的回流电阻和热循环试验下的可靠性。

公开(公告)号：US20090096100A1

公开(公告)日：2009-04-16

申请号：US12246811

申请日：2008-10-07

申请人： Ryoichi KAJIWARA ,  Kazutoshi Itou ,  Hiroi Oka ,  Takuya Nakajo ,  Yuichi Yato

发明人： Ryoichi KAJIWARA ,  Kazutoshi Itou ,  Hiroi Oka ,  Takuya Nakajo ,  Yuichi Yato

IPC分类号： H01L23/488 ,  H01L21/60 ,  H01B1/22

CPC分类号： H01L23/49562 ,  H01L23/49513 ,  H01L23/49524 ,  H01L24/16 ,  H01L24/29 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/0603 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/32013 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/8184 ,  H01L2224/83455 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/351 ,  H05K3/321 ,  H05K2201/0116 ,  H05K2201/0218 ,  H05K2201/0272 ,  H05K2201/10636 ,  H05K2203/1131 ,  H05K2203/121 ,  H05K2203/125 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01032 ,  H01L2924/3512 ,  H01L2924/00012

摘要： A die bonding portion is metallically bonded by well-conductive Cu metal powders with a maximum particle diameter of about 15 μm to 200 μm and adhesive layers of Ag, and minute holes are evenly dispersed in a joint layer. With this structure, the reflow resistance of about 260° C. and reliability under thermal cycle test can be ensured without using lead.

摘要翻译： 芯片接合部分由具有约15μm至200μm的最大粒径和Ag的粘合剂层的良好导电的Cu金属粉末金属地结合，并且微孔均匀地分散在接合层中。 利用这种结构，可以在不使用铅的情况下确保约260℃的回流电阻和热循环试验下的可靠性。

公开(公告)号：US08252632B2

公开(公告)日：2012-08-28

申请号：US13156280

申请日：2011-06-08

申请人： Yuichi Yato ,  Takuya Nakajo ,  Hiroi Oka

发明人： Yuichi Yato ,  Takuya Nakajo ,  Hiroi Oka

IPC分类号： H01L21/44 ,  H01L21/48

CPC分类号： H01L24/83 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49582 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/743 ,  H01L24/84 ,  H01L2224/04026 ,  H01L2224/274 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/32506 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40091 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/743 ,  H01L2224/83194 ,  H01L2224/83439 ,  H01L2224/83801 ,  H01L2224/83805 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/83855 ,  H01L2224/85205 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/3512 ,  H01L2924/00015 ,  H01L2224/83205 ,  H01L2924/00012

摘要： The present invention enables improvement of bonding reliability of the conductive adhesive interposed between a semiconductor chip and a die pad portion. Provided is a semiconductor device, in which a silicon chip is mounted over the die pad portion integrally formed with a drain lead, has a source pad over the main surface and a drain electrode of a power MOSFET over the back side, and is bonded onto the die pad portion via an Ag paste. In the device, a source lead and the source pad are electrically coupled via an Al ribbon. Over the back surface of the silicon chip, an Ag nanoparticle coated film is formed, while another Ag nanoparticle coated film is formed over the die pad portion and lead (drain lead and source lead).

摘要翻译： 本发明能够提高插入在半导体芯片和芯片焊盘部之间的导电性粘合剂的接合可靠性。 提供了一种半导体器件，其中硅芯片安装在与漏极引线一体形成的芯片焊盘部分上方，在主表面上具有源极焊盘，在背面上具有功率MOSFET的漏电极，并且被接合到 通过Ag浆料的芯片焊盘部分。 在器件中，源极引线和源极焊盘通过铝带电耦合。 在硅芯片的背面上形成Ag纳米颗粒涂层膜，而在芯片焊盘部分和引线（漏极引线和源极引线）之上形成另一Ag纳米颗粒涂覆膜。

公开(公告)号：US07977775B2

公开(公告)日：2011-07-12

申请号：US12360325

申请日：2009-01-27

申请人： Yuichi Yato ,  Takuya Nakajo ,  Hiroi Oka

发明人： Yuichi Yato ,  Takuya Nakajo ,  Hiroi Oka

IPC分类号： H01L23/495

CPC分类号： H01L24/83 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49582 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/743 ,  H01L24/84 ,  H01L2224/04026 ,  H01L2224/274 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/32506 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40091 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/743 ,  H01L2224/83194 ,  H01L2224/83439 ,  H01L2224/83801 ,  H01L2224/83805 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/83855 ,  H01L2224/85205 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/3512 ,  H01L2924/00015 ,  H01L2224/83205 ,  H01L2924/00012

摘要： The present invention enables improvement of bonding reliability of the conductive adhesive interposed between a semiconductor chip and a die pad portion. Provided is a semiconductor device, in which a silicon chip is mounted over the die pad portion integrally formed with a drain lead, has a source pad over the main surface and a drain electrode of a power MOSFET over the back side, and is bonded onto the die pad portion via an Ag paste. In the device, a source lead and the source pad are electrically coupled via an Al ribbon. Over the back surface of the silicon chip, an Ag nanoparticle coated film is formed, while another Ag nanoparticle coated film is formed over the die pad portion and lead (drain lead and source lead).

摘要翻译： 本发明能够提高插入在半导体芯片和芯片焊盘部之间的导电性粘合剂的接合可靠性。 提供了一种半导体器件，其中硅芯片安装在与漏极引线一体形成的芯片焊盘部分上方，在主表面上具有源极焊盘，在背面上具有功率MOSFET的漏电极，并且被接合到 通过Ag浆料的芯片焊盘部分。 在器件中，源极引线和源极焊盘通过铝带电耦合。 在硅芯片的背面上形成Ag纳米颗粒涂层膜，而在芯片焊盘部分和引线（漏极引线和源极引线）之上形成另一Ag纳米颗粒涂覆膜。

公开(公告)号：US20090189264A1

公开(公告)日：2009-07-30

申请号：US12360325

申请日：2009-01-27

申请人： Yuichi Yato ,  Takuya Nakajo ,  Hiroi Oka

发明人： Yuichi Yato ,  Takuya Nakajo ,  Hiroi Oka

IPC分类号： H01L23/52 ,  H01L21/50 ,  H01L21/78

CPC分类号： H01L24/83 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49582 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/743 ,  H01L24/84 ,  H01L2224/04026 ,  H01L2224/274 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/32506 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40091 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/743 ,  H01L2224/83194 ,  H01L2224/83439 ,  H01L2224/83801 ,  H01L2224/83805 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/83855 ,  H01L2224/85205 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/3512 ,  H01L2924/00015 ,  H01L2224/83205 ,  H01L2924/00012

摘要： The present invention enables improvement of bonding reliability of the conductive adhesive interposed between a semiconductor chip and a die pad portion. Provided is a semiconductor device, in which a silicon chip is mounted over the die pad portion integrally formed with a drain lead, has a source pad over the main surface and a drain electrode of a power MOSFET over the back side, and is bonded onto the die pad portion via an Ag paste. In the device, a source lead and the source pad are electrically coupled via an Al ribbon. Over the back surface of the silicon chip, an Ag nanoparticle coated film is formed, while another Ag nanoparticle coated film is formed over the die pad portion and lead (drain lead and source lead).

摘要翻译： 本发明能够提高插入在半导体芯片和芯片焊盘部之间的导电性粘合剂的接合可靠性。 提供了一种半导体器件，其中硅芯片安装在与漏极引线一体形成的芯片焊盘部分上方，在主表面上具有源极焊盘，在背面上具有功率MOSFET的漏电极，并且被接合到 通过Ag浆料的芯片焊盘部分。 在器件中，源极引线和源极焊盘通过铝带电耦合。 在硅芯片的背面上形成Ag纳米颗粒涂层膜，而在芯片焊盘部分和引线（漏极引线和源极引线）之上形成另一Ag纳米颗粒涂覆膜。

公开(公告)号：US20130009300A1

公开(公告)日：2013-01-10

申请号：US13635455

申请日：2010-03-31

申请人： Yuichi Yato ,  Hiroi Oka

发明人： Yuichi Yato ,  Hiroi Oka

IPC分类号： H01L23/495 ,  H01L21/60

CPC分类号： H01L24/73 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/06 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/743 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/03436 ,  H01L2224/04026 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/2612 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29386 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40091 ,  H01L2224/40132 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/49433 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/743 ,  H01L2224/83051 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84205 ,  H01L2224/85205 ,  H01L2224/92157 ,  H01L2224/92166 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01022 ,  H01L2924/01074 ,  H01L2924/01026 ,  H01L2924/01028 ,  H01L2924/0105 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0103 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2924/01082 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2924/05442

摘要： A dug portion (50) in which a die-bonding material is filled is provided to a lower surface of a stamping nozzle (42) used in a step of applying the die-bonding material onto a chip mounting portion of a wiring board. Planar dimensions of the dug portion (50) are smaller than external dimensions of a chip to be mounted on the chip mounting portion. In addition, a depth of the dug portion (50) is smaller than a thickness of the chip. When the thickness of the chip is 100 μm or smaller, a problem of crawling up of the die-bonding material to an upper surface of the chip is avoided by applying the die-bonding material onto the chip mounting portion using the stamping nozzle (42).

摘要翻译： 在将芯片接合材料涂布在布线基板的芯片安装部上的步骤中使用的冲压喷嘴（42）的下表面设置有填充有芯片接合材料的挖掘部（50）。 挖掘部分（50）的平面尺寸小于要安装在芯片安装部分上的芯片的外部尺寸。 此外，挖掘部分（50）的深度小于芯片的厚度。 当芯片的厚度为100μm以下时，通过使用冲压喷嘴（42）将芯片接合材料施加到芯片安装部上来避免芯片接合材料向芯片的上表面爬行的问题 ）。

公开(公告)号：US20070210430A1

公开(公告)日：2007-09-13

申请号：US11783919

申请日：2007-04-13

申请人： Hidemasa Kagii ,  Akira Muto ,  Ichio Shimizu ,  Katsuo Arai ,  Hiroshi Sato ,  Hiroyuki Nakamura ,  Masahiko Osaka ,  Takuya Nakajo ,  Keiichi Okawa ,  Hiroi Oka

发明人： Hidemasa Kagii ,  Akira Muto ,  Ichio Shimizu ,  Katsuo Arai ,  Hiroshi Sato ,  Hiroyuki Nakamura ,  Masahiko Osaka ,  Takuya Nakajo ,  Keiichi Okawa ,  Hiroi Oka

IPC分类号： H01L23/02

CPC分类号： H01L23/24 ,  H01L21/52 ,  H01L23/488 ,  H01L23/49562 ,  H01L24/36 ,  H01L24/40 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/40225 ,  H01L2224/73153 ,  H01L2224/73253 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals 6G, 6S via connection materials 5b, 5c. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals 6G, 6S being exposed. Mounting surfaces of the metal plate terminals 6G, 6S and a third part of the metal cap are bonded to electrodes on a mounting board 10 via connection materials 5e, 5f and 5g.

摘要翻译： 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内，而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅电极和源电极，并且栅电极和源电极通过连接材料5b，5c连接金属板端子6G，6S 。 此外，半导体芯片由金属板端子6G，6S的露出的安装面的树脂密封体密封。 金属板端子6G，6S和金属盖的第三部分的安装表面通过连接材料5e，5f和5g与安装板10上的电极接合。

公开(公告)号：US07405469B2

公开(公告)日：2008-07-29

申请号：US11783919

申请日：2007-04-13

申请人： Hidemasa Kagii ,  Akira Muto ,  Ichio Shimizu ,  Katsuo Arai ,  Hiroshi Sato ,  Hiroyuki Nakamura ,  Masahiko Osaka ,  Takuya Nakajo ,  Keiichi Okawa ,  Hiroi Oka

发明人： Hidemasa Kagii ,  Akira Muto ,  Ichio Shimizu ,  Katsuo Arai ,  Hiroshi Sato ,  Hiroyuki Nakamura ,  Masahiko Osaka ,  Takuya Nakajo ,  Keiichi Okawa ,  Hiroi Oka

IPC分类号： H01L23/495

CPC分类号： H01L23/24 ,  H01L21/52 ,  H01L23/488 ,  H01L23/49562 ,  H01L24/36 ,  H01L24/40 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/40225 ,  H01L2224/73153 ,  H01L2224/73253 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals 6G, 6S via connection materials 5b, 5c. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals 6G, 6S being exposed. Mounting surfaces of the metal plate terminals 6G, 6S and a third part of the metal cap are bonded to electrodes on a mounting board 10 via connection materials 5e, 5f and 5g.

摘要翻译： 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内，而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅电极和源电极，并且栅电极和源电极通过连接材料5b，5c连接金属板端子6G，6S 。 此外，半导体芯片由金属板端子6G，6S的露出的安装面的树脂密封体密封。 金属板端子6G，6S和金属盖的第三部分的安装表面通过连接材料5e，5f和5g与安装板10上的电极接合。

公开(公告)号：US07220617B2

公开(公告)日：2007-05-22

申请号：US11349219

申请日：2006-02-08

申请人： Hidemasa Kagii ,  Akira Muto ,  Ichio Shimizu ,  Katsuo Arai ,  Hiroshi Sato ,  Hiroyuki Nakamura ,  Masahiko Osaka ,  Takuya Nakajo ,  Keiichi Okawa ,  Hiroi Oka

发明人： Hidemasa Kagii ,  Akira Muto ,  Ichio Shimizu ,  Katsuo Arai ,  Hiroshi Sato ,  Hiroyuki Nakamura ,  Masahiko Osaka ,  Takuya Nakajo ,  Keiichi Okawa ,  Hiroi Oka

IPC分类号： H01L21/44 ,  H01L21/48

CPC分类号： H01L23/24 ,  H01L21/52 ,  H01L23/488 ,  H01L23/49562 ,  H01L24/36 ,  H01L24/40 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/40225 ,  H01L2224/73153 ,  H01L2224/73253 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals being exposed. Mounting surfaces of the metal plate terminals and a third part of the metal cap are bonded to electrodes on a mounting board.

摘要翻译： 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内，而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅电极和源电极，并且栅极电极和源极电极与金属板端子接合。 此外，半导体芯片被树脂密封体密封，金属板端子的安装表面露出。 金属板端子和金属盖的第三部分的安装表面与安装板上的电极接合。

公开(公告)号：US20060175700A1

公开(公告)日：2006-08-10

申请号：US11349219

申请日：2006-02-08

申请人： Hidemasa Kagii ,  Akira Muto ,  Ichio Shimizu ,  Katsuo Arai ,  Hiroshi Sato ,  Hiroyuki Nakamura ,  Masahiko Osaka ,  Takuya Nakajo ,  Keiichi Okawa ,  Hiroi Oka

发明人： Hidemasa Kagii ,  Akira Muto ,  Ichio Shimizu ,  Katsuo Arai ,  Hiroshi Sato ,  Hiroyuki Nakamura ,  Masahiko Osaka ,  Takuya Nakajo ,  Keiichi Okawa ,  Hiroi Oka

IPC分类号： H01L23/34

CPC分类号： H01L23/24 ,  H01L21/52 ,  H01L23/488 ,  H01L23/49562 ,  H01L24/36 ,  H01L24/40 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/40225 ,  H01L2224/73153 ,  H01L2224/73253 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals being exposed. Mounting surfaces of the metal plate terminals and a third part of the metal cap are bonded to electrodes on a mounting board.

摘要翻译： 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内，而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅极电极和源极电极，并且栅极电极和源极电极与金属板端子接合。此外，半导体芯片由树脂密封体 金属板端子的安装表面露出。 金属板端子和金属盖的第三部分的安装表面与安装板上的电极接合。