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公开(公告)号:US07528489B2
公开(公告)日:2009-05-05
申请号:US11324315
申请日:2006-01-04
IPC分类号: H01L35/08
CPC分类号: H01L23/3735 , H01L23/3107 , H01L23/3677 , H01L23/4334 , H01L23/49537 , H01L23/49562 , H01L23/49575 , H01L24/06 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/743 , H01L24/78 , H01L24/83 , H01L24/85 , H01L24/97 , H01L2224/04042 , H01L2224/05553 , H01L2224/05624 , H01L2224/05647 , H01L2224/0603 , H01L2224/29 , H01L2224/291 , H01L2224/29101 , H01L2224/29111 , H01L2224/29294 , H01L2224/29298 , H01L2224/32245 , H01L2224/45124 , H01L2224/48091 , H01L2224/48247 , H01L2224/48472 , H01L2224/48724 , H01L2224/48747 , H01L2224/49171 , H01L2224/73265 , H01L2224/743 , H01L2224/78 , H01L2224/78301 , H01L2224/83192 , H01L2224/83206 , H01L2224/83385 , H01L2224/83801 , H01L2224/85181 , H01L2224/85205 , H01L2224/92 , H01L2224/92247 , H01L2224/97 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/0134 , H01L2924/014 , H01L2924/10253 , H01L2924/12041 , H01L2924/181 , H01L2924/19043 , H01L2924/351 , H01L2924/00014 , H01L2224/85 , H01L2224/83 , H01L2924/01039 , H01L2924/00 , H01L2924/00012 , H01L2924/01031 , H01L2924/01012 , H01L2924/01032 , H01L2924/01026 , H01L2924/01083 , H01L2924/3512 , H01L2224/29099 , H01L2224/29199 , H01L2224/29299 , H01L2224/2929
摘要: Pb free solder is used in die bonding. A thermal stress reduction plate is disposed between a semiconductor chip and a die pad made of a Cu alloy. The semiconductor chip and the thermal stress reduction plate are joined and the thermal stress reduction plate and the die pad are joined by a joint material of Pb free solder having Sn—Sb—Ag—Cu as its main constituent elements and having a solidus temperature not lower than 270° C. and a liquidus temperature not higher than 400° C. Thus, die bonding can be performed using the Pb free solder without generating any chip crack.
摘要翻译: 无铅焊料用于芯片焊接。 热应力减少板设置在半导体芯片和由Cu合金制成的芯片焊盘之间。 半导体芯片和热应力减少板接合,热应力还原板和芯片焊盘通过具有Sn-Sb-Ag-Cu作为其主要构成元素并且具有固相线温度的无铅焊料的接合材料接合 低于270℃,液相线温度不高于400℃。因此,可以使用无铅焊料进行裸片接合而不产生任何芯片裂纹。
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公开(公告)号:US20060151889A1
公开(公告)日:2006-07-13
申请号:US11324315
申请日:2006-01-04
CPC分类号: H01L23/3735 , H01L23/3107 , H01L23/3677 , H01L23/4334 , H01L23/49537 , H01L23/49562 , H01L23/49575 , H01L24/06 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/743 , H01L24/78 , H01L24/83 , H01L24/85 , H01L24/97 , H01L2224/04042 , H01L2224/05553 , H01L2224/05624 , H01L2224/05647 , H01L2224/0603 , H01L2224/29 , H01L2224/291 , H01L2224/29101 , H01L2224/29111 , H01L2224/29294 , H01L2224/29298 , H01L2224/32245 , H01L2224/45124 , H01L2224/48091 , H01L2224/48247 , H01L2224/48472 , H01L2224/48724 , H01L2224/48747 , H01L2224/49171 , H01L2224/73265 , H01L2224/743 , H01L2224/78 , H01L2224/78301 , H01L2224/83192 , H01L2224/83206 , H01L2224/83385 , H01L2224/83801 , H01L2224/85181 , H01L2224/85205 , H01L2224/92 , H01L2224/92247 , H01L2224/97 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/0134 , H01L2924/014 , H01L2924/10253 , H01L2924/12041 , H01L2924/181 , H01L2924/19043 , H01L2924/351 , H01L2924/00014 , H01L2224/85 , H01L2224/83 , H01L2924/01039 , H01L2924/00 , H01L2924/00012 , H01L2924/01031 , H01L2924/01012 , H01L2924/01032 , H01L2924/01026 , H01L2924/01083 , H01L2924/3512 , H01L2224/29099 , H01L2224/29199 , H01L2224/29299 , H01L2224/2929
摘要: Pb free solder is used in die bonding. A thermal stress reduction plate is disposed between a semiconductor chip and a die pad made of a Cu alloy. The semiconductor chip and the thermal stress reduction plate are joined and the thermal stress reduction plate and the die pad are joined by a joint material of Pb free solder having Sn—Sb—Ag—Cu as its main constituent elements and having a solidus temperature not lower than 270° C. and a liquidus temperature not higher than 400° C. Thus, die bonding can be performed using the Pb free solder without generating any chip crack.
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公开(公告)号:US07220617B2
公开(公告)日:2007-05-22
申请号:US11349219
申请日:2006-02-08
申请人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
发明人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
CPC分类号: H01L23/24 , H01L21/52 , H01L23/488 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05573 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/40225 , H01L2224/73153 , H01L2224/73253 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要: A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals being exposed. Mounting surfaces of the metal plate terminals and a third part of the metal cap are bonded to electrodes on a mounting board.
摘要翻译: 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内,而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅电极和源电极,并且栅极电极和源极电极与金属板端子接合。 此外,半导体芯片被树脂密封体密封,金属板端子的安装表面露出。 金属板端子和金属盖的第三部分的安装表面与安装板上的电极接合。
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公开(公告)号:US20060175700A1
公开(公告)日:2006-08-10
申请号:US11349219
申请日:2006-02-08
申请人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
发明人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
IPC分类号: H01L23/34
CPC分类号: H01L23/24 , H01L21/52 , H01L23/488 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05573 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/40225 , H01L2224/73153 , H01L2224/73253 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要: A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals being exposed. Mounting surfaces of the metal plate terminals and a third part of the metal cap are bonded to electrodes on a mounting board.
摘要翻译: 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内,而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅极电极和源极电极,并且栅极电极和源极电极与金属板端子接合。此外,半导体芯片由树脂密封体 金属板端子的安装表面露出。 金属板端子和金属盖的第三部分的安装表面与安装板上的电极接合。
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公开(公告)号:US20070210430A1
公开(公告)日:2007-09-13
申请号:US11783919
申请日:2007-04-13
申请人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
发明人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
IPC分类号: H01L23/02
CPC分类号: H01L23/24 , H01L21/52 , H01L23/488 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05573 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/40225 , H01L2224/73153 , H01L2224/73253 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要: A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals 6G, 6S via connection materials 5b, 5c. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals 6G, 6S being exposed. Mounting surfaces of the metal plate terminals 6G, 6S and a third part of the metal cap are bonded to electrodes on a mounting board 10 via connection materials 5e, 5f and 5g.
摘要翻译: 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内,而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅电极和源电极,并且栅电极和源电极通过连接材料5b,5c连接金属板端子6G,6S 。 此外,半导体芯片由金属板端子6G,6S的露出的安装面的树脂密封体密封。 金属板端子6G,6S和金属盖的第三部分的安装表面通过连接材料5e,5f和5g与安装板10上的电极接合。
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公开(公告)号:US07405469B2
公开(公告)日:2008-07-29
申请号:US11783919
申请日:2007-04-13
申请人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
发明人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
IPC分类号: H01L23/495
CPC分类号: H01L23/24 , H01L21/52 , H01L23/488 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05573 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/40225 , H01L2224/73153 , H01L2224/73253 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要: A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals 6G, 6S via connection materials 5b, 5c. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals 6G, 6S being exposed. Mounting surfaces of the metal plate terminals 6G, 6S and a third part of the metal cap are bonded to electrodes on a mounting board 10 via connection materials 5e, 5f and 5g.
摘要翻译: 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内,而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅电极和源电极,并且栅电极和源电极通过连接材料5b,5c连接金属板端子6G,6S 。 此外,半导体芯片由金属板端子6G,6S的露出的安装面的树脂密封体密封。 金属板端子6G,6S和金属盖的第三部分的安装表面通过连接材料5e,5f和5g与安装板10上的电极接合。
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公开(公告)号:US20070089811A1
公开(公告)日:2007-04-26
申请号:US11585879
申请日:2006-10-25
申请人: Osamu Ikeda , Masahide Okamoto , Hidemasa Kagii , Hiroi Oka , Hiroyuki Nakamura
发明人: Osamu Ikeda , Masahide Okamoto , Hidemasa Kagii , Hiroi Oka , Hiroyuki Nakamura
IPC分类号: C22F1/08
CPC分类号: C22F1/08 , H01L23/49513 , H01L23/49582 , H01L24/29 , H01L24/30 , H01L24/32 , H01L24/33 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L2224/2908 , H01L2224/29101 , H01L2224/29109 , H01L2224/29111 , H01L2224/2919 , H01L2224/32245 , H01L2224/32507 , H01L2224/37147 , H01L2224/37155 , H01L2224/3754 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/73265 , H01L2224/83101 , H01L2224/83455 , H01L2224/83801 , H01L2224/84801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01063 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01327 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/10329 , H01L2924/15747 , H01L2924/181 , H01L2924/351 , H01L2924/00014 , H01L2924/00012 , H01L2924/00 , H01L2924/3512
摘要: In a power semiconductor device, a joint between the power semiconductor element and frame plated with Ni is composed of a laminated structure comprising, from the power semiconductor element side, an intermetallic compound layer having a melting point of 260° C. or higher, a Cu layer, a metal layer having a melting point of 260° C. or higher, a Cu layer and an intermetallic layer having a melting point of 260° C. or higher. The structure of the joint buffers the stress generated by the secondary mounting and temperature cycle at the bond for the semiconductor element and the frame having a large difference in thermal expansion coefficient from each other.
摘要翻译: 在功率半导体装置中,功率半导体元件与镀镍的框架之间的接合部由层叠结构构成,该叠层结构由功率半导体元件侧构成,熔点为260℃以上的金属间化合物层, Cu层,熔点为260℃以上的金属层,Cu层和熔点为260℃以上的金属间化合物层。 接头的结构缓冲了在半导体元件和具有大的热膨胀系数差的框架的接合处由二次安装和温度循环产生的应力。
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公开(公告)号:US07579677B2
公开(公告)日:2009-08-25
申请号:US11585879
申请日:2006-10-25
申请人: Osamu Ikeda , Masahide Okamoto , Hidemasa Kagii , Hiroi Oka , Hiroyuki Nakamura
发明人: Osamu Ikeda , Masahide Okamoto , Hidemasa Kagii , Hiroi Oka , Hiroyuki Nakamura
IPC分类号: H01L23/495
CPC分类号: C22F1/08 , H01L23/49513 , H01L23/49582 , H01L24/29 , H01L24/30 , H01L24/32 , H01L24/33 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L2224/2908 , H01L2224/29101 , H01L2224/29109 , H01L2224/29111 , H01L2224/2919 , H01L2224/32245 , H01L2224/32507 , H01L2224/37147 , H01L2224/37155 , H01L2224/3754 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/73265 , H01L2224/83101 , H01L2224/83455 , H01L2224/83801 , H01L2224/84801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01063 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01327 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/10329 , H01L2924/15747 , H01L2924/181 , H01L2924/351 , H01L2924/00014 , H01L2924/00012 , H01L2924/00 , H01L2924/3512
摘要: In a power semiconductor device, a joint between the power semiconductor element and frame plated with Ni is composed of a laminated structure comprising, from the power semiconductor element side, an intermetallic compound layer having a melting point of 260° C. or higher, a Cu layer, a metal layer having a melting point of 260° C. or higher, a Cu layer and an intermetallic layer having a melting point of 260° C. or higher. The structure of the joint buffers the stress generated by the secondary mounting and temperature cycle at the bond for the semiconductor element and the frame having a large difference in thermal expansion coefficient from each other.
摘要翻译: 在功率半导体装置中,功率半导体元件与镀镍的框架之间的接合部由层叠结构构成,该叠层结构由功率半导体元件侧构成,熔点为260℃以上的金属间化合物层, Cu层,熔点为260℃以上的金属层,Cu层和熔点为260℃以上的金属间化合物层。 接头的结构缓冲了在半导体元件和具有大的热膨胀系数差的框架的接合处由二次安装和温度循环产生的应力。
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公开(公告)号:US20080268577A1
公开(公告)日:2008-10-30
申请号:US12164625
申请日:2008-06-30
申请人: Hidemasa KAGII , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
发明人: Hidemasa KAGII , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
IPC分类号: H01L21/00
CPC分类号: H01L23/24 , H01L21/52 , H01L23/488 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05573 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/40225 , H01L2224/73153 , H01L2224/73253 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要: A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals 6G, 6S via connection materials 5b, 5c. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals 6G, 6S being exposed. Mounting surfaces of the metal plate terminals 6G, 6S and a third part of the metal cap are bonded to electrodes on a mounting board 10 via connection materials 5e, 5f and 5g.
摘要翻译: 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内,而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅电极和源电极,并且栅电极和源电极通过连接材料5b,5c连接金属板端子6G,6S 。 此外,半导体芯片由金属板端子6G,6S的露出的安装面的树脂密封体密封。 金属板端子6G,6S和金属盖的第三部分的安装表面通过连接材料5e,5f和5g与安装板10上的电极接合。
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10.
公开(公告)号:US20080122050A1
公开(公告)日:2008-05-29
申请号:US11629703
申请日:2005-06-15
申请人: Osamu Ikeda , Masahide Okamoto , Ryo Haruta , Hidemasa Kagii , Hiroi Oka , Hiroyuki Nakamura
发明人: Osamu Ikeda , Masahide Okamoto , Ryo Haruta , Hidemasa Kagii , Hiroi Oka , Hiroyuki Nakamura
IPC分类号: H01L23/495
CPC分类号: H01L23/49562 , H01L23/49513 , H01L23/49524 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L2224/04026 , H01L2224/05111 , H01L2224/05139 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05644 , H01L2224/2908 , H01L2224/29083 , H01L2224/29101 , H01L2224/29109 , H01L2224/29111 , H01L2224/29118 , H01L2224/29123 , H01L2224/29124 , H01L2224/29139 , H01L2224/29147 , H01L2224/29155 , H01L2224/2919 , H01L2224/32013 , H01L2224/32057 , H01L2224/32245 , H01L2224/32507 , H01L2224/37147 , H01L2224/40095 , H01L2224/40247 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48644 , H01L2224/48699 , H01L2224/73265 , H01L2224/83191 , H01L2224/83192 , H01L2224/83801 , H01L2224/83805 , H01L2224/84801 , H01L2224/85205 , H01L2224/92247 , H01L2924/00011 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01063 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/01327 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/10329 , H01L2924/1305 , H01L2924/13055 , H01L2924/15747 , H01L2924/15787 , H01L2924/181 , H01L2924/351 , H01L2924/00014 , H01L2924/00 , H01L2924/01032 , H01L2924/00012 , H01L2924/01022 , H01L2924/01026 , H01L2924/01083 , H01L2924/3512 , H01L2224/48744 , H01L2924/00015 , H01L2224/83205
摘要: A power semiconductor device in which a semiconductor element is die-mount-connected onto a lead frame in a Pb-free manner. In a die-mount-connection with a large difference of thermal expansion coefficient between a semiconductor element 1 and a lead frame 2, the connection is made with an intermetallic compound 200 having a melting point of 260° C. or higher or a Pb-free solder having a melting point of 260° C. or higher to 400° C. or lower, at the same time, the thermal stress produced in temperature cycles is buffered by a metal layer 100 having a melting point of 260° C. or higher. A Pb-free die-mount-connection which does not melt at the time of reflowing but have no chip crack to occur according to thermal stress can be achieved.
摘要翻译: 一种功率半导体器件,其中半导体元件以无铅方式管芯安装到引线框架上。 在半导体元件1和引线框架2之间的热膨胀系数差大的管芯安装连接中,利用熔点为260℃以上的金属间化合物200或Pb- 熔点为260℃以上且400℃以下的自由焊料,同时在温度循环中产生的热应力由熔点为260℃的金属层100缓冲,或 更高。 可以实现在回流时熔融而不会根据热应力而产生芯片裂纹的无铅模具安装连接。
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