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    ARRAY SUBSTRATE FOR IN-PLANE SWITCHING MODE LIQUID CRYSTAL DISPLAY DEVICE INCLUDING PIXEL AND COMMON ELECTRODES ON THE SAME LAYER AND METHOD OF MANUFACTURING THE SAME
    3.
    发明申请
    ARRAY SUBSTRATE FOR IN-PLANE SWITCHING MODE LIQUID CRYSTAL DISPLAY DEVICE INCLUDING PIXEL AND COMMON ELECTRODES ON THE SAME LAYER AND METHOD OF MANUFACTURING THE SAME 有权
    用于平面内切换模式的阵列基板液晶显示装置，包括像素和公用电极在同一层上及其制造方法

    公开(公告)号：US20120135552A1

    公开(公告)日：2012-05-31

    申请号：US13364884

    申请日：2012-02-02

    申请人： Byoung-Ho LIM ,  Hyun-Kyu LEE ,  Do-Sung KIM ,  Byung-Koo KANG ,  Do-Young LEE ,  Eui-Tae KIM ,  Sang-Wook PARK

    发明人： Byoung-Ho LIM ,  Hyun-Kyu LEE ,  Do-Sung KIM ,  Byung-Koo KANG ,  Do-Young LEE ,  Eui-Tae KIM ,  Sang-Wook PARK

    IPC分类号： H01L33/00

    CPC分类号： G02F1/134363 ,  G02F1/136227 ,  G02F2201/40

    摘要： An array substrate for an in-plane switching mode liquid crystal display device includes a substrate, a gate line along a first direction on the substrate, a data line along a second direction and crossing the gate line to define a pixel region, a common line on the substrate, a thin film transistor connected to the gate and data lines, a pixel electrode in the pixel region and connected to the thin film transistor, the pixel electrode including horizontal parts along the first direction, and a common electrode in the pixel region and connected to the common line, the common electrode including horizontal portions along the first direction, wherein the pixel electrode and the common electrode are formed on a same layer.

    摘要翻译： 面内切换模式液晶显示装置的阵列基板包括基板，沿着基板的第一方向的栅极线，沿着第二方向的数据线，与栅极线交叉以限定像素区域，公共线 在基板上，连接到栅极和数据线的薄膜晶体管，像素区域中的像素电极并连接到薄膜晶体管，像素电极包括沿着第一方向的水平部分，以及像素区域中的公共电极 并且连接到公共线，所述公共电极包括沿着所述第一方向的水平部分，其中所述像素电极和所述公共电极形成在同一层上。

    FABRICATING METHODS OF SEMICONDUCTOR DEVICES AND PICK-UP APPARATUSES OF SEMICONDUCTOR DEVICES THEREIN
    5.
    发明申请
    FABRICATING METHODS OF SEMICONDUCTOR DEVICES AND PICK-UP APPARATUSES OF SEMICONDUCTOR DEVICES THEREIN 审中-公开
    半导体器件的制造方法及其半导体器件的拾取器件

    公开(公告)号：US20130149817A1

    公开(公告)日：2013-06-13

    申请号：US13559141

    申请日：2012-07-26

    申请人： Chang-Seong JEON ,  Sang-Sick PARK ,  Sang-Wook PARK ,  Teak-Hoon LEE ,  Kwang-Chul CHOI

    发明人： Chang-Seong JEON ,  Sang-Sick PARK ,  Sang-Wook PARK ,  Teak-Hoon LEE ,  Kwang-Chul CHOI

    IPC分类号： H01L21/762

    CPC分类号： H01L21/67144 ,  H01L24/13 ,  H01L24/16 ,  H01L24/75 ,  H01L24/81 ,  H01L25/50 ,  H01L2224/13101 ,  H01L2224/16145 ,  H01L2224/75822 ,  H01L2224/75823 ,  H01L2224/8117 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/10253 ,  H01L2924/014 ,  H01L2924/00014

    摘要： A fabricating method of a semiconductor device may include forming a semiconductor die on a supporting wafer, and picking up the die from the wafer by attaching to the die a transfer unit, the transfer unit including a head unit configured to enable twisting movement, and performing the twisting movement. A fabricating method of a semiconductor device may include forming a first semiconductor device on a supporting wafer; and picking up the first semiconductor device from the wafer, moving the first semiconductor device onto a second semiconductor device, and bonding the first semiconductor device to the second semiconductor device while maintaining the first semiconductor device oriented so that a surface faces upwardly. A fabricating method of a semiconductor device may include forming a first semiconductor device on a supporting wafer, attaching to the first semiconductor device a transfer unit configured to enable twisting movement, and performing the twisting movement.

    摘要翻译： 半导体器件的制造方法可以包括在支撑晶片上形成半导体管芯，并且通过将转移单元附接到管芯而从晶片上拾取管芯，所述转移单元包括构造成能够进行扭转运动的头单元，以及执行 扭转运动。 半导体器件的制造方法可以包括在支撑晶片上形成第一半导体器件; 以及从所述晶片拾取所述第一半导体器件，将所述第一半导体器件移动到第二半导体器件上，并且将所述第一半导体器件接合到所述第二半导体器件，同时保持所述第一半导体器件定向成使得表面朝上。 半导体器件的制造方法可以包括在支撑晶片上形成第一半导体器件，附接到第一半导体器件，被配置为能够进行扭转运动并执行扭转运动的转移单元。

    SEMICONDUCTOR MODULE AND METHOD OF MANUFACTURING THE SAME
    7.
    发明申请
    SEMICONDUCTOR MODULE AND METHOD OF MANUFACTURING THE SAME 失效
    半导体模块及其制造方法

    公开(公告)号：US20080122083A1

    公开(公告)日：2008-05-29

    申请号：US11942552

    申请日：2007-11-19

    申请人： Sang-Wook PARK ,  Seung-Jae LEE ,  Seung-Yeol YANG

    发明人： Sang-Wook PARK ,  Seung-Jae LEE ,  Seung-Yeol YANG

    IPC分类号： H01L23/52 ,  H01L21/00

    CPC分类号： H05K3/303 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H05K1/183 ,  H05K2201/09036 ,  H05K2201/09472 ,  H05K2201/10734 ,  Y02P70/613 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

    摘要： A semiconductor module preferably includes a semiconductor package and a printed circuit board (PCB). The semiconductor package can include an outer terminal. The PCB can include a terminal land that is electrically connected to the outer terminal. The PCB preferably has a recess configured to at least partially expose the terminal land and to receive the outer terminal. The recess preferably has a width that is less than a width of the semiconductor package. Damage to edge portions of the semiconductor package whose outer terminal is received into the recess may be prevented, because the edge portions make contact with and are supported by the PCB. One or more support members can also be provided to contact one or more sides of the edge portions of the semiconductor package to further prevent damage due to horizontal impacts.

    摘要翻译： 半导体模块优选地包括半导体封装和印刷电路板（PCB）。 半导体封装可以包括外部端子。 PCB可以包括电连接到外部端子的端子区域。 PCB优选地具有凹部，其被配置为至少部分地暴露端子台并且接收外部端子。 凹部优选地具有小于半导体封装的宽度的宽度。 由于边缘部分与PCB接触并被PCB支撑，所以可以防止其外部端子被容纳到凹部中的半导体封装的边缘部分的损坏。 还可以提供一个或多个支撑构件以接触半导体封装的边缘部分的一个或多个侧面，以进一步防止由于水平冲击造成的损坏。

    SEMICONDUCTOR PACKAGE APPARATUS
    8.
    发明申请
    SEMICONDUCTOR PACKAGE APPARATUS 审中-公开
    半导体封装设备

    公开(公告)号：US20090032916A1

    公开(公告)日：2009-02-05

    申请号：US12182843

    申请日：2008-07-30

    申请人： Dong-Kil SHIN ,  Sang-Wook PARK

    发明人： Dong-Kil SHIN ,  Sang-Wook PARK

    IPC分类号： H01L23/495

    CPC分类号： H05K3/3426 ,  H01L23/49548 ,  H01L23/49555 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/1532 ,  H01L2924/181 ,  H05K2201/10477 ,  H05K2201/10689 ,  Y02P70/613 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A semiconductor package apparatus and a method of fabricating the semiconductor package apparatus. The semiconductor package apparatus includes: semiconductor chips comprising active and inactive surfaces and protected by a packing portion; a substrate on which the semiconductor chips are installed; leads comprising front portions electrically coupled to the active surfaces of the semiconductor chips and rear portions extending substantially to the substrate; and bonding materials bonded between ends of the rear portions of the leads and the substrate to electrically couple the leads to the substrate. Ends of the rear portions of the leads may stand on the substrate. Thus, solder joint reliability can be improved, and a wetting characteristic of solder can be improved during surface installation. Also, semiconductor package apparatuses having similar attributes can easily be multilayered. In addition, a foot print of the semiconductor package apparatus can be reduced to enable high-density installation. Moreover, shapes of the bonding materials (solder) can be controlled to optimize bonding strength of the leads, quantity of the bonding materials, or the like.

    摘要翻译： 一种半导体封装装置及其制造方法。 半导体封装装置包括：半导体芯片，包括有源和非活性表面，并被封装部分保护; 其上安装有半导体芯片的基板; 引线包括电耦合到半导体芯片的有源表面的前部和基本上延伸到衬底的后部; 以及接合在引线的后部的端部与基板之间的接合材料，以将引线电耦合到基板。 引线的后部的端部可以位于基板上。 因此，可以提高焊点可靠性，并且可以在表面安装期间改善焊料的润湿特性。 此外，具有相似属性的半导体封装装置可以容易地多层化。 此外，可以减少半导体封装装置的脚印，以实现高密度安装。 此外，可以控制接合材料（焊料）的形状，以优化引线的接合强度，接合材料的量等。

    STACKED SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
    10.
    发明申请
    STACKED SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    堆叠式半导体封装及其制造方法

    公开(公告)号：US20080308913A1

    公开(公告)日：2008-12-18

    申请号：US12140190

    申请日：2008-06-16

    申请人： Sang-Wook PARK ,  Min-Young SON ,  Jong-Gi LEE ,  Kun-Dae YEOM ,  Sung-Ki LEE ,  Ji-Seok HONG

    发明人： Sang-Wook PARK ,  Min-Young SON ,  Jong-Gi LEE ,  Kun-Dae YEOM ,  Sung-Ki LEE ,  Ji-Seok HONG

    IPC分类号： H01L23/495

    CPC分类号： H01L23/49555 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/48247 ,  H01L2225/1029 ,  H01L2225/1064 ,  H01L2924/00014 ,  H01L2924/181 ,  H05K3/3426 ,  H05K2201/10515 ,  H05K2201/10689 ,  H05K2201/10757 ,  H05K2201/10969 ,  H05K2201/2036 ,  Y02P70/613 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A stacked semiconductor package includes a first semiconductor package, a second semiconductor package and a conductive connection member. The first semiconductor package includes a first semiconductor chip, a first lead frame having first outer leads that are electrically connected to the first semiconductor chip, and a first molding member formed on the first semiconductor chip and the first lead frame to expose the first outer leads. The second semiconductor package includes a second semiconductor chip, a second lead frame formed on the first molding member and having second outer leads that may be electrically connected to the second semiconductor chip, and a second molding member formed on the second semiconductor chip and the second lead frame to expose the second outer leads. The conductive connection member may electrically connect the first outer leads and the second outer leads to each other. Further, the conductive connection member may have a crack-blocking groove.

    摘要翻译： 叠层半导体封装包括第一半导体封装，第二半导体封装和导电连接构件。 第一半导体封装包括第一半导体芯片，具有与第一半导体芯片电连接的第一外部引线的第一引线框架和形成在第一半导体芯片和第一引线框架上以暴露第一外部引线的第一模制构件 。 第二半导体封装包括第二半导体芯片，形成在第一模制构件上的第二引线框架，并且具有可与第二半导体芯片电连接的第二外部引线，以及形成在第二半导体芯片上的第二模制构件和第二半导体芯片 引线框架露出第二个外引线。 导电连接构件可以将第一外引线和第二外引线彼此电连接。 此外，导电连接构件可以具有防裂槽。