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公开(公告)号：US4225809A
公开(公告)日：1980-09-30
申请号：US27713
申请日：1979-04-06
CPC分类号： H04N3/233
摘要： A side pincushion distortion correction circuit has an impedance circuit connected in series with the deflection coil in a television receiver. A controllable switch connected in parallel with the impedance circuit is operated by a switching signal, the phase of which is modulated by a combination of a parabolic signal at the vertical rate and a control signal corresponding to the brightness of a reproduced picture on the screen of the television receiver in order to maintain proper correction of side pincushion distortion despite variations in the brightness of a picture reproduced on the cathode ray tube of the television receiver.
摘要翻译： 侧枕形失真校正电路具有与电视接收机中的偏转线圈串联连接的阻抗电路。 与阻抗电路并联连接的可控开关由开关信号操作，开关信号的相位由垂直速率的抛物线信号的组合和对应于屏幕上的再现图像的亮度的控制信号 电视接收机，以便即使在电视接收机的阴极射线管上再现的图像的亮度有变化，仍然保持侧枕形失真的适当校正。
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2.发明授权公开(公告)号：US08885173B2
公开(公告)日：2014-11-11
申请号：US13497722
申请日：2010-07-27
CPC分类号： G01B11/0625
摘要： A film thickness measurement apparatus includes a measurement light source which supplies measurement light containing wavelength components over a predetermined band to a semiconductor film, a spectroscopic optical system and a photodetector which detect intensities of output light formed by superimposing reflected light components from an upper surface and a lower surface of the semiconductor film at each time point by wavelength, and a film thickness analysis section which obtains a temporal change in film thickness of the semiconductor film. The film thickness analysis section obtains a value corresponding to a peak wavelength where the intensity of interfering light generated by the reflected light from the upper surface and the reflected light from the lower surface interfering with each other is maximized or minimized or an interval of the adjacent peak wavelengths based on spectral waveforms of the output light detected at mutually different time points.
摘要翻译： 膜厚测量装置包括测量光源，该测量光源将包含预定波段的测量光提供给半导体膜，分光光学系统和光电检测器，其检测通过叠加来自上表面的反射光分量而形成的输出光的强度，以及 在每个时间点的每个时间点的半导体膜的下表面和获得半导体膜的膜厚的时间变化的膜厚度分析部。 薄膜厚度分析部分获得对应于峰值波长的值，其中由上表面反射的光产生的干涉光的强度和彼此干扰的来自下表面的反射光的强度最大化或最小化，或相邻的 基于在相互不同的时间点检测到的输出光的光谱波形的峰值波长。
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公开(公告)号：US08680538B2
公开(公告)日：2014-03-25
申请号：US12867061
申请日：2008-02-12
IPC分类号： H01L29/15
CPC分类号： H01L29/66068 , H01L23/3171 , H01L23/3192 , H01L29/0615 , H01L29/0619 , H01L29/0638 , H01L29/0661 , H01L29/0692 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/6606 , H01L29/7811 , H01L29/8611 , H01L29/8613 , H01L29/872 , H01L2924/0002 , H01L2924/13055 , H01L2924/13091 , H01L2924/00
摘要： In order to obtain a silicon carbide semiconductor device that ensures both stability of withstand voltage and reliability in high-temperature operations in its termination end-portion provided for electric-field relaxation in the perimeter of a cell portion driven as a semiconductor element, the termination end-portion is provided with an inorganic protection film having high heat resistance that is formed on an exposed surface of a well region as a first region formed on a side of the cell portion, and an organic protection film having a high electrical insulation capability with a little influence by electric charges that is formed on a surface of an electric-field relaxation region formed in contact relation to an outer lateral surface of the well region and apart from the cell portion, and on an exposed surface of the silicon carbide layer.
摘要翻译： 为了获得在作为半导体元件驱动的单元部分的周边中提供用于电场弛豫的其终端部分中的高温操作中的耐受电压的稳定性和可靠性的确保的碳化硅半导体器件， 端部设有具有高耐热性的无机保护膜，所述无机保护膜形成在作为形成在电池单元侧的第一区域的阱区的暴露表面上，以及具有高电绝缘能力的有机保护膜， 在形成于与阱区的外侧表面形成并且与电池部分隔开的电场弛豫区域的表面上以及在碳化硅层的暴露表面上的电荷的一点影响。
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4.发明授权Integrating transistors with different poly-silicon heights on the same die 有权将晶体管与不同的多晶硅高度集成在同一芯片上公开(公告)号：US08652907B2
公开(公告)日：2014-02-18
申请号：US13071385
申请日：2011-03-24
申请人： Chuan Lin , Hidehiko Shiraiwa , Bradley Marc Davis , Lei Xue , Simon S. Chan , Kenichi Ohtsuka , Angela T. Hui , Scott Allan Bell
发明人： Chuan Lin , Hidehiko Shiraiwa , Bradley Marc Davis , Lei Xue , Simon S. Chan , Kenichi Ohtsuka , Angela T. Hui , Scott Allan Bell
IPC分类号： H01L21/28 , H01L21/8234
CPC分类号： H01L29/4916 , H01L21/28044 , H01L21/823456 , H01L27/11543 , H01L27/11546 , H01L29/78
摘要： A method of fabricating an integrated circuit including a first region and a second region each having different poly-silicon gate structures is provided. The method includes depositing a first poly-silicon layer over the first and the second region and depositing, within the second region, an oxide layer over the first poly-silicon layer. A second poly-silicon layer is deposited over the first poly-silicon layer and the oxide region. A portion of the second poly-silicon layer that lies over the oxide region is then stripped away.
摘要翻译： 提供一种制造集成电路的方法，该集成电路包括具有不同多晶硅栅极结构的第一区域和第二区域。 该方法包括在第一和第二区域上沉积第一多晶硅层，并在第二区域内在第一多晶硅层上沉积氧化物层。 在第一多晶硅层和氧化物区域上沉积第二多晶硅层。 然后剥离位于氧化物区域上方的第二多晶硅层的一部分。
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公开(公告)号：US08649023B2
公开(公告)日：2014-02-11
申请号：US13201976
申请日：2010-01-20
IPC分类号： G01B11/02
CPC分类号： G01B11/0633 , G01B11/0683
摘要： A film thickness measurement apparatus includes a measurement light source that supplies measurement light containing a measurement light component with a first wavelength and a measurement light component with a second wavelength to a measuring object, a spectroscopic optical system that decomposes interfering light of reflected light from the upper surface and reflected light from the lower surface of the measuring object into an interfering light component with the first wavelength and an interfering light component with the second wavelength, photodetectors that detect intensities of the first and second interfering light components at each time point, and a film thickness analysis section that obtains a temporal change in film thickness of the measuring object based on a phase difference between a first phase in a temporal change in detected intensity of the first interfering light component and a second phase in a temporal change in detected intensity of the second interfering light component.
摘要翻译： 膜厚测量装置包括测量光源，该测量光源将包含具有第一波长的测量光分量和具有第二波长的测量光分量的测量光提供给测量对象;分光光学系统，其将来自所述第二波长的反射光的干涉光分解 上表面和从测量对象的下表面反射成具有第一波长的干涉光分量和具有第二波长的干涉光分量的反射光，检测在每个时间点的第一和第二干涉光分量的强度的光电检测器，以及 膜厚度分析部，其基于检测强度的时间变化中的第一干涉光分量的检测强度的时间变化的第一相位与第二相位之间的相位差，求出测量对象的膜厚度的时间变化 的第二干扰李 ght组件。
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6.发明授权Method and manufacture for embedded flash to achieve high quality spacers for core and high voltage devices and low temperature spacers for high performance logic devices 有权用于嵌入式闪存的方法和制造，以实现用于高性能逻辑器件的核心和高电压器件以及低温间隔物的高质量间隔物公开(公告)号：US08598005B2
公开(公告)日：2013-12-03
申请号：US13185390
申请日：2011-07-18
申请人： Simon Siu-Sing Chan , Hidehiko Shiraiwa , Chuan Lin , Lei Xue , Kenichi Ohtsuka , Angela Tai Hui
发明人： Simon Siu-Sing Chan , Hidehiko Shiraiwa , Chuan Lin , Lei Xue , Kenichi Ohtsuka , Angela Tai Hui
IPC分类号： H01L29/772
CPC分类号： H01L29/6656 , H01L21/28282 , H01L21/823418 , H01L21/823462 , H01L21/823468 , H01L27/11573 , H01L29/6653
摘要： A method and manufacture for memory device fabrication is provided. Spacer formation and junction formation is performed on both: a memory cell region in a core section of a memory device in fabrication, and a high-voltage device region in a periphery section of the memory device in fabrication. The spacer formation and junction formation on both the memory cell region and the high-voltage device region includes performing a rapid thermal anneal. After performing the spacer formation and junction formation on both the memory cell region and the high-voltage device region, spacer formation and junction formation is performed on a low-voltage device region in the periphery section.
摘要翻译： 提供了一种用于存储器件制造的方法和制造。 在制造中的存储器件的芯部中的存储单元区域和存储器件的外围部分中的高电压器件区域两者都执行间隔物形成和结形成。 在存储单元区域和高压器件区域上的间隔物形成和结形成包括执行快速热退火。 在对存储单元区域和高压器件区域进行间隔物形成和结形成之后，在周边部分的低电压器件区域上进行间隔物形成和结形成。
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公开(公告)号：US08569106B2
公开(公告)日：2013-10-29
申请号：US13148537
申请日：2010-02-15
IPC分类号： H01L21/00
CPC分类号： H01L29/7802 , C30B25/02 , C30B29/36 , H01L21/02378 , H01L21/02433 , H01L21/02447 , H01L21/02529 , H01L21/0262 , H01L29/045 , H01L29/0878 , H01L29/1608 , H01L29/6606 , H01L29/66068 , H01L29/7395 , H01L29/7828 , H01L29/872
摘要： A film of an epitaxial layer that allows the reduction in both the height of a bunching step and crystal defects caused by a failure in migration of reactive species on a terrace is formed on a SiC semiconductor substrate having an off angle of 5 degrees or less. A film of a first-layer epitaxial layer is formed on and in contact with a surface of the SiC semiconductor substrate having an off angle of 5 degrees or less. Subsequently, the temperature in a reactor is lowered. A second-layer epitaxial layer is caused to epitaxially grow on and in contact with a surface of the first-layer epitaxial layer. In the above-described manner, the epitaxial layer is structured with two layers, and the growth temperature for the second epitaxial layer is set lower than the growth temperature for the first epitaxial layer.
摘要翻译： 在偏离角度为5度以下的SiC半导体基板上，形成外延层的薄膜，该外延层能够降低聚束步骤的高度，并且由于活性物质在平台上的迁移失败而导致的晶体缺陷。 第一层外延层的膜形成在具有5度或更小的偏离角的SiC半导体衬底的表面上并与之接触。 随后，反应器中的温度降低。 使第二层外延层在第一层外延层的表面上外延生长并与其接触。 以上述方式，外延层由两层构成，第二外延层的生长温度被设定为低于第一外延层的生长温度。
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8.发明申请REFLECTIVITY MEASURING DEVICE, REFLECTIVITY MEASURING METHOD, MEMBRANE THICKNESS MEASURING DEVICE, AND MEMBRANE THICKNESS MEASURING METHOD 有权反射率测量装置，反射率测量方法，膜厚度测量装置和膜厚度测量方法公开(公告)号：US20130169968A1
公开(公告)日：2013-07-04
申请号：US13822741
申请日：2011-09-14
申请人： Kenichi Ohtsuka , Tetsuhisa Nakano
发明人： Kenichi Ohtsuka , Tetsuhisa Nakano
IPC分类号： G01N21/55
CPC分类号： G01N21/55 , G01B11/0625 , G01B11/0658 , G01N21/31
摘要： A reflectivity measuring device 1 includes a measurement light source 30 that supplies irradiation light L1 to a measurement object, a spectroscopic detection unit 80 that detects, at multi-wavelength, intensity of the irradiation light L1 and intensity of reflected light L2 from the measurement object, a coefficient recording unit 92 that records a conversion coefficient K(λ) for converting a detected value of each wavelength's intensity of the irradiation light L1 into a value corresponding to a detected value of each wavelength's intensity of reflected light L2 from a reference measurement object, and a reflectivity calculation unit 93 that calculates each wavelength's reflectivity based on the value corresponding to the each wavelength's intensity of the reflected light L2 from the reference measurement object obtained from the detected value of the each wavelength's intensity of the irradiation light L1 and the conversion coefficient K(λ).
摘要翻译： 反射率测量装置1包括：将照射光L1提供给测量对象的测量光源30;分光检测单元80，其从多个波长检测照射光L1的强度和来自测量对象的反射光L2的强度 系数记录单元92，其记录用于将每个波长的照射光L1的强度的检测值转换成与来自参考测量对象的每个波长的反射光强度L2的检测值相对应的值的转换系数K（λ） 以及反射率计算单元93，其根据从每个波长的照射光L1的强度的检测值获得的基准测量对象，基于与每个波长的反射光L2的强度对应的值来计算每个波长的反射率， 系数K（λ）。
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公开(公告)号：US20130099253A1
公开(公告)日：2013-04-25
申请号：US13808382
申请日：2011-07-14
IPC分类号： H01L29/16
CPC分类号： H01L29/1608 , H01L21/02447 , H01L21/02507 , H01L21/02529 , H01L21/02573 , H01L21/0262 , H01L29/6606 , H01L29/66068
摘要： A semiconductor device that can suppress deterioration in crystal quality caused by a lattice mismatch between a substrate and an epitaxial layer and that also can ensure a voltage sustaining performance, and a wafer for forming the semiconductor device. An epitaxial wafer of silicon carbide (SiC), which is used for manufacturing a semiconductor device, includes a low resistance substrate and an epitaxial layer provided thereon. The epitaxial layer is doped with the same dopant as a dopant doped into the substrate, and has a laminated structure including a low concentration layer and an ultrathin high concentration layer. A doping concentration in the low concentration layer is lower than that in the silicon carbide substrate. A doping concentration in the ultrathin high concentration layer is equal to that in the silicon carbide substrate.
摘要翻译： 能够抑制由基板与外延层之间的晶格失配引起的晶体质量下降的半导体器件，并且还可以确保电压维持性能，以及用于形成半导体器件的晶片。 用于制造半导体器件的碳化硅（SiC）的外延晶片包括低电阻基板和设置在其上的外延层。 外延层掺杂有与掺杂到衬底中的掺杂剂相同的掺杂剂，并且具有包括低浓度层和超薄高浓度层的层压结构。 低浓度层中的掺杂浓度低于碳化硅衬底中的掺杂浓度。 超薄高浓度层中的掺杂浓度等于碳化硅衬底中的掺杂浓度。
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10.发明授权公开(公告)号：US08350270B2
公开(公告)日：2013-01-08
申请号：US12921250
申请日：2009-03-04
申请人： Shoyu Watanabe , Shuhei Nakata , Kenichi Ohtsuka
发明人： Shoyu Watanabe , Shuhei Nakata , Kenichi Ohtsuka
IPC分类号： H01L29/161
CPC分类号： H01L29/7802 , H01L21/047 , H01L29/0642 , H01L29/0878 , H01L29/1608 , H01L29/32 , H01L29/66068
摘要： A silicon carbide MOSFET that exhibits a high source-to-drain withstand voltage and that involves a smaller difference between gate-to-drain capacitance achieved in an activated state and gate-to-drain capacitance achieved in a deactivated state. A silicon carbide drift layer of a first conductivity type is provided on a silicon carbide substrate of a first conductivity type; a pair of base regions are provided in a surface layer portion of the silicon carbide drift layer and exhibit a second conductivity type; a pair of source regions are provided in interiors of surface layer portions of the pair of base regions and exhibit a first conductivity type; and semi-insulating regions are provided between the silicon carbide substrate and the pair of base regions.
摘要翻译： 表现出高的源极 - 漏极耐受电压并且在激活状态下实现的栅 - 漏电容与在去激活状态下实现的栅 - 漏电容之间的较小差异的碳化硅MOSFET。 在第一导电类型的碳化硅衬底上提供第一导电类型的碳化硅漂移层; 在碳化硅漂移层的表层部分设置一对基区，呈现第二导电型; 一对源极区域设置在一对基极区域的表层部分的内部并呈现出第一导电类型; 并且在碳化硅衬底和一对基极区之间设置半绝缘区域。
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