公开(公告)号：US20110316119A1

公开(公告)日：2011-12-29

申请号：US13168111

申请日：2011-06-24

申请人： Yong-hoon KIM ,  Yeong-jun Cho ,  Ji-hyun Lee ,  Hee-seok Lee

发明人： Yong-hoon KIM ,  Yeong-jun Cho ,  Ji-hyun Lee ,  Hee-seok Lee

IPC分类号： H01L23/485

CPC分类号： H01G4/30 ,  H01G2/065 ,  H01G4/228 ,  H01L23/3128 ,  H01L23/50 ,  H01L23/642 ,  H01L24/16 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01038 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/078 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1902 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： Provided is a semiconductor package including a de-coupling capacitor. The semiconductor package includes a substrate, on an upper surface of which a semiconductor chip is mounted; a plurality of first conductive bumps that are disposed on a lower surface of the substrate and that electrically connect the substrate to an external device; and a de-coupling capacitor that is disposed on the lower surface of the substrate and includes an electrode portion and at least one dielectric layer, wherein the electrode portion of the de-coupling capacitor includes second conductive bumps that electrically connect the substrate to an external device.

摘要翻译： 提供了包括去耦电容器的半导体封装。 半导体封装包括：衬底，其上表面安装有半导体芯片; 多个第一导电凸块，其设置在所述基板的下表面上，并将所述基板电连接到外部装置; 以及解耦电容器，其设置在所述基板的下表面上并且包括电极部分和至少一个电介质层，其中所述解耦电容器的电极部分包括将所述基板电连接到外部的第二导电凸块 设备。

公开(公告)号：US08587096B2

公开(公告)日：2013-11-19

申请号：US13172174

申请日：2011-06-29

申请人： Yong-hoon Kim ,  Hee-seok Lee ,  Jin-Ha Jeong ,  Ji-hyun Lee

发明人： Yong-hoon Kim ,  Hee-seok Lee ,  Jin-Ha Jeong ,  Ji-hyun Lee

IPC分类号： H01L23/552

CPC分类号： H01L23/552 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H05K1/0233 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Example embodiments relate to a semiconductor device. The semiconductor device may include a first semiconductor chip including a semiconductor substrate, a first through via that penetrates the semiconductor substrate, a second semiconductor chip stacked on one plane of the first semiconductor chip, and a shielding layer covering at least one portion of the first and/or second semiconductor chip and electrically connected to the first through via.

摘要翻译： 示例实施例涉及半导体器件。 半导体器件可以包括第一半导体芯片，其包括半导体衬底，穿透半导体衬底的第一通孔，堆叠在第一半导体芯片的一个平面上的第二半导体芯片，以及覆盖第一半导体衬底的至少一部分的屏蔽层 和/或第二半导体芯片，并且电连接到第一通孔。

公开(公告)号：US20100013066A1

公开(公告)日：2010-01-21

申请号：US12568224

申请日：2009-09-28

申请人： Yong-hoon Kim ,  Hee-seok Lee ,  Yun-seok Choi

发明人： Yong-hoon Kim ,  Hee-seok Lee ,  Yun-seok Choi

IPC分类号： H01L23/60 ,  H01L23/52

CPC分类号： H01L23/552 ,  H01L23/60 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2223/6677 ,  H01L2224/04042 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05554 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/16 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10161 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

摘要： A semiconductor package includes a main substrate, a semiconductor chip having a first side and a second side, the first side of the semiconductor chip disposed on the main substrate and electrically connected to the main substrate, and a conductive network formed on the second side of the semiconductor chip.

摘要翻译： 半导体封装包括主衬底，具有第一侧和第二侧的半导体芯片，设置在主衬底上并与主衬底电连接的半导体芯片的第一侧和形成在主衬底的第二侧上的导电网络 半导体芯片。

公开(公告)号：US20140319701A1

公开(公告)日：2014-10-30

申请号：US14132516

申请日：2013-12-18

申请人： Yong-hoon Kim ,  Hyo-soon Kang ,  Hee-seok Lee ,  Jang-ho Cho

发明人： Yong-hoon Kim ,  Hyo-soon Kang ,  Hee-seok Lee ,  Jang-ho Cho

IPC分类号： H01L25/18 ,  H01L23/50

CPC分类号： H01L25/18 ,  G11C5/025 ,  H01L21/563 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/50 ,  H01L24/05 ,  H01L24/06 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor chip including a substrate, a first data pad arranged on the substrate, and a first control/address pad arranged on the substrate, wherein the first data pad is arranged in an edge region of the substrate, and the first control/address pad is arranged in a center region of the substrate.

摘要翻译： 一种半导体芯片，包括衬底，布置在衬底上的第一数据焊盘和布置在衬底上的第一控制/寻址焊盘，其中第一数据焊盘布置在衬底的边缘区域中，并且第一控制/地址焊盘 布置在基板的中心区域中。

公开(公告)号：US08873245B2

公开(公告)日：2014-10-28

申请号：US13113239

申请日：2011-05-23

申请人： Yong-hoon Kim ,  Hee-seok Lee

发明人： Yong-hoon Kim ,  Hee-seok Lee

IPC分类号： H05K1/18 ,  H01L25/10 ,  H01L25/065 ,  H05K3/34 ,  H05K3/28

CPC分类号： H05K1/183 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/15331 ,  H05K3/284 ,  H05K3/3436 ,  H05K2201/10515 ,  H05K2201/1053 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401

摘要： An embedded chip-on-chip package includes a printed circuit board having a recessed semiconductor chip mounting unit constituted by a recess in the printed circuit board and a circuit pattern at the bottom of the recess, a first semiconductor chip embedded in the recessed semiconductor chip mounting unit and electrically connected to the circuit pattern at the bottom of the recess, and a second semiconductor chip mounted to the recessed semiconductor chip mounting unit and electrically connected to the first semiconductor chip and the printed circuit board independently of each other.

摘要翻译： 嵌入式芯片芯片封装包括印刷电路板，其具有由印刷电路板中的凹部构成的凹陷半导体芯片安装单元和凹部底部的电路图案，嵌入在凹陷半导体芯片中的第一半导体芯片 安装单元，并且电连接到凹部的底部处的电路图案，以及安装到凹陷半导体芯片安装单元并且彼此独立地电连接到第一半导体芯片和印刷电路板的第二半导体芯片。

公开(公告)号：US08445996B2

公开(公告)日：2013-05-21

申请号：US12568224

申请日：2009-09-28

申请人： Yong-hoon Kim ,  Hee-seok Lee ,  Yun-seok Choi

发明人： Yong-hoon Kim ,  Hee-seok Lee ,  Yun-seok Choi

IPC分类号： H01L23/60

CPC分类号： H01L23/552 ,  H01L23/60 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2223/6677 ,  H01L2224/04042 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05554 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/16 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10161 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

摘要： A semiconductor package includes a main substrate, a semiconductor chip having a first side and a second side, the first side of the semiconductor chip disposed on the main substrate and electrically connected to the main substrate, and a conductive network formed on the second side of the semiconductor chip.

摘要翻译： 半导体封装包括主衬底，具有第一侧和第二侧的半导体芯片，设置在主衬底上并与主衬底电连接的半导体芯片的第一侧和形成在主衬底的第二侧上的导电网络 半导体芯片。

公开(公告)号：US07760044B2

公开(公告)日：2010-07-20

申请号：US11761416

申请日：2007-06-12

申请人： Eun-seok Song ,  Hee-seok Lee ,  So-young Lim

发明人： Eun-seok Song ,  Hee-seok Lee ,  So-young Lim

IPC分类号： H04B3/28

CPC分类号： H01Q15/006

摘要： A substrate for a semiconductor package comprises a dielectric substrate, a circuit pattern, and an electromagnetic band gap (EBG) pattern. The circuit pattern is formed on a first surface of the dielectric substrate and is connected to ground via a ground connection. The electromagnetic band gap (EBG) pattern comprises a plurality of zigzag unit structures formed on a second surface of the dielectric substrate, wherein the second surface is formed on an opposite side of the dielectric substrate from the first surface; the zigzag unit structures are electrically connected to each other; and at least one of the zigzag unit structures is electrically connected to the ground connection.

摘要翻译： 用于半导体封装的衬底包括电介质衬底，电路图案和电磁带隙（EBG）图案。 电路图案形成在电介质基板的第一表面上，并通过接地连接接地。 电磁带隙（EBG）图案包括形成在电介质基板的第二表面上的多个之字形单元结构，其中第二表面形成在电介质基板的与第一表面相反的一侧上; 之字形单元结构彼此电连接; 并且所述之字形单元结构中的至少一个电连接到所述接地连接。

公开(公告)号：US07705433B2

公开(公告)日：2010-04-27

申请号：US11870533

申请日：2007-10-11

申请人： Hee-seok Lee ,  Yun-seok Choi ,  Eun-seok Song

发明人： Hee-seok Lee ,  Yun-seok Choi ,  Eun-seok Song

IPC分类号： H01L23/552

CPC分类号： H01L23/552 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A semiconductor package includes a chip including a conductive pattern thereon, a conductive network attached on a surface of the chip to absorb static electricity, at least one conductive rod attached to the conductive network, wherein the at least one conductive rod is formed substantially perpendicularly to the conductive network, and a grounding portion discharging the static electricity absorbed from the conductive network.

摘要翻译： 半导体封装包括其上包括导电图案的芯片，附接在芯片的表面上以吸收静电的导电网络，附接到导电网络的至少一个导电棒，其中至少一个导电棒基本上垂直于 导电网络，以及放电从导电网吸收的静电的接地部分。

公开(公告)号：US20080087988A1

公开(公告)日：2008-04-17

申请号：US11870533

申请日：2007-10-11

申请人： Hee-seok Lee ,  Yun-seok Choi ,  Eun-seok Song

发明人： Hee-seok Lee ,  Yun-seok Choi ,  Eun-seok Song

IPC分类号： H01L23/552

CPC分类号： H01L23/552 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A semiconductor package includes a chip including a conductive pattern thereon, a conductive network attached on a surface of the chip to absorb static electricity, at least one conductive rod attached to the conductive network, wherein the at least one conductive rod is formed substantially perpendicularly to the conductive network, and a grounding portion discharging the static electricity absorbed from the conductive network.

摘要翻译： 半导体封装包括其上包括导电图案的芯片，附接在芯片的表面上以吸收静电的导电网络，附接到导电网络的至少一个导电棒，其中至少一个导电棒基本上垂直于 导电网络，以及放电从导电网吸收的静电的接地部分。

公开(公告)号：US08552521B2

公开(公告)日：2013-10-08

申请号：US12639228

申请日：2009-12-16

申请人： Eun-seok Song ,  Hee-seok Lee ,  Sung-woo Park

发明人： Eun-seok Song ,  Hee-seok Lee ,  Sung-woo Park

IPC分类号： H01L29/00

CPC分类号： H01L23/66 ,  H01L23/481 ,  H01L24/48 ,  H01L25/0655 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/19041 ,  H01L2924/19051 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package removes power noise by using a ground impedance. The semiconductor package includes an analog circuit block, a digital circuit block, an analog ground impedance structure, a digital ground impedance structure, and an integrated ground. The integrated ground and the analog circuit block are electrically connected via the analog ground impedance structure, and the integrated ground and the digital circuit block are electrically connected via the digital ground impedance structure, and an inductance of the analog ground impedance structure is greater than an inductance of the digital ground impedance structure.

摘要翻译： 半导体封装通过使用接地阻抗来消除功率噪声。 半导体封装包括模拟电路块，数字电路块，模拟地阻抗结构，数字接地阻抗结构和集成地。 集成地和模拟电路块通过模拟接地阻抗结构电连接，集成地和数字电路块通过数字接地阻抗结构电连接，模拟地阻抗结构的电感大于 数字接地阻抗结构的电感。