公开(公告)号：US20130277850A1

公开(公告)日：2013-10-24

申请号：US13859175

申请日：2013-04-09

申请人： NAPRA CO., LTD.

发明人： Shigenobu Sekine ,  Yurina Sekine

IPC分类号： H01L23/48

CPC分类号： H01L23/48 ,  H01B1/22 ,  H01L21/4867 ,  H01L21/563 ,  H01L23/498 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49883 ,  H01L23/49894 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/16 ,  H01L31/022425 ,  H01L31/0682 ,  H01L33/62 ,  H01L2224/0332 ,  H01L2224/0341 ,  H01L2224/03848 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05205 ,  H01L2224/05209 ,  H01L2224/05211 ,  H01L2224/05213 ,  H01L2224/05318 ,  H01L2224/05324 ,  H01L2224/05338 ,  H01L2224/05339 ,  H01L2224/05344 ,  H01L2224/05347 ,  H01L2224/05355 ,  H01L2224/0536 ,  H01L2224/05366 ,  H01L2224/05369 ,  H01L2224/05562 ,  H01L2224/0569 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/17181 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81375 ,  H01L2224/81395 ,  H01L2224/81505 ,  H01L2224/81509 ,  H01L2224/81511 ,  H01L2224/81513 ,  H01L2224/81618 ,  H01L2224/81624 ,  H01L2224/81638 ,  H01L2224/81639 ,  H01L2224/81644 ,  H01L2224/81647 ,  H01L2224/81655 ,  H01L2224/8166 ,  H01L2224/81666 ,  H01L2224/81669 ,  H01L2224/831 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01327 ,  H01L2924/12041 ,  H01L2924/15747 ,  H01L2933/0016 ,  H01L2933/0066 ,  Y02E10/547 ,  H01L2924/01014 ,  H01L2924/00 ,  H01L2224/05552

摘要： An electronic device includes a substrate and an electronic component. The substrate has a metallization trace. The metallization trace has a metallization layer and a synthetic resin layer. The metallization layer has a high-melting-point metallic component and a low-melting-point metallic component. The high-melting-point metallic component and the low-melting-point metallic component are diffusion bonded together and adhered to a surface of the substrate. The synthetic resin layer is formed simultaneously with the metallization layer to cover a surface of the metallization layer with a thickness in the range of 5 nm to 1000 nm. The electronic component is electrically connected to the metallization layer.

摘要翻译： 电子设备包括基板和电子部件。 衬底具有金属化迹线。 金属化迹线具有金属化层和合成树脂层。 金属化层具有高熔点金属成分和低熔点金属成分。 高熔点金属成分和低熔点金属成分被扩散接合在一起并附着在基板的表面。 合成树脂层与金属化层同时形成，以覆盖金属化层的表面，厚度在5nm至1000nm的范围内。 电子部件电连接到金属化层。

公开(公告)号：US09640509B1

公开(公告)日：2017-05-02

申请号：US15280524

申请日：2016-09-29

申请人： International Business Machines Corporation

发明人： Chih-Chao Yang

IPC分类号： H01L23/00

CPC分类号： H01L24/26 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/32 ,  H01L24/80 ,  H01L24/94 ,  H01L25/50 ,  H01L2224/0341 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/0361 ,  H01L2224/03616 ,  H01L2224/039 ,  H01L2224/04 ,  H01L2224/05026 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/05176 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05657 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/08145 ,  H01L2224/08147 ,  H01L2224/08148 ,  H01L2224/80075 ,  H01L2224/80201 ,  H01L2224/80365 ,  H01L2224/80385 ,  H01L2224/80895 ,  H01L2224/80948 ,  H01L2224/94 ,  H01L2224/08 ,  H01L2224/80 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/04953 ,  H01L2924/01022 ,  H01L2924/0498 ,  H01L2924/01044 ,  H01L2924/01073 ,  H01L2924/0509 ,  H01L2924/0496 ,  H01L2924/01074

摘要： A first semiconductor structure having a first metallic structure that has a convex outermost surface and a second semiconductor structure having a second metallic structure that has a concave outermost surface are first provided. The first and second metallic structures are provided utilizing liner systems that have an opposite galvanic reaction to the metal or metal alloy that constitutes the first and second metallic structures such that during a planarization process the metal liners have a different removal rate than the metal or metal alloy that constitutes the first and second metallic structures. The first semiconductor structure and the second semiconductor structure are then bonded together such that the convex outermost surface of the first metallic structure is in direct contact with the concave outermost surface of the second metallic structure.

公开(公告)号：US20120091574A1

公开(公告)日：2012-04-19

申请号：US12904506

申请日：2010-10-14

申请人： Chih-Wei LIN ,  Ming-Da CHENG ,  Wen-Hsiung LU ,  Meng-Wei CHOU ,  Hung-Jui KUO ,  Chung-Shi LIU

发明人： Chih-Wei LIN ,  Ming-Da CHENG ,  Wen-Hsiung LU ,  Meng-Wei CHOU ,  Hung-Jui KUO ,  Chung-Shi LIU

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L24/13 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0341 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05559 ,  H01L2224/05564 ,  H01L2224/05647 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11472 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13017 ,  H01L2224/13023 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/48 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01028 ,  H01L2924/01044 ,  H01L2924/01025 ,  H01L2924/01022 ,  H01L2924/01032 ,  H01L2924/00 ,  H01L2224/05552

摘要： The invention relates to a bump structure of a semiconductor device. An exemplary structure for a semiconductor device comprises a substrate; a contact pad over the substrate; a passivation layer extending over the substrate having an opening over the contact pad; and a conductive pillar over the opening of the passivation layer, wherein the conductive pillar comprises an upper portion substantially perpendicular to a surface of the substrate and a lower portion having tapered sidewalls.

摘要翻译： 本发明涉及半导体器件的凸块结构。 半导体器件的示例性结构包括衬底; 衬底上的接触垫; 钝化层，其在所述衬底上延伸，在所述接触焊盘上具有开口; 以及在所述钝化层的开口上的导电柱，其中所述导电柱包括基本上垂直于所述衬底的表面的上部和具有锥形侧壁的下部。