公开(公告)号：EP2430887A4

公开(公告)日：2013-10-09

申请号：EP10774473

申请日：2010-05-14

申请人： 4233999 CANADA INC

发明人： KHALID NAJEEB

IPC分类号： H05B37/02 ,  B41B21/08 ,  B41C1/10 ,  B41J2/45 ,  H01L27/146 ,  H01L31/024 ,  H05K3/02

CPC分类号： H05K3/00 ,  B41J2/451 ,  H01L24/06 ,  H01L27/14618 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/00

公开(公告)号：EP2596526A2

公开(公告)日：2013-05-29

申请号：EP11810162.5

申请日：2011-07-12

申请人： International Business Machines Corporation ,  International Business Machines Corporation (YT)

发明人： FAROOQ, Mukta, G. ,  HANNON, Robert ,  VOLANT, Richard, P.

IPC分类号： H01L21/768 ,  H01L21/3205 ,  H01L21/28 ,  H01L23/48

CPC分类号： H01L21/76898 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3171 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/93 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06181 ,  H01L2224/11002 ,  H01L2224/11334 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81801 ,  H01L2224/93 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/15788 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00 ,  H01L2224/05552

摘要： A through-substrate via (TSV) structure that is immune to metal contamination due to a backside planarization process is provided. After forming a through-substrate via (TSV) trench, a diffusion barrier liner is conformally deposited on the sidewalls of the TSV trench. A dielectric liner is formed by depositing a dielectric material on vertical portions of the diffusion barrier liner. A metallic conductive via structure is formed by subsequently filling the TSV trench. Horizontal portions of the diffusion barrier liner are removed. The diffusion barrier liner protects the semiconductor material of the substrate during the backside planarization by blocking residual metallic material originating from the metallic conductive via structure from entering into the semiconductor material of the substrate, thereby protecting the semiconductor devices within the substrate from metallic contamination.

公开(公告)号：EP2589076A2

公开(公告)日：2013-05-08

申请号：EP11801390.3

申请日：2011-06-30

申请人： Intel Corporation

发明人： MALATKAR, Pramod

IPC分类号： H01L23/48 ,  H01L23/482 ,  H05K3/46

CPC分类号： H01L24/96 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/06 ,  H01L24/12 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0657 ,  H01L25/18 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/0557 ,  H01L2224/06135 ,  H01L2224/06155 ,  H01L2224/12105 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/24195 ,  H01L2224/24226 ,  H01L2224/73259 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15172 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2224/05552 ,  H01L2924/00

摘要： The present disclosure relates to the field of integrated circuit package design and, more particularly, to packages using a bumpless build-up layer (BBUL) designs. Embodiments of the present description relate to the field of fabricating microelectronic packages, wherein an interposer, such as a through-silicon via interposer, may be used in a bumpless build-up layer package to facilitate stacked microelectronic components.

公开(公告)号：EP2560198A1

公开(公告)日：2013-02-20

申请号：EP11768894.5

申请日：2011-04-13

申请人： Sony Chemical & Information Device Corporation

发明人： NAMIKI, Hidetsugu ,  KANISAWA, Shiyuki ,  UMAKOSHI, Hideaki ,  ISHIGAMI, Akira

IPC分类号： H01L21/60 ,  C09J9/02 ,  C09J11/00 ,  C09J201/00 ,  H01L33/60 ,  H01L33/62

CPC分类号： C09J9/02 ,  C08K3/08 ,  C08K3/22 ,  C08K3/24 ,  C08K7/08 ,  C08K9/06 ,  C08K2003/0831 ,  C08K2003/2241 ,  C08K2003/2296 ,  C09J11/04 ,  H01L24/06 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L33/405 ,  H01L33/60 ,  H01L33/62 ,  H01L2224/0401 ,  H01L2224/13339 ,  H01L2224/16225 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29198 ,  H01L2224/29339 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49107 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/83855 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01081 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/07811 ,  H01L2924/10157 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A light-reflective anisotropic conductive adhesive and light-emitting device capable of maintaining luminous efficiency of a light-emitting element and preventing the occurrence of a crack to obtain conduction reliability are provided. The light-reflective anisotropic conductive adhesive contains a thermosetting resin composite, conductive particles, and a light-reflective acicular insulating particles. These light-reflective acicular insulating particles are inorganic particles of at least one type selected from the group including titanium oxide, zinc oxide, and titanate.

摘要翻译： 提供了能够保持发光元件的发光效率并防止发生裂缝以获得导通可靠性的光反射各向异性导电粘合剂和发光装置。 光反射各向异性导电粘合剂包含热固性树脂复合物，导电颗粒和反光针状绝缘颗粒。 这些光反射针状绝缘粒子是选自氧化钛，氧化锌，钛酸盐中的至少一种的无机粒子。

公开(公告)号：EP2559061A2

公开(公告)日：2013-02-20

申请号：EP11741401.1

申请日：2011-04-13

申请人： Pac Tech - Packaging Technologies GmbH

发明人： AZDASHT, Ghassem

IPC分类号： H01L21/60

CPC分类号： B23K1/20 ,  B23K1/0056 ,  B23K3/06 ,  B23K3/0607 ,  H01L21/6835 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/742 ,  H01L2224/0401 ,  H01L2224/11002 ,  H01L2224/11003 ,  H01L2224/11822 ,  H01L2224/13099 ,  H01L2224/7515 ,  H01L2924/00 ,  H01L2924/00013 ,  H01L2924/01058 ,  H01L2924/01068 ,  H01L2924/014 ,  H01L2924/12042

摘要： The invention relates to a method for forming solder deposits (34) on raised contact metallization structures (24) of connection surfaces (23) of a substrate (19) designed in particular as a semiconductor component, wherein wetting surfaces (26) of the contact metallization structures (24) are brought in contact with a solder material layer (15) arranged on a solder material carrier (13), the substrate (19) is heated and the temperature of the solder material layer (15) is controlled at least during the duration of the contact, and subsequently the contact metallization structures (24) wetted with solder material (34) and the solder material layer (15) are separated, thus making it possible to prevent the formation of contact bridges between adjoining contact metallization structures (24) resulting from the surface tension of fused solder material when the wetting surfaces (26) of the contact metallization structures (24) and the solder material layer (15) are separated.

摘要翻译： 本发明涉及一种用于形成对升高的接触金属焊料沉积物（34），特别是形成为半导体部件的基板的终端面（23）（19）（24），其中润湿接触的表面（26） 金属化被带入与布置的焊料材料的载体（13）上的钎焊材料层（15），至少在物理接触的持续时间的基板的加热和钎焊材料层发生的回火，和物理接触 随后用焊接材料润湿的接触金属和焊接材料层之间的物理接触的分离发生。

公开(公告)号：EP2548226A1

公开(公告)日：2013-01-23

申请号：EP11755583.9

申请日：2011-03-08

申请人： MOSAID Technologies Incorporated

发明人： GILLINGHAM, Peter

IPC分类号： H01L23/50 ,  H01L21/58 ,  H01L27/10

CPC分类号： H01L21/82 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/06155 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/1438 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2224/48145 ,  H01L2924/00012 ,  H01L2224/45099

摘要： A semiconductor device has a plurality of stacked semiconductor dice mounted on a substrate. Each die has similar dimensions. Each die has a first plurality of bonding pads arranged along a bonding edge of the die. A first group of the dice are mounted to the substrate with the bonding edge oriented in a first direction. A second group of the dice are mounted to the substrate with the bonding edge oriented in a second direction opposite the first direction. Each die is laterally offset in the second direction relative to the remaining dice by a respective lateral offset distance such that the bonding pads of each die are not disposed between the substrate and any portion of the remaining dice in a direction perpendicular to the substrate. A plurality of bonding wires connects the bonding pads to the substrate. A method of manufacturing a semiconductor device is also disclosed.

摘要翻译： 半导体器件具有安装在衬底上的多个堆叠的半导体管芯。 每个芯片都有相似的尺寸。 每个管芯具有沿着管芯的接合边缘布置的第一多个接合焊盘。 将第一组裸片安装到衬底上，其中接合边缘沿第一方向取向。 将第二组裸片安装到衬底上，其中接合边缘沿与第一方向相反的第二方向取向。 每个管芯在第二方向上相对于剩余管芯横向偏移相应的横向偏移距离，使得每个管芯的焊盘不在与基板垂直的方向上设置在基板和剩余管芯的任何部分之间。 多个键合线将键合焊盘连接到衬底。 还公开了一种制造半导体器件的方法。

公开(公告)号：EP2153706A4

公开(公告)日：2013-01-23

申请号：EP08764770

申请日：2008-05-21

申请人： CANON KK

发明人： KUMAKURA SUSUMU

IPC分类号： H05K1/14 ,  H01L21/60 ,  H01L23/12 ,  H01L23/498 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H05K1/11 ,  H05K3/34

CPC分类号： H05K1/111 ,  H01L23/49816 ,  H01L24/02 ,  H01L24/06 ,  H01L24/17 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/13099 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/15311 ,  H01L2924/3025 ,  H05K1/0203 ,  H05K1/141 ,  H05K3/3436 ,  H05K2201/049 ,  H05K2201/09381 ,  H05K2201/094 ,  H05K2201/09427 ,  H05K2201/10515 ,  H05K2201/10734 ,  Y02P70/611 ,  Y02P70/613

公开(公告)号：EP2498289A2

公开(公告)日：2012-09-12

申请号：EP11196258.5

申请日：2011-12-30

申请人： International Rectifier Corporation

发明人： Chang, Hsueh-Rong

IPC分类号： H01L23/495 ,  H01L23/498 ,  H01L21/60 ,  H01L25/07 ,  H01L23/492

CPC分类号： H01R13/10 ,  H01L23/49811 ,  H01L23/49844 ,  H01L24/05 ,  H01L24/06 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L24/73 ,  H01L25/072 ,  H01L29/7393 ,  H01L2224/04042 ,  H01L2224/05124 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/0603 ,  H01L2224/29101 ,  H01L2224/32225 ,  H01L2224/37011 ,  H01L2224/37147 ,  H01L2224/37639 ,  H01L2224/4007 ,  H01L2224/40095 ,  H01L2224/40225 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48132 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/48739 ,  H01L2224/48755 ,  H01L2224/48766 ,  H01L2224/4911 ,  H01L2224/49111 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84011 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/09511 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15787 ,  H01L2924/15798 ,  H01L2924/3641 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00015

摘要： According to one disclosed embodiment, a power semiconductor package includes an insulated-gate bipolar transistor (IGBT) residing on a package substrate (470, 570), where the IGBT (420,520) includes a plurality of solderable front metal (SFM) coated emitter segments (492,592) situated atop the IGBT (420,520) and connected to an emitter of the IGBT. The power semiconductor package also includes a conductive clip (480,580) coupling the plurality of SFM coated emitter segments (492, 592) to an emitter pad on the package substrate (470, 570). Additionally, the power semiconductor package includes a gate pad on the package substrate coupled to a gate of the IGBT, a collector pad on the package substrate situated under the IGBT and coupled to a collector of the IGBT, and an emitter terminal, a collector terminal and a gate terminal of the package substrate that are routed to the emitter pad, collector pad, and gate pad, respectively. The conductive clip (480, 580) further has through holes (484) in the conductive clip body (490) that are configured to allow reflow degassing to escape from the surface area of the coupling between emitter segements (492) and the conductiv clip body (490) thereby siginificantly reducing the risk of physical irregularities during the reflow process.

摘要翻译： 根据一个公开的实施例，功率半导体封装包括驻留在封装衬底（470,570）上的绝缘栅双极晶体管（IGBT），其中IGBT（420,520）包括多个可焊接前金属（SFM）涂覆的发射极段 （492,592）位于IGBT（420,520）的顶部并连接到IGBT的发射极。 功率半导体封装还包括将多个SFM涂覆的发射极区（492,592）耦合到封装衬底（470,570）上的发射极焊盘的导电夹（480,580）。 另外，功率半导体封装包括耦合到IGBT的栅极的封装衬底上的栅极焊盘，位于IGBT下方并且耦合到IGBT的集电极的封装衬底上的集电极焊盘，以及发射极端子，集电极端子 以及封装衬底的栅极端子，其分别被引导到发射极焊盘，集电极焊盘和栅极焊盘。 导电夹（480,580）还具有在导电夹体（490）中的通孔（484），其配置成允许回流脱气从发射器区段（492）和导体夹体（492）之间的耦合的表面区域逸出 （490），从而显着降低回流过程中物理不规则的风险。

公开(公告)号：EP1906452B1

公开(公告)日：2012-08-29

申请号：EP06729669.9

申请日：2006-03-22

申请人： SANKEN ELECTRIC CO., LTD.

发明人： TORII, Katsuyuki c/o Sanken Electric Co., Ltd.

IPC分类号： H01L23/52 ,  H01L25/07 ,  H01L21/98

CPC分类号： H01L25/071 ,  H01L24/05 ,  H01L24/06 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/18 ,  H01L25/50 ,  H01L29/7395 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/32145 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45155 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/92247 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1301 ,  H01L2924/13033 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2924/013 ,  H01L2924/00013 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： A reliable semiconductor device is provided which comprises lower and upper IGBTs 1 and 2 preferably bonded to each other by solder, and a wire strongly connected to lower IGBT 1. The semiconductor device comprises a lower IGBT 1, a lower electrode layer 5 secured on lower IGBT 1, an upper electrode layer 6 secured on lower electrode layer 5, an upper IGBT 2 secured on upper electrode layer 6, and a solder layer 7 which connects upper electrode layer 6 and upper IGBT 2. Lower and upper electrode layers 5 and 6 are formed of different materials from each other, and upper electrode layer 6 has a notch 36 to partly define on an upper surface 5a of lower electrode layer 5 a bonding region 15 exposed to the outside through notch 36 so that one end of a wire 8 is connected to bonding region 15. Upper electrode layer 6 can be formed of one material superior in soldering, and also, lower electrode layer 5 can be formed of another material having a high adhesive strength to wire 8.

公开(公告)号：EP2471096A1

公开(公告)日：2012-07-04

申请号：EP10824354.4

申请日：2010-10-21

申请人： ATI Technologies ULC

发明人： TOPACIO, Roden ,  WONG, Gabriel

IPC分类号： H01L23/488 ,  H01L23/50

CPC分类号： H01L23/49816 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L2224/0233 ,  H01L2224/02331 ,  H01L2224/02375 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05008 ,  H01L2224/05012 ,  H01L2224/05013 ,  H01L2224/05014 ,  H01L2224/05015 ,  H01L2224/05022 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05583 ,  H01L2224/05599 ,  H01L2224/06131 ,  H01L2224/1132 ,  H01L2224/13007 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81815 ,  H01L2924/00 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/0105 ,  H01L2924/01083 ,  H01L2924/01028 ,  H01L2924/01031 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00012

摘要： A routing layer for a semiconductor die is disclosed. The routing layer includes pads for attaching solder bumps; bond-pads bonded to bump-pads of a die having an integrated circuit, and traces interconnecting bond-pads to pads. The routing layer is formed on a layer of dielectric material. The routing layer includes conductive traces at least partially surrounding some pads so as to absorb stress from solder bumps attached to the pads. Parts of the traces that surround pads protect parts of the underlying dielectric material proximate the solder bumps, from the stress.