Interfacial capping layers for interconnects
    6.
    发明授权
    Interfacial capping layers for interconnects 有权
    用于互连的界面覆盖层

    公开(公告)号:US08268722B2

    公开(公告)日:2012-09-18

    申请号:US12688154

    申请日:2010-01-15

    IPC分类号: H01L21/4763 H01L29/40

    摘要: Adhesive layers residing at an interface between metal lines and dielectric diffusion barrier (or etch stop) layers are used to improve electromigration performance of interconnects. Adhesion layers are formed by depositing a precursor layer of metal-containing material (e.g., material containing Al, Ti, Ca, Mg, etc.) over an exposed copper line, and converting the precursor layer to a passivated layer (e.g., nitridized layer). For example, a substrate containing exposed copper line having exposed Cu—O bonds is contacted with trimethylaluminum to form a precursor layer having Al—O bonds and Al—C bonds on copper surface. The precursor layer is then treated to remove residual organic substituents and to form Al—N, Al—H bonds or both. The treatment can include direct plasma treatment, remote plasma treatment, UV-treatment, and thermal treatment with a gas such as NH3, H2, N2, and mixtures thereof. A dielectric diffusion barrier layer is then deposited.

    摘要翻译: 使用驻留在金属线和电介质扩散阻挡层(或蚀刻停止)层之间的界面处的粘合层来改善互连的电迁移性能。 通过在暴露的铜线上沉积含金属材料(例如,含有Al,Ti,Ca,Mg等的材料)的前体层,并将前体层转化为钝化层(例如,氮化层 )。 例如,含有暴露的Cu-O键的暴露的铜线的基板与三甲基铝接触以形成在铜表面上具有Al-O键和Al-C键的前体层。 然后处理前体层以除去残留的有机取代基并形成Al-N,Al-H键或两者。 处理可以包括直接等离子体处理,远程等离子体处理,UV处理和用诸如NH 3,H 2,N 2的气体及其混合物的热处理。 然后沉积介电扩散阻挡层。

    Adhesion between dielectric materials
    9.
    发明授权
    Adhesion between dielectric materials 有权
    介电材料之间的粘合力

    公开(公告)号:US06713873B1

    公开(公告)日:2004-03-30

    申请号:US10306642

    申请日:2002-11-27

    IPC分类号: H01L2348

    摘要: The present invention discloses a method including: determining whether a surface of a dielectric layer is reactive; activating the surface if the surface is not reactive; performing a cycle on the surface, the cycle including: reacting the surface with a metal; and activating the metal. The present invention also discloses a structure including: a substrate; a first interlayer dielectric located over the substrate; a first adhesion promoter layer located over the first interlayer dielectric; an etch stop layer located over the first adhesion promoter layer; a second adhesion promoter layer located over the etch stop layer; and a second interlayer dielectric located over the second adhesion promoter layer.

    摘要翻译: 本发明公开了一种方法,包括:确定电介质层的表面是否是反应性的; 如果表面不反应,激活表面; 在表面上进行循环,循环包括:使表面与金属反应; 并激活金属。 本发明还公开了一种结构,包括:基板; 位于所述衬底上方的第一层间电介质; 位于所述第一层间电介质上的第一粘附促进剂层; 位于所述第一粘附促进剂层上方的蚀刻停止层; 位于所述蚀刻停止层上方的第二粘附促进剂层; 以及位于所述第二粘附促进层上方的第二层间电介质。

    PECVD DEPOSITION OF SMOOTH POLYSILICON FILMS
    10.
    发明申请
    PECVD DEPOSITION OF SMOOTH POLYSILICON FILMS 审中-公开
    PECVD沉积光滑多层膜

    公开(公告)号:US20120142172A1

    公开(公告)日:2012-06-07

    申请号:US13313422

    申请日:2011-12-07

    IPC分类号: H01L21/20 C23C16/52 C23C16/50

    摘要: Smooth silicon and silicon germanium films are deposited by plasma enhanced chemical vapor deposition (PECVD). The films are characterized by roughness (Ra) of less than about 4 Å. In some embodiments, smooth silicon films are undoped and doped polycrystalline silicon films. The dopants can include boron, phosphorus, and arsenic. In some embodiments the smooth polycrystalline silicon films are also highly conductive. For example, boron-doped polycrystalline silicon films having resistivity of less than about 0.015 Ohm cm and Ra of less than about 4 Å can be deposited by PECVD. In some embodiments smooth silicon films are incorporated into stacks of alternating layers of doped and undoped polysilicon, or into stacks of alternating layers of silicon oxide and doped polysilicon employed in memory devices. Smooth films can be deposited using a process gas having a low concentration of silicon-containing precursor and/or a process gas comprising a silicon-containing precursor and H2.

    摘要翻译: 通过等离子体增强化学气相沉积(PECVD)沉积光滑的硅和锗锗膜。 膜的特征在于粗糙度(Ra)小于约4。 在一些实施例中,平滑的硅膜是未掺杂的和掺杂的多晶硅膜。 掺杂剂可以包括硼,磷和砷。 在一些实施例中,平滑多晶硅膜也是高导电性的。 例如,可以通过PECVD沉积电阻率小于约0.015欧姆·厘米且小于约的Ra的硼掺杂多晶硅膜。 在一些实施例中,平滑的硅膜被并入到掺杂和未掺杂多晶硅的交替层的堆叠中,或并入存储器件中使用的氧化硅和掺杂多晶硅的交替层的堆叠中。 可以使用具有低浓度含硅前体的工艺气体和/或包含含硅前体和H 2的工艺气体来沉积光滑的膜。