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1.发明授权公开(公告)号：US09056763B2
公开(公告)日：2015-06-16
申请号：US14039157
申请日：2013-09-27
申请人： Christian Geissler , Thorsten Meyer , Gerald Ofner , Reinhard Mahnkopf , Andreas Augustin , Christian Mueller
发明人： Christian Geissler , Thorsten Meyer , Gerald Ofner , Reinhard Mahnkopf , Andreas Augustin , Christian Mueller
CPC分类号： B81C1/00666 , B81B7/0054 , B81C1/00261 , B81C1/00349 , B81C2203/0136 , B81C2203/0154 , H01L21/568 , H01L23/3135 , H01L24/19 , H01L24/96 , H01L2224/12105 , H01L2224/16145 , H01L2224/24137 , H01L2224/32145 , H01L2224/48091 , H01L2224/48145 , H01L2224/73207 , H01L2224/73259 , H01L2224/73265 , H01L2224/73277 , H01L2924/1461 , H01L2924/181 , H01L2924/3511 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： Stress buffer layers for integrated microelectromechanical systems (MEMS) are described. For example, a semiconductor package includes a substrate having first and second surfaces, the second surface having an array of external conductive contacts. A microelectromechanical system (MEMS) component is disposed above the first surface of the substrate. A buffer layer is disposed above the MEMS component, the buffer layer having a first Young's modulus. A mold compound is disposed above the buffer layer, the mold compound having a second Young's modulus higher than the first Young's modulus.
摘要翻译： 描述了用于集成微机电系统（MEMS）的应力缓冲层。 例如，半导体封装包括具有第一和第二表面的衬底，第二表面具有外部导电触点阵列。 微机电系统（MEMS）部件设置在基板的第一表面上方。 缓冲层设置在MEMS部件上方，缓冲层具有第一杨氏模量。 模具化合物设置在缓冲层上方，模塑料具有高于第一杨氏模量的第二杨氏模量。
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公开(公告)号：US20150091167A1
公开(公告)日：2015-04-02
申请号：US14039157
申请日：2013-09-27
申请人： Christian Geissler , Thorsten Meyer , Gerald Ofner , Reinhard Mahnkopf , Andreas Augustin , Christian Mueller
发明人： Christian Geissler , Thorsten Meyer , Gerald Ofner , Reinhard Mahnkopf , Andreas Augustin , Christian Mueller
CPC分类号： B81C1/00666 , B81B7/0054 , B81C1/00261 , B81C1/00349 , B81C2203/0136 , B81C2203/0154 , H01L21/568 , H01L23/3135 , H01L24/19 , H01L24/96 , H01L2224/12105 , H01L2224/16145 , H01L2224/24137 , H01L2224/32145 , H01L2224/48091 , H01L2224/48145 , H01L2224/73207 , H01L2224/73259 , H01L2224/73265 , H01L2224/73277 , H01L2924/1461 , H01L2924/181 , H01L2924/3511 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： Stress buffer layers for integrated microelectromechanical systems (MEMS) are described. For example, a semiconductor package includes a substrate having first and second surfaces, the second surface having an array of external conductive contacts. A microelectromechanical system (MEMS) component is disposed above the first surface of the substrate. A buffer layer is disposed above the MEMS component, the buffer layer having a first Young's modulus. A mold compound is disposed above the buffer layer, the mold compound having a second Young's modulus higher than the first Young's modulus.
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公开(公告)号：US20140361387A1
公开(公告)日：2014-12-11
申请号：US13910133
申请日：2013-06-05
申请人： Thorsten Meyer , Gerald Ofner , Christian Mueller , Reinhard Mahnkopf , Christian Geissler , Andreas Augustin
发明人： Thorsten Meyer , Gerald Ofner , Christian Mueller , Reinhard Mahnkopf , Christian Geissler , Andreas Augustin
CPC分类号： B81B7/0077 , B81B7/007 , B81B2207/012 , B81B2207/095 , B81C1/00333 , H01L24/19 , H01L2224/04105 , H01L2224/12105 , H01L2224/16146 , H01L2224/16227 , H01L2224/24137 , H01L2224/32145 , H01L2224/48091 , H01L2224/48137 , H01L2224/48145 , H01L2224/48227 , H01L2224/73259 , H01L2224/73267 , H01L2924/1431 , H01L2924/1461 , H01L2924/15311 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A chip arrangement may include: a mold compound; and a microelectromechanical systems device at least partially embedded in the mold compound.
摘要翻译： 芯片布置可以包括：模具化合物; 以及至少部分地嵌入模具化合物中的微机电系统装置。
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4.发明申请公开(公告)号：US20150266728A1
公开(公告)日：2015-09-24
申请号：US14731211
申请日：2015-06-04
申请人： Christian Geissler , Thorsten Meyer , Gerald Ofner , Reinhard Mahnkopf , Andreas Augustin , Christian Mueller
发明人： Christian Geissler , Thorsten Meyer , Gerald Ofner , Reinhard Mahnkopf , Andreas Augustin , Christian Mueller
IPC分类号： B81C1/00
CPC分类号： B81C1/00666 , B81B7/0054 , B81C1/00261 , B81C1/00349 , B81C2203/0136 , B81C2203/0154 , H01L21/568 , H01L23/3135 , H01L24/19 , H01L24/96 , H01L2224/12105 , H01L2224/16145 , H01L2224/24137 , H01L2224/32145 , H01L2224/48091 , H01L2224/48145 , H01L2224/73207 , H01L2224/73259 , H01L2224/73265 , H01L2224/73277 , H01L2924/1461 , H01L2924/181 , H01L2924/3511 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： Stress buffer layers for integrated microelectromechanical systems (MEMS) are described. For example, a semiconductor package includes a substrate having first and second surfaces, the second surface having an array of external conductive contacts. A microelectromechanical system (MEMS) component is disposed above the first surface of the substrate. A buffer layer is disposed above the MEMS component, the buffer layer having a first Young's modulus. A mold compound is disposed above the buffer layer, the mold compound having a second Young's modulus higher than the first Young's modulus.
摘要翻译： 描述了用于集成微机电系统（MEMS）的应力缓冲层。 例如，半导体封装包括具有第一和第二表面的衬底，第二表面具有外部导电触点阵列。 微机电系统（MEMS）部件设置在基板的第一表面上方。 缓冲层设置在MEMS部件上方，缓冲层具有第一杨氏模量。 模具化合物设置在缓冲层上方，模塑料具有高于第一杨氏模量的第二杨氏模量。
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公开(公告)号：US20140264832A1
公开(公告)日：2014-09-18
申请号：US13802848
申请日：2013-03-14
申请人： Thorsten Meyer , Hans-Joachim Barth , Reinhard Mahnkopf , Sven Albers , Andreas Augustin , Christian Mueller
发明人： Thorsten Meyer , Hans-Joachim Barth , Reinhard Mahnkopf , Sven Albers , Andreas Augustin , Christian Mueller
IPC分类号： H01L23/00
CPC分类号： H01L24/17 , H01L23/5256 , H01L23/5382 , H01L25/0657 , H01L2224/02379 , H01L2224/0401 , H01L2224/0557 , H01L2224/131 , H01L2224/16146 , H01L2224/1703 , H01L2224/17107 , H01L2224/17154 , H01L2224/17181 , H01L2224/17517 , H01L2224/81193 , H01L2924/12042 , H01L2924/014 , H01L2924/00
摘要： A chip arrangement may include: a first chip including a first contact, a second contact, and a redistribution structure electrically coupling the first contact to the second contact; a second chip including a contact; and a plurality of interconnects electrically coupled to the second contact of the first chip, wherein at least one interconnect of the plurality of interconnects electrically couples the second contact of the first chip to the contact of the second chip.
摘要翻译： 芯片布置可以包括：第一芯片，其包括第一触点，第二触点和将第一触点电耦合到第二触点的再分配结构; 包括触点的第二芯片; 以及电耦合到第一芯片的第二触点的多个互连，其中多个互连件中的至少一个互连将第一芯片的第二触点电耦合到第二芯片的触点。
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公开(公告)号：US20140252632A1
公开(公告)日：2014-09-11
申请号：US13786538
申请日：2013-03-06
申请人： Hans-Joachim Barth , Reinhard Mahnkopf , Thorsten Meyer , Sven Albers , Andreas Augustin , Christian Mueller
发明人： Hans-Joachim Barth , Reinhard Mahnkopf , Thorsten Meyer , Sven Albers , Andreas Augustin , Christian Mueller
IPC分类号： H01L23/538
CPC分类号： H01L23/5384 , H01L23/49816 , H01L23/5389 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/19 , H01L25/0657 , H01L25/18 , H01L2224/02375 , H01L2224/0239 , H01L2224/0401 , H01L2224/04105 , H01L2224/05548 , H01L2224/05569 , H01L2224/05624 , H01L2224/05647 , H01L2224/12105 , H01L2224/13025 , H01L2224/131 , H01L2224/13147 , H01L2224/16146 , H01L2224/16227 , H01L2224/1703 , H01L2224/17181 , H01L2224/2518 , H01L2224/32225 , H01L2224/73204 , H01L2224/73259 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06541 , H01L2225/06548 , H01L2924/00014 , H01L2924/1421 , H01L2924/1431 , H01L2924/1432 , H01L2924/1434 , H01L2924/1436 , H01L2924/1461 , H01L2924/15311 , H01L2924/181 , H01L2224/16225 , H01L2924/00012 , H01L2924/014 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor device includes: a semiconductor chip; an extension layer extending laterally from a boundary of the semiconductor chip; a redistribution layer disposed over at least one side of the extension layer and the semiconductor chip, wherein the redistribution layer electrically couples at least one contact of the semiconductor chip to at least one contact of an interface, wherein at least a part of the interface extends laterally beyond the boundary of the semiconductor chip.
摘要翻译： 半导体器件包括：半导体芯片; 延伸层，其从半导体芯片的边界横向延伸; 重新分配层，其设置在所述延伸层和所述半导体芯片的至少一侧上，其中所述再分配层将所述半导体芯片的至少一个触点电耦合到界面的至少一个触点，其中所述界面的至少一部分延伸 横向超出半导体芯片的边界。
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公开(公告)号：US20150282308A1
公开(公告)日：2015-10-01
申请号：US14229476
申请日：2014-03-28
申请人： Thorsten Meyer , Gerald Ofner , Sven Albers , Reinhard Mahnkopf
发明人： Thorsten Meyer , Gerald Ofner , Sven Albers , Reinhard Mahnkopf
CPC分类号： H05K1/181 , H01L21/568 , H01L23/49822 , H01L23/49827 , H01L23/5227 , H01L23/66 , H01L24/00 , H01L24/96 , H01L25/0655 , H01L25/0657 , H01L25/16 , H01L25/18 , H01L2224/04042 , H01L2224/12105 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06517 , H01L2225/06568 , H01L2924/1431 , H01L2924/1434 , H01L2924/15311 , H01L2924/19011 , H01L2924/19105 , H05K1/0233 , H05K1/0292 , H05K1/162 , H05K1/165 , H05K1/185 , H05K3/4644 , H05K2201/10636 , H05K2203/1469 , H05K2203/171 , H05K2203/173 , H05K2203/175 , Y02P70/611 , H01L2924/00012 , H01L2924/00
摘要： Passive electrical devices are described with a polymer carrier. In one example, a conductive layer is formed over a polymer substrate in a pattern to form a passive electrical device and at least two terminals of the device. A plurality of external connection pads are connected to the terminals of the device.
摘要翻译： 无源电器件用聚合物载体描述。 在一个示例中，导电层以图案形成在聚合物基板上，以形成无源电器件和器件的至少两个端子。 多个外部连接焊盘连接到设备的端子。
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公开(公告)号：US20150084165A1
公开(公告)日：2015-03-26
申请号：US14034854
申请日：2013-09-24
申请人： Reinhard Mahnkopf , Wolfgang Molzer , Bernd Memmler , Edmund Goetz , Hans-Joachim Barth , Sven Albers , Thorsten Meyer
发明人： Reinhard Mahnkopf , Wolfgang Molzer , Bernd Memmler , Edmund Goetz , Hans-Joachim Barth , Sven Albers , Thorsten Meyer
IPC分类号： H01L23/538 , H01L21/768 , H01L23/00 , H01L25/00 , H01L21/56 , H01L23/522 , H01L25/07
CPC分类号： H01L23/5389 , H01L21/56 , H01L21/563 , H01L21/76898 , H01L23/3121 , H01L23/5226 , H01L23/5384 , H01L23/562 , H01L24/03 , H01L24/81 , H01L25/0657 , H01L25/074 , H01L25/50 , H01L2224/08146 , H01L2224/16148 , H01L2224/73204 , H01L2225/06513 , H01L2225/06541 , H01L2225/06544 , H01L2225/06548 , H01L2225/06568 , H01L2924/181 , H01L2924/00012
摘要： Embodiments of the present description include stacked microelectronic dice embedded in a microelectronic substrate and methods of fabricating the same. In one embodiment, at least one first microelectronic die is attached to a second microelectronic die, wherein an underfill material is provided between the second microelectronic die and the at least one first microelectronic die. The microelectronic substrate is then formed by laminating the first microelectronic die and the second microelectronic die in a substrate material.
摘要翻译： 本说明书的实施例包括嵌入在微电子衬底中的堆叠微电子骰子及其制造方法。 在一个实施例中，至少一个第一微电子管芯连接到第二微电子管芯，其中在第二微电子管芯和至少一个第一微电子管芯之间提供底部填充材料。 然后通过将第一微电子管芯和第二微电子管芯层压在衬底材料中来形成微电子衬底。
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公开(公告)号：US20150282367A1
公开(公告)日：2015-10-01
申请号：US14227977
申请日：2014-03-27
CPC分类号： H05K7/02 , H01L23/3128 , H01L24/19 , H01L25/03 , H01L25/0657 , H01L25/105 , H01L25/16 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/16227 , H01L2224/24145 , H01L2224/32145 , H01L2224/73267 , H01L2224/92244 , H01L2225/06517 , H01L2225/06524 , H01L2225/06558 , H01L2924/15311 , H05K3/36 , H05K7/023 , H05K13/00 , H05K2203/06 , Y10T156/10
摘要： An electronic assembly that includes a first electronic component that includes a first substrate having a front side and a back side and at least one electronic assembly mounted on the front side of the first substrate, a second electronic component that includes a second substrate having a front side and a back side and at least one electronic assembly mounted on the front side of the second substrate, and wherein the back side of the first substrate is directly attached to the back side of the second substrate.
摘要翻译： 一种电子组件，其包括第一电子部件，所述第一电子部件包括具有前侧和后侧的第一基板和安装在所述第一基板的前侧上的至少一个电子组件，所述第二电子部件包括具有前部的第二基板 侧面和背面以及安装在第二基板的前侧上的至少一个电子组件，并且其中第一基板的背面直接附接到第二基板的背面。
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公开(公告)号：US20150084194A1
公开(公告)日：2015-03-26
申请号：US14037213
申请日：2013-09-25
IPC分类号： H01L23/48
CPC分类号： H01L23/481 , H01L23/66 , H01L2223/6616 , H01L2223/6677 , H01L2224/13025 , H01L2224/16225 , H01L2224/73259 , H01L2924/15311 , H01L2924/3025
摘要： Via are described for radio frequency antenna connections related to a package. In one example, a package has a package substrate, a die attached to the package substrate, and a conductive via from the package substrate to an external surface of the package to make a radio frequency connection between the antenna and the package substrate.
摘要翻译： 描述了与封装有关的射频天线连接的通路。 在一个示例中，封装具有封装衬底，附接到封装衬底的管芯，以及从封装衬底到封装的外表面的导电通孔，以在天线和封装衬底之间形成射频连接。
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