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公开(公告)号：US20140264832A1
公开(公告)日：2014-09-18
申请号：US13802848
申请日：2013-03-14
申请人： Thorsten Meyer , Hans-Joachim Barth , Reinhard Mahnkopf , Sven Albers , Andreas Augustin , Christian Mueller
发明人： Thorsten Meyer , Hans-Joachim Barth , Reinhard Mahnkopf , Sven Albers , Andreas Augustin , Christian Mueller
IPC分类号： H01L23/00
CPC分类号： H01L24/17 , H01L23/5256 , H01L23/5382 , H01L25/0657 , H01L2224/02379 , H01L2224/0401 , H01L2224/0557 , H01L2224/131 , H01L2224/16146 , H01L2224/1703 , H01L2224/17107 , H01L2224/17154 , H01L2224/17181 , H01L2224/17517 , H01L2224/81193 , H01L2924/12042 , H01L2924/014 , H01L2924/00
摘要： A chip arrangement may include: a first chip including a first contact, a second contact, and a redistribution structure electrically coupling the first contact to the second contact; a second chip including a contact; and a plurality of interconnects electrically coupled to the second contact of the first chip, wherein at least one interconnect of the plurality of interconnects electrically couples the second contact of the first chip to the contact of the second chip.
摘要翻译： 芯片布置可以包括：第一芯片，其包括第一触点，第二触点和将第一触点电耦合到第二触点的再分配结构; 包括触点的第二芯片; 以及电耦合到第一芯片的第二触点的多个互连，其中多个互连件中的至少一个互连将第一芯片的第二触点电耦合到第二芯片的触点。
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公开(公告)号：US20140252632A1
公开(公告)日：2014-09-11
申请号：US13786538
申请日：2013-03-06
申请人： Hans-Joachim Barth , Reinhard Mahnkopf , Thorsten Meyer , Sven Albers , Andreas Augustin , Christian Mueller
发明人： Hans-Joachim Barth , Reinhard Mahnkopf , Thorsten Meyer , Sven Albers , Andreas Augustin , Christian Mueller
IPC分类号： H01L23/538
CPC分类号： H01L23/5384 , H01L23/49816 , H01L23/5389 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/19 , H01L25/0657 , H01L25/18 , H01L2224/02375 , H01L2224/0239 , H01L2224/0401 , H01L2224/04105 , H01L2224/05548 , H01L2224/05569 , H01L2224/05624 , H01L2224/05647 , H01L2224/12105 , H01L2224/13025 , H01L2224/131 , H01L2224/13147 , H01L2224/16146 , H01L2224/16227 , H01L2224/1703 , H01L2224/17181 , H01L2224/2518 , H01L2224/32225 , H01L2224/73204 , H01L2224/73259 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06541 , H01L2225/06548 , H01L2924/00014 , H01L2924/1421 , H01L2924/1431 , H01L2924/1432 , H01L2924/1434 , H01L2924/1436 , H01L2924/1461 , H01L2924/15311 , H01L2924/181 , H01L2224/16225 , H01L2924/00012 , H01L2924/014 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor device includes: a semiconductor chip; an extension layer extending laterally from a boundary of the semiconductor chip; a redistribution layer disposed over at least one side of the extension layer and the semiconductor chip, wherein the redistribution layer electrically couples at least one contact of the semiconductor chip to at least one contact of an interface, wherein at least a part of the interface extends laterally beyond the boundary of the semiconductor chip.
摘要翻译： 半导体器件包括：半导体芯片; 延伸层，其从半导体芯片的边界横向延伸; 重新分配层，其设置在所述延伸层和所述半导体芯片的至少一侧上，其中所述再分配层将所述半导体芯片的至少一个触点电耦合到界面的至少一个触点，其中所述界面的至少一部分延伸 横向超出半导体芯片的边界。
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公开(公告)号：US20150084165A1
公开(公告)日：2015-03-26
申请号：US14034854
申请日：2013-09-24
申请人： Reinhard Mahnkopf , Wolfgang Molzer , Bernd Memmler , Edmund Goetz , Hans-Joachim Barth , Sven Albers , Thorsten Meyer
发明人： Reinhard Mahnkopf , Wolfgang Molzer , Bernd Memmler , Edmund Goetz , Hans-Joachim Barth , Sven Albers , Thorsten Meyer
IPC分类号： H01L23/538 , H01L21/768 , H01L23/00 , H01L25/00 , H01L21/56 , H01L23/522 , H01L25/07
CPC分类号： H01L23/5389 , H01L21/56 , H01L21/563 , H01L21/76898 , H01L23/3121 , H01L23/5226 , H01L23/5384 , H01L23/562 , H01L24/03 , H01L24/81 , H01L25/0657 , H01L25/074 , H01L25/50 , H01L2224/08146 , H01L2224/16148 , H01L2224/73204 , H01L2225/06513 , H01L2225/06541 , H01L2225/06544 , H01L2225/06548 , H01L2225/06568 , H01L2924/181 , H01L2924/00012
摘要： Embodiments of the present description include stacked microelectronic dice embedded in a microelectronic substrate and methods of fabricating the same. In one embodiment, at least one first microelectronic die is attached to a second microelectronic die, wherein an underfill material is provided between the second microelectronic die and the at least one first microelectronic die. The microelectronic substrate is then formed by laminating the first microelectronic die and the second microelectronic die in a substrate material.
摘要翻译： 本说明书的实施例包括嵌入在微电子衬底中的堆叠微电子骰子及其制造方法。 在一个实施例中，至少一个第一微电子管芯连接到第二微电子管芯，其中在第二微电子管芯和至少一个第一微电子管芯之间提供底部填充材料。 然后通过将第一微电子管芯和第二微电子管芯层压在衬底材料中来形成微电子衬底。
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公开(公告)号：US20150282367A1
公开(公告)日：2015-10-01
申请号：US14227977
申请日：2014-03-27
CPC分类号： H05K7/02 , H01L23/3128 , H01L24/19 , H01L25/03 , H01L25/0657 , H01L25/105 , H01L25/16 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/16227 , H01L2224/24145 , H01L2224/32145 , H01L2224/73267 , H01L2224/92244 , H01L2225/06517 , H01L2225/06524 , H01L2225/06558 , H01L2924/15311 , H05K3/36 , H05K7/023 , H05K13/00 , H05K2203/06 , Y10T156/10
摘要： An electronic assembly that includes a first electronic component that includes a first substrate having a front side and a back side and at least one electronic assembly mounted on the front side of the first substrate, a second electronic component that includes a second substrate having a front side and a back side and at least one electronic assembly mounted on the front side of the second substrate, and wherein the back side of the first substrate is directly attached to the back side of the second substrate.
摘要翻译： 一种电子组件，其包括第一电子部件，所述第一电子部件包括具有前侧和后侧的第一基板和安装在所述第一基板的前侧上的至少一个电子组件，所述第二电子部件包括具有前部的第二基板 侧面和背面以及安装在第二基板的前侧上的至少一个电子组件，并且其中第一基板的背面直接附接到第二基板的背面。
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公开(公告)号：US20150084202A1
公开(公告)日：2015-03-26
申请号：US14038248
申请日：2013-09-26
申请人： Georg Seidemann , Sven Albers , Teodora Ossiander , Michael Skinner , Hans-Joachim Barth , Harald Gossner , Reinhard Mahnkoph , Christian Mueller , Wolfgang Molzer
发明人： Georg Seidemann , Sven Albers , Teodora Ossiander , Michael Skinner , Hans-Joachim Barth , Harald Gossner , Reinhard Mahnkoph , Christian Mueller , Wolfgang Molzer
IPC分类号： H01L23/00 , H01L25/00 , H01L25/065
CPC分类号： H01L24/09 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/08 , H01L24/13 , H01L24/16 , H01L24/48 , H01L24/80 , H01L24/81 , H01L25/0655 , H01L25/50 , H01L2224/03444 , H01L2224/0346 , H01L2224/03602 , H01L2224/0401 , H01L2224/04042 , H01L2224/05009 , H01L2224/05013 , H01L2224/05014 , H01L2224/05015 , H01L2224/05016 , H01L2224/05553 , H01L2224/05556 , H01L2224/05571 , H01L2224/05573 , H01L2224/0558 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/06135 , H01L2224/06155 , H01L2224/06183 , H01L2224/08054 , H01L2224/08056 , H01L2224/08057 , H01L2224/08121 , H01L2224/08137 , H01L2224/08225 , H01L2224/09135 , H01L2224/09183 , H01L2224/1134 , H01L2224/131 , H01L2224/16137 , H01L2224/48137 , H01L2224/80201 , H01L2224/80895 , H01L2224/81203 , H01L2224/94 , H01L2924/00014 , H01L2924/1434 , H01L2224/03 , H01L2924/014 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An apparatus comprises a first integrated circuit (IC) die that includes a top layer, a bottom surface, a sidewall surface extending from a top surface of the top layer to the bottom surface, and at least one multi-surface contact pad, a second IC die including a top layer, a bottom surface, a sidewall surface extending from a top surface of the top layer to the bottom surface, and at least one multi-surface contact pad, wherein the second IC die is arranged adjacent to the first IC die, and includes an electrically conductive bond in contact with at least one of the top surface or the side surface of the multi-surface contact pad of the first IC die and the top surface of the multi-surface contact pad of the second IC die.
摘要翻译： 一种装置包括第一集成电路（IC）芯片，其包括顶层，底表面，从顶层的顶表面延伸到底表面的侧壁表面，以及至少一个多表面接触垫，第二 IC芯片包括顶层，底面，从顶层的顶表面延伸到底表面的侧壁表面，以及至少一个多表面接触焊盘，其中第二IC管芯被布置为与第一IC 并且包括与第一IC管芯的多表面接触焊盘的顶表面或侧表面中的至少一个与第二IC管芯的多表面接触焊盘的顶表面接触的导电接合 。
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公开(公告)号：US20150235920A1
公开(公告)日：2015-08-20
申请号：US14181325
申请日：2014-02-14
IPC分类号： H01L23/467 , H01L23/473
CPC分类号： H01L23/467 , H01L23/473 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/1703 , H01L2224/17181 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2225/06589 , H01L2225/1035 , H01L2225/1058 , H01L2225/1094 , H01L2924/15311 , H01L2924/00
摘要： Embodiments of flow diversion devices (FDDs) are disclosed herein. An FDD may include a body formed of a body material and a plurality of thermally deformable fins arranged along the body. Individual fins of the plurality of fins may include first and second materials having different coefficients of thermal expansion (CTEs). Other embodiments may be disclosed and/or claimed.
摘要翻译： 流分流装置（FDD）的实施例在此公开。 FDD可以包括由主体材料形成的主体和沿着主体布置的多个可热变形的翅片。 多个翅片中的各个翅片可以包括具有不同热膨胀系数（CTE）的第一和第二材料。 可以公开和/或要求保护其他实施例。
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公开(公告)号：US08617929B2
公开(公告)日：2013-12-31
申请号：US13456331
申请日：2012-04-26
IPC分类号： H01L21/00
CPC分类号： H01L23/5225 , H01L21/568 , H01L21/6835 , H01L21/76898 , H01L23/3114 , H01L23/481 , H01L23/552 , H01L23/585 , H01L23/66 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/20 , H01L24/96 , H01L2224/02166 , H01L2224/0231 , H01L2224/03828 , H01L2224/0401 , H01L2224/04105 , H01L2224/05548 , H01L2224/11334 , H01L2224/13021 , H01L2224/13022 , H01L2224/13024 , H01L2224/20 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01046 , H01L2924/01047 , H01L2924/01051 , H01L2924/01052 , H01L2924/01068 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19043 , H01L2924/3025 , H01L2924/00
摘要： A system on chip comprising a RF shield is disclosed. In one embodiment, the system on chip includes a RF component disposed on a chip, first redistribution lines disposed above the system on chip, the first redistribution lines coupled to I/O connection nodes. The system on chip further includes second redistribution lines disposed above the RF component, the second redistribution lines coupled to ground potential nodes. The second redistribution lines include a first set of parallel metal lines coupled together by a second set of parallel metal lines.
摘要翻译： 公开了一种包括RF屏蔽的片上系统。 在一个实施例中，片上系统包括设置在芯片上的RF组件，设置在片上系统上方的第一再分配线，第一再分配线耦合到I / O连接节点。 片上系统还包括设置在RF部件上方的第二再分配线，第二再分配线耦合到地电位节点。 第二再分配线包括由第二组平行金属线耦合在一起的第一组平行金属线。
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公开(公告)号：US20120208320A1
公开(公告)日：2012-08-16
申请号：US13456331
申请日：2012-04-26
IPC分类号： H01L21/60 , H01L21/768
CPC分类号： H01L23/5225 , H01L21/568 , H01L21/6835 , H01L21/76898 , H01L23/3114 , H01L23/481 , H01L23/552 , H01L23/585 , H01L23/66 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/20 , H01L24/96 , H01L2224/02166 , H01L2224/0231 , H01L2224/03828 , H01L2224/0401 , H01L2224/04105 , H01L2224/05548 , H01L2224/11334 , H01L2224/13021 , H01L2224/13022 , H01L2224/13024 , H01L2224/20 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01046 , H01L2924/01047 , H01L2924/01051 , H01L2924/01052 , H01L2924/01068 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19043 , H01L2924/3025 , H01L2924/00
摘要： A system on chip comprising a RF shield is disclosed. In one embodiment, the system on chip includes a RF component disposed on a chip, first redistribution lines disposed above the system on chip, the first redistribution lines coupled to I/O connection nodes. The system on chip further includes second redistribution lines disposed above the RF component, the second redistribution lines coupled to ground potential nodes. The second redistribution lines include a first set of parallel metal lines coupled together by a second set of parallel metal lines.
摘要翻译： 公开了一种包括RF屏蔽的片上系统。 在一个实施例中，片上系统包括设置在芯片上的RF组件，设置在片上系统上方的第一再分配线，第一再分配线耦合到I / O连接节点。 片上系统还包括设置在RF部件上方的第二再分配线，第二再分配线耦合到地电位节点。 第二再分配线包括由第二组平行金属线耦合在一起的第一组平行金属线。
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公开(公告)号：US08178953B2
公开(公告)日：2012-05-15
申请号：US12242688
申请日：2008-09-30
IPC分类号： H01L23/552
CPC分类号： H01L23/5225 , H01L21/568 , H01L21/6835 , H01L21/76898 , H01L23/3114 , H01L23/481 , H01L23/552 , H01L23/585 , H01L23/66 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/20 , H01L24/96 , H01L2224/02166 , H01L2224/0231 , H01L2224/03828 , H01L2224/0401 , H01L2224/04105 , H01L2224/05548 , H01L2224/11334 , H01L2224/13021 , H01L2224/13022 , H01L2224/13024 , H01L2224/20 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01046 , H01L2924/01047 , H01L2924/01051 , H01L2924/01052 , H01L2924/01068 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19043 , H01L2924/3025 , H01L2924/00
摘要： A system on chip comprising a RF shield is disclosed. In one embodiment, the system on chip includes a RF component disposed on a chip, first redistribution lines disposed above the system on chip, the first redistribution lines coupled to I/O connection nodes. The system on chip further includes second redistribution lines disposed above the RF component, the second redistribution lines coupled to ground potential nodes. The second redistribution lines include a first set of parallel metal lines coupled together by a second set of parallel metal lines.
摘要翻译： 公开了一种包括RF屏蔽的片上系统。 在一个实施例中，片上系统包括设置在芯片上的RF组件，设置在片上系统上方的第一再分配线，第一再分配线耦合到I / O连接节点。 片上系统还包括设置在RF部件上方的第二再分配线，第二再分配线耦合到地电位节点。 第二再分配线包括由第二组平行金属线耦合在一起的第一组平行金属线。
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公开(公告)号：US08063469B2
公开(公告)日：2011-11-22
申请号：US12242556
申请日：2008-09-30
IPC分类号： H01L23/552 , H01L21/44
CPC分类号： H01L23/5225 , H01L23/481 , H01L23/552 , H01L23/585 , H01L23/66 , H01L2224/13099 , H01L2924/00014
摘要： Structure and method for fabricating a system on chip with an on-chip RF shield including interconnect metallization is described. In one embodiment, the system on chip includes an RF circuitry disposed on a first portion of a top surface of a substrate, and a semiconductor circuitry disposed on a second portion of the top surface of the substrate. An interconnect RF barrier is disposed between the RF circuitry and the semiconductor circuitry, the interconnect RF barrier coupled to a ground potential node.
摘要翻译： 描述了使用包括互连金属化的片上RF屏蔽来制造片上系统的结构和方法。 在一个实施例中，片上系统包括设置在衬底的顶表面的第一部分上的RF电路和设置在衬底顶表面的第二部分上的半导体电路。 互连RF屏障设置在RF电路和半导体电路之间，互连RF屏障耦合到地电势节点。
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