Patent search ap:("RENESAS ELECTRONICS CORPORATION") AND inv:"Tomoaki UNO" Page 1

1.

发明申请
SEMICONDUCTOR DEVICE AND A MANUFACTURING METHOD OF THE SAME 有权
Title translation: 半导体器件及其制造方法

公开(公告)号：US20170005089A1

公开(公告)日：2017-01-05

申请号：US15265940

申请日：2016-09-15

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Masaki SHIRAISHI , Tomoaki UNO , Nobuyoshi MATSUURA

IPC: H01L27/06 , H01L21/8234 , H01L21/28 , H02M3/155 , H01L29/49 , H01L29/423 , H02M7/00 , H01L29/66 , H01L29/45

CPC classification number: H01L27/0629 , H01L21/28035 , H01L21/823475 , H01L23/3107 , H01L23/49524 , H01L23/49562 , H01L23/49575 , H01L24/06 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L29/1095 , H01L29/41741 , H01L29/4232 , H01L29/4236 , H01L29/4238 , H01L29/45 , H01L29/456 , H01L29/4916 , H01L29/66143 , H01L29/66734 , H01L29/7806 , H01L29/7813 , H01L29/872 , H01L2224/0401 , H01L2224/04042 , H01L2224/05554 , H01L2224/05624 , H01L2224/371 , H01L2224/37124 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/40247 , H01L2224/45015 , H01L2224/45144 , H01L2224/48011 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/48253 , H01L2224/48624 , H01L2224/4903 , H01L2224/49051 , H01L2224/49111 , H01L2224/49171 , H01L2224/49175 , H01L2224/73221 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/00 , H01L2924/00012 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01021 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01057 , H01L2924/01072 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12032 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1532 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20753 , H01L2924/20755 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H02M3/155 , H02M7/003

Abstract: In a non-insulated DC-DC converter having a circuit in which a power MOS•FET high-side switch and a power MOS•FET low-side switch are connected in series, the power MOS•FET low-side switch and a Schottky barrier diode to be connected in parallel with the power MOS•FET low-side switch are formed within one semiconductor chip. The formation region SDR of the Schottky barrier diode is disposed in the center in the shorter direction of the semiconductor chip, and on both sides thereof, the formation regions of the power MOS•FET low-side switch are disposed. From the gate finger in the vicinity of both long sides on the main surface of the semiconductor chip toward the formation region SDR of the Schottky barrier diode, a plurality of gate fingers are disposed so as to interpose the formation region SDR between them.

Abstract translation: 在具有功率MOS·FET高侧开关和功率MOS·FET低侧开关串联的电路的非绝缘DC-DC转换器中，功率MOS·FET低侧开关和肖特基与功率MOS·FET低侧开关并联连接的二极管形成在一个半导体芯片内。肖特基势垒二极管的形成区域SDR设置在半导体芯片的较短方向的中央，并且在其两侧设置功率MOS·FET低侧开关的形成区域。从半导体芯片的主表面的两长边附近的栅极指向肖特基势垒二极管的形成区域SDR，设置多个栅极指，以便在它们之间插入形成区域SDR。

2.

发明申请
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开

公开(公告)号：US20160049315A1

公开(公告)日：2016-02-18

申请号：US14924113

申请日：2015-10-27

Applicant: Renesas Electronics Corporation

Inventor： Tomoaki UNO , Tetsuya KAWASHIMA

IPC: H01L21/50

CPC classification number: H01L21/50 , H01L21/823475 , H01L23/34 , H01L24/34 , H01L24/37 , H01L24/40 , H01L27/088 , H01L2224/371 , H01L2224/40095 , H01L2224/40245 , H01L2224/40247 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/73221 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01015 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/30107 , H01L2924/00014 , H01L2924/00 , H01L2924/00012

Abstract: A conventional semiconductor device used for a power supply circuit such as a DC/DC converter has problems of heat dissipation and downsizing, in particular has the problems of heat dissipation and others in the event of downsizing. A semiconductor device has a structure formed by covering a principal surface of a semiconductor chip having the principal surface and a plurality of MIS type FETs formed over the principal surface with a plurality of metal plate wires having pectinate shapes; allocating the pectinate parts alternately in a planar view over the principal surface; and further electrically coupling the plural metal plate wires to a plurality of terminals.

3.

发明申请
SEMICONDUCTOR DEVICE AND A MANUFACTURING METHOD OF THE SAME 有权
Title translation: 半导体器件及其制造方法

公开(公告)号：US20140332878A1

公开(公告)日：2014-11-13

申请号：US14340198

申请日：2014-07-24

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Masaki SHIRAISHI , Tomoaki UNO , Nobuyoshi MATSUURA

IPC: H01L29/78 , H02M7/00 , H01L23/495

CPC classification number: H01L27/0629 , H01L21/28035 , H01L21/823475 , H01L23/3107 , H01L23/49524 , H01L23/49562 , H01L23/49575 , H01L24/06 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L29/1095 , H01L29/41741 , H01L29/4232 , H01L29/4236 , H01L29/4238 , H01L29/45 , H01L29/456 , H01L29/4916 , H01L29/66143 , H01L29/66734 , H01L29/7806 , H01L29/7813 , H01L29/872 , H01L2224/0401 , H01L2224/04042 , H01L2224/05554 , H01L2224/05624 , H01L2224/371 , H01L2224/37124 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/40247 , H01L2224/45015 , H01L2224/45144 , H01L2224/48011 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/48253 , H01L2224/48624 , H01L2224/4903 , H01L2224/49051 , H01L2224/49111 , H01L2224/49171 , H01L2224/49175 , H01L2224/73221 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/00 , H01L2924/00012 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01021 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01057 , H01L2924/01072 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12032 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1532 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20753 , H01L2924/20755 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H02M3/155 , H02M7/003

Abstract: In a non-insulated DC-DC converter having a circuit in which a power MOS•FET high-side switch and a power MOS•FET low-side switch are connected in series, the power MOS•FET low-side switch and a Schottky barrier diode to be connected in parallel with the power MOS•FET low-side switch are formed within one semiconductor chip. The formation region SDR of the Schottky barrier diode is disposed in the center in the shorter direction of the semiconductor chip, and on both sides thereof, the formation regions of the power MOS•FET low-side switch are disposed. From the gate finger in the vicinity of both long sides on the main surface of the semiconductor chip toward the formation region SDR of the Schottky barrier diode, a plurality of gate fingers are disposed so as to interpose the formation region SDR between them.

Abstract translation: 在具有功率MOS·FET高侧开关和功率MOS·FET低侧开关串联的电路的非绝缘DC-DC转换器中，功率MOS·FET低侧开关和肖特基与功率MOS·FET低侧开关并联连接的二极管形成在一个半导体芯片内。肖特基势垒二极管的形成区域SDR设置在半导体芯片的较短方向的中央，并且在其两侧设置功率MOS·FET低侧开关的形成区域。从半导体芯片的主表面的两长边附近的栅极指向肖特基势垒二极管的形成区域SDR，设置多个栅极指，以便在它们之间插入形成区域SDR。

4.

发明申请
POWER SUPPLY DEVICE 审中-公开
Title translation: 电源设备

公开(公告)号：US20140173302A1

公开(公告)日：2014-06-19

申请号：US14187502

申请日：2014-02-24

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Ryotaro KUDO , Tomoaki UNO , Koji TATENO , Hideo ISHII , Kazuyuki UMEZU , Koji SAIKUSA

IPC: H02M3/158 , G06F1/26

CPC classification number: H02M3/158 , G06F1/26 , H02M3/1584 , H02M2003/1586

Abstract: Miniaturization of a multiphase type power supply device can be achieved. A power supply control unit in which, for example, a microcontroller unit, a memory unit and an analog controller unit are formed over a single chip, a plurality of PWM-equipped drive units, and a plurality of inductors configure a multiphase power supply. The microcontroller unit outputs clock signals each having a frequency and a phase defined based on a program on the memory unit to the respective PWM-equipped drive units. The analog controller unit detects a difference between a voltage value of a load and a target voltage value acquired via a serial interface and outputs an error amp signal therefrom. Each of the PWM-equipped drive units drives each inductor by a peak current control system using the clock signal and the error amp signal.

Abstract translation: 可以实现多相电源装置的小型化。电源控制单元，其中例如在单个芯片上形成微控制器单元，存储单元和模拟控制器单元，多个配备PWM的驱动单元和多个电感器构成多相电源。微控制器单元输出每个具有基于存储器单元上的程序定义的频率和相位到相应的配备有PWM的驱动单元的时钟信号。模拟控制器单元检测负载的电压值与通过串行接口获取的目标电压值之间的差值，并输出误差放大器信号。每个配备PWM的驱动单元通过使用时钟信号和误差放大器信号的峰值电流控制系统驱动每个电感器。

5.

发明申请
Semiconductor Device 有权
Title translation: 半导体器件

公开(公告)号：US20140003002A1

公开(公告)日：2014-01-02

申请号：US14014286

申请日：2013-08-29

Applicant: Renesas Electronics Corporation

Inventor： Yukihiro SATOU , Tomoaki UNO , Nobuyoshi MATSUURA , Masaki SHIRAISHI

IPC: H05K7/02

CPC classification number: H01L23/5386 , H01L23/49575 , H01L23/50 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/85 , H01L25/165 , H01L29/4175 , H01L2224/05554 , H01L2224/0603 , H01L2224/29339 , H01L2224/45015 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/4903 , H01L2224/49051 , H01L2224/49111 , H01L2224/49171 , H01L2224/49175 , H01L2224/4943 , H01L2224/83855 , H01L2224/85 , H01L2224/85203 , H01L2224/85205 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/0102 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/20753 , H01L2924/20755 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H02M3/1588 , H05K7/02 , Y02B70/1466 , H01L2924/00014 , H01L2924/00 , H01L2924/00012 , H01L2924/2075 , H01L2924/20754

Abstract: The present invention provides a non-insulated type DC-DC converter having a circuit in which a power MOS•FET for a high side switch and a power MOS•FET for a low side switch are connected in series. In the non-insulated type DC-DC converter, the power transistor for the high side switch, the power transistor for the low side switch, and driver circuits that drive these are respectively constituted by different semiconductor chips. The three semiconductor chips are accommodated in one package, and the semiconductor chip including the power transistor for the high side switch, and the semiconductor chip including the driver circuits are disposed so as to approach each other.

Abstract translation: 本发明提供一种具有电路的非绝缘型DC-DC转换器，其中用于高侧开关的功率MOS.FET和用于低侧开关的功率MOS.FET串联连接。在非绝缘型DC-DC转换器中，用于高侧开关的功率晶体管，低边开关的功率晶体管和驱动它们的驱动电路分别由不同的半导体芯片构成。三个半导体芯片被容纳在一个封装中，并且包括用于高侧开关的功率晶体管的半导体芯片和包括驱动电路的半导体芯片被布置成彼此接近。

6.

发明公开
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 审中-公开

公开(公告)号：US20230275132A1

公开(公告)日：2023-08-31

申请号：US18062827

申请日：2022-12-07

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Toshiaki IGARASHI , Sho NAKANISHI , Tomoaki UNO , Koshiro YANAI , Masanari MURAYAMA

IPC: H01L29/40 , H01L29/06 , H01L29/739 , H01L29/66

CPC classification number: H01L29/404 , H01L29/0623 , H01L29/7397 , H01L29/401 , H01L29/66348

Abstract: An insulating film is formed on a main surface of a semiconductor substrate constituting a semiconductor device so as to cover a field plate portion, a metal pattern thicker than the field plate portion is formed on the insulating film, and a protective film is formed on the insulating film so as to cover the metal pattern. The field plate portion is made of polycrystalline silicon, and the insulating film is composed of a stacked film of one or more silicon nitride films and one or more silicon oxide films.

7.

发明申请
SEMICONDUCTOR DEVICE 审中-公开

公开(公告)号：US20180294220A1

公开(公告)日：2018-10-11

申请号：US16005022

申请日：2018-06-11

Applicant: Renesas Electronics Corporation

Inventor： Koujirou MATSUI , Takehiko SAKAMOTO , Kazuyuki UMEZU , Tomoaki UNO

IPC: H01L23/528 , H01L29/06 , H01L29/78 , H01L29/40 , H01L23/482 , H03K17/687 , H01L27/088 , H01L23/532

CPC classification number: H01L23/528 , H01L23/4824 , H01L23/53214 , H01L23/53228 , H01L27/088 , H01L29/0696 , H01L29/404 , H01L29/7835 , H01L2224/16225 , H01L2924/13091 , H01L2924/19105 , H03K17/687 , H01L2924/00

Abstract: A plurality of unit MISFET elements connected in parallel with each other to make up a power MISFET are formed in an LDMOSFET forming region on a main surface of a semiconductor substrate. A control circuit that controls a gate voltage of the power MISFET is formed in a driver circuit region on the main surface of the semiconductor substrate. A wiring structure having a plurality of wiring layers made of the same metal material is formed on the semiconductor substrate. The gate electrodes of the plurality of unit MISFET elements formed in the LDMOSFET forming region are electrically connected to each other via gate wirings formed in all of the plurality of wiring layers made of the same metal material.