公开(公告)号：US07732331B2

公开(公告)日：2010-06-08

申请号：US10998229

申请日：2004-11-16

Applicant: Ki-Bum Kim ,  Pekka J. Soininen ,  Ivo Raaijmakers

Inventor： Ki-Bum Kim ,  Pekka J. Soininen ,  Ivo Raaijmakers

IPC: H01L21/44 ,  H01L21/00 ,  H01L23/48 ,  H01L23/52

CPC classification number: H01L21/76846 ,  H01L21/28562 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76858 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention provides a method of fabricating a semiconductor device, which could advance the commercialization of semiconductor devices with a copper interconnect. In a process of metal interconnect line fabrication, a TiN thin film combined with an Al intermediate layer is used as a diffusion barrier on trench or via walls. For the formation, Al is deposited on the TiN thin film followed by copper filling the trench. Al diffuses to TiN layer and reacts with oxygen or nitrogen, which will stuff grain boundaries efficiently, thereby blocking the diffusion of copper successfully.

Abstract translation: 本发明提供一种制造半导体器件的方法，其可以通过铜互连促进半导体器件的商业化。 在金属互连线制造的过程中，与Al中间层结合的TiN薄膜用作沟槽或通孔壁上的扩散阻挡层。 为了形成，Al沉积在TiN薄膜上，随后铜填充沟槽。 Al扩散到TiN层并与氧或氮反应，这将有效地吸收晶界，从而阻止铜的扩散。

公开(公告)号：US20100009080A1

公开(公告)日：2010-01-14

申请号：US12498885

申请日：2009-07-07

Applicant: Gert Jan Snijders ,  Ivo Raaijmakers

Inventor： Gert Jan Snijders ,  Ivo Raaijmakers

IPC: C23C16/00 ,  C23C16/54

CPC classification number: C23C16/4481

Abstract: Methods and systems for depositing a film on a substrate are disclosed. In one embodiment, a method includes converting a non-gaseous precursor into vapor phase. Converting the precursor includes: forming a fluidized bed by flowing gas at a sufficiently high flow rate to suspend and stir a plurality of solid particles, and converting the phase of the non-gaseous precursor into vapor phase in the fluidized bed. The method also includes transferring the precursor in vapor phase through a passage; and performing deposition on one or more substrates with the transferred precursor in vapor phase.

Abstract translation: 公开了在衬底上沉积膜的方法和系统。 在一个实施方案中，一种方法包括将非气态前体转化成气相。 转化前体包括：通过以足够高的流速流动气体来形成流化床以悬浮和搅拌多个固体颗粒，并将非气态前体的相转化为流化床中的气相。 该方法还包括将气相中的前体转移通过通道; 并且在一个或多个基底上进行沉积，转移的前体在气相中。

公开(公告)号：US07276774B2

公开(公告)日：2007-10-02

申请号：US10867826

申请日：2004-06-14

Applicant: Ivo Raaijmakers ,  Pekka T. Soininen ,  Ernst H. A. Granneman

Inventor： Ivo Raaijmakers ,  Pekka T. Soininen ,  Ernst H. A. Granneman

IPC: H01L21/762

CPC classification number: H01L21/02164 ,  H01L21/02145 ,  H01L21/02178 ,  H01L21/02216 ,  H01L21/0228 ,  H01L21/3141 ,  H01L21/3144 ,  H01L21/3145 ,  H01L21/31612 ,  H01L21/3162 ,  H01L21/76224

Abstract: A dielectric film is formed by atomic layer deposition to conformally fill a narrow, deep trench for device isolation. The method of the illustrated embodiments includes alternately pulsing vapor-phase reactants in a string of cycles, where each cycle deposits no more than about a monolayer of material, capable of completely filling high aspect ratio trenches. Additionally, the trench-fill material composition can be tailored by processes described herein, particularly to match the coefficient of thermal expansion (CTE) to that of the surrounding substrate within which the trench is formed. Mixed phases of mullite and silica have been found to meet the goals of device isolation and matched CTE. The described process includes mixing atomic layer deposition cycles of aluminum oxide and silicon oxide in ratios selected to achieve the desired composition of the isolation material, namely on the order of 30% alumina and 70% silicon oxide by weight.

Abstract translation: 通过原子层沉积形成电介质膜，以保形地填充狭窄的深沟槽，用于器件隔离。 所示实施方案的方法包括交替地以一系列循环脉冲气相反应物，其中每个循环不超过约单层材料，能够完全填充高纵横比沟槽。 此外，沟槽填充材料组合物可以通过本文所述的方法来定制，特别是使热膨胀系数（CTE）与其中形成沟槽的周围基底的热膨胀系数相匹配。 已经发现莫来石和二氧化硅的混合相达到器件隔离和匹配CTE的目标。 所描述的方法包括以选择的比例混合氧化铝和氧化硅的原子层沉积循环，以达到分离材料的所需组成，即按重量计30％氧化铝和70％氧化硅。

公开(公告)号：US07248931B2

公开(公告)日：2007-07-24

申请号：US10892697

申请日：2004-07-15

Applicant: Ivo Raaijmakers

Inventor： Ivo Raaijmakers

IPC: G05B19/18 ,  G03B27/42

CPC classification number: H01L21/681

Abstract: A method and apparatus is provided for determining substrate drift from its nominal or intended position. The apparatus includes at least two fixed reference points. The reference points can be fixed with respect to the processing tool, or with respect to the end effector. As a robotic arm moves the end effector and substrate along a path, a camera captures images of the edge of the substrate and the reference points. Two or more cameras can also be provided. A computer can then calculate positional drift of the substrate, relative to its expected or centered position on the end effector, based upon these readings, and this drift can be corrected in subsequent robotic arm movement.

Abstract translation: 提供了一种用于从其标称位置或预期位置确定衬底漂移的方法和装置。 该装置包括至少两个固定参考点。 参考点可以相对于加工工具固定，或相对于末端执行器固定。 当机器人手臂沿着路径移动末端执行器和基板时，相机捕获基板边缘和参考点的图像。 还可以提供两个或更多的相机。 计算机然后可以基于这些读数来计算衬底相对于末端执行器上的预期或居中位置的位置偏移，并且可以在随后的机器人手臂运动中校正该漂移。

公开(公告)号：US20070096321A1

公开(公告)日：2007-05-03

申请号：US11511877

申请日：2006-08-28

Applicant: Ivo Raaijmakers ,  Suvi Haukka ,  Ville Saanila ,  Pekka Soininen ,  Kai-Erik Elers ,  Ernst Granneman

Inventor： Ivo Raaijmakers ,  Suvi Haukka ,  Ville Saanila ,  Pekka Soininen ,  Kai-Erik Elers ,  Ernst Granneman

IPC: H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC classification number: C23C16/45525 ,  C23C16/0272 ,  C23C16/045 ,  C23C16/08 ,  C23C16/14 ,  C23C16/32 ,  C23C16/34 ,  C23C16/44 ,  C23C16/45534 ,  C23C16/45536 ,  C30B25/02 ,  C30B29/02 ,  C30B29/36 ,  H01L21/28562 ,  H01L21/7681 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76873 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53242 ,  H01L23/53252 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Method and structures are provided for conformal lining of dual damascene structures in integrated circuits. Trenches and contact vias are formed in insulating layers. The trenches and vias are exposed to alternating chemistries to form monolayers of a desired lining material. Exemplary process flows include alternately pulsed metal halide and ammonia gases injected into a constant carrier flow. Self-terminated metal layers are thus reacted with nitrogen. Near perfect step coverage allows minimal thickness for a diffusion barrier function, thereby maximizing the volume of a subsequent filling metal for any given trench and via dimensions.

Abstract translation: 提供了集成电路中双镶嵌结构的保形衬里的方法和结构。 沟槽和接触通孔形成在绝缘层中。 沟槽和通孔暴露于交替的化学物质以形成所需衬里材料的单层。 示例性工艺流程包括交替脉冲的金属卤化物和注入恒定载流子的氨气。 自身端接的金属层因此与氮气反应。 接近完美的台阶覆盖允许扩散阻挡功能的最小厚度，从而使任何给定沟槽和通孔尺寸的后续填充金属的体积最大化。

公开(公告)号：US07105055B2

公开(公告)日：2006-09-12

申请号：US10841369

申请日：2004-05-06

Applicant: Armand Ferro ,  Ivo Raaijmakers ,  Derrick Foster

Inventor： Armand Ferro ,  Ivo Raaijmakers ,  Derrick Foster

IPC: C30B23/00

CPC classification number: C30B29/06 ,  C23C16/4405 ,  C23C16/481 ,  C30B25/02 ,  C30B25/105 ,  C30B25/14 ,  C30B33/005 ,  C30B33/02 ,  C30B33/12 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02301 ,  H01L21/02332 ,  H01L21/02337 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02661 ,  H01L21/28017 ,  H01L21/31116 ,  H01L21/31612 ,  H01L21/31662 ,  H01L29/66651

Abstract: A single-wafer, chemical vapor deposition reactor is provided with hydrogen and silicon source gas suitable for epitaxial silicon deposition, as well as a safe mixture of oxygen in a non-reactive gas. Methods are provided for forming oxide and silicon layers within the same chamber. In particular, a sacrificial oxidation is performed, followed by a hydrogen bake to sublime the oxide and leave a clean substrate. Epitaxial deposition can follow in situ. A protective oxide can also be formed over the epitaxial layer within the same chamber, preventing contamination of the critical epitaxial layer. Alternatively, the oxide layer can serve as the gate dielectric, and a polysilicon gate layer can be formed in situ over the oxide.

公开(公告)号：US07034397B2

公开(公告)日：2006-04-25

申请号：US10696244

申请日：2003-10-28

Applicant: Ivo Raaijmakers ,  Pekka J. Soininen ,  Kai-Erik Elers

Inventor： Ivo Raaijmakers ,  Pekka J. Soininen ,  Kai-Erik Elers

IPC: H01L23/48 ,  H01L21/4763

CPC classification number: H01L21/76846 ,  C23C16/0272 ,  H01L21/28562 ,  H01L21/32051 ,  H01L21/76856 ,  H01L21/76879 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method is proposed for improving the adhesion between a diffusion barrier film and a metal film. Both the diffusion barrier film and the metal film can be deposited in either sequence onto a semiconductor substrate. A substrate comprising a first film, which is one of a diffusion barrier film or a metal film, with the first film being exposed at least at part of the surface area of the substrate, is exposed to an oxygen-containing reactant to create a surface termination of about one monolayer of oxygen-containing groups or oxygen atoms on the exposed parts of the first film. Then the second film, which is the other one of a diffusion barrier film and a metal film, is deposited onto the substrate. Furthermore, an oxygen bridge structure is proposed, the structure comprising a diffusion barrier film and a metal film having an interface with the diffusion barrier film, wherein the interface comprises a monolayer of oxygen atoms.

Abstract translation: 提出了改善扩散阻挡膜和金属膜之间的粘合性的方法。 扩散阻挡膜和金属膜都可以以任一顺序沉积到半导体衬底上。 包含第一膜，其是扩散阻挡膜或金属膜之一，其中第一膜至少部分地暴露于基底的表面区域，以暴露于含氧反应物以形成表面 在第一膜的暴露部分上终止约一个单层的含氧基团或氧原子。 然后将作为扩散阻挡膜和金属膜中的另一个的第二膜沉积在基板上。 此外，提出了氧桥结构，其结构包括扩散阻挡膜和与扩散阻挡膜具有界面的金属膜，其中界面包括单层氧原子。

公开(公告)号：US20050250302A1

公开(公告)日：2005-11-10

申请号：US11179256

申请日：2005-07-12

Applicant: Michael Todd ,  Ivo Raaijmakers

Inventor： Michael Todd ,  Ivo Raaijmakers

IPC: C23C16/24 ,  C23C16/02 ,  C23C16/42 ,  C30B25/02 ,  H01L21/20 ,  H01L21/205 ,  H01L21/28 ,  H01L21/285 ,  H01L21/316 ,  H01L21/331 ,  H01L21/337 ,  H01L21/425 ,  H01L21/469 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/51 ,  H01L29/737 ,  H01L29/78 ,  H01L31/18 ,  H01L31/20 ,  H01L21/66 ,  G01R31/26 ,  H01L21/00 ,  H01L21/44 ,  H01L21/84

CPC classification number: C23C16/0272 ,  B82Y10/00 ,  B82Y30/00 ,  C23C16/22 ,  C23C16/24 ,  C23C16/30 ,  C23C16/308 ,  C23C16/325 ,  C23C16/345 ,  C23C16/36 ,  C23C16/56 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02422 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/02598 ,  H01L21/0262 ,  H01L21/02667 ,  H01L21/2257 ,  H01L21/28035 ,  H01L21/28044 ,  H01L21/28194 ,  H01L21/28525 ,  H01L21/28556 ,  H01L21/3185 ,  H01L21/32055 ,  H01L28/84 ,  H01L29/127 ,  H01L29/51 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66181 ,  H01L29/66242 ,  H01L31/1804 ,  H01L31/182 ,  H01L31/202 ,  Y02E10/546 ,  Y02E10/547 ,  Y02P70/521 ,  Y10S438/933

Abstract: Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 Å or less, a surface roughness of about 5 Å rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.

Abstract translation: 通过使用含硅前体的沉积方法制备薄的，平滑的含硅膜。 在优选的实施方案中，该方法产生连续的并且具有约150或更小的厚度，约5μm或更小的表面粗糙度和约20％或更小的厚度不均匀性的含Si膜。 当与其它元素掺杂或合金化时，优选的含硅膜显示出高度的组成均匀性。 优选的沉积方法提供了改进的制造效率，并且可以用于制备各种有用的结构，例如润湿层，HSG硅，量子点，电介质层，抗反射涂层（ARC），栅电极和扩散源。

公开(公告)号：US06962859B2

公开(公告)日：2005-11-08

申请号：US10074564

申请日：2002-02-11

Applicant: Michael A. Todd ,  Ivo Raaijmakers

Inventor： Michael A. Todd ,  Ivo Raaijmakers

IPC: C23C16/24 ,  C23C16/02 ,  C23C16/42 ,  C30B25/02 ,  H01L21/20 ,  H01L21/205 ,  H01L21/28 ,  H01L21/285 ,  H01L21/316 ,  H01L21/331 ,  H01L21/337 ,  H01L21/425 ,  H01L21/469 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/51 ,  H01L29/737 ,  H01L29/78 ,  H01L31/18 ,  H01L31/20

CPC classification number: C23C16/0272 ,  B82Y10/00 ,  B82Y30/00 ,  C23C16/22 ,  C23C16/24 ,  C23C16/30 ,  C23C16/308 ,  C23C16/325 ,  C23C16/345 ,  C23C16/36 ,  C23C16/56 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02422 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/02598 ,  H01L21/0262 ,  H01L21/02667 ,  H01L21/2257 ,  H01L21/28035 ,  H01L21/28044 ,  H01L21/28194 ,  H01L21/28525 ,  H01L21/28556 ,  H01L21/3185 ,  H01L21/32055 ,  H01L28/84 ,  H01L29/127 ,  H01L29/51 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66181 ,  H01L29/66242 ,  H01L31/1804 ,  H01L31/182 ,  H01L31/202 ,  Y02E10/546 ,  Y02E10/547 ,  Y02P70/521 ,  Y10S438/933

Abstract: Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon-containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 Å or less, a surface roughness of about 5 Å rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.

Abstract translation: 通过使用含硅前体的沉积方法制备薄且平滑的含硅膜。 在优选的实施方案中，该方法产生连续的并且具有约150或更小的厚度，约5μm或更小的表面粗糙度和约20％或更小的厚度不均匀性的含Si膜。 当与其它元素掺杂或合金化时，优选的含硅膜显示出高度的组成均匀性。 优选的沉积方法提供了改进的制造效率，并且可以用于制备各种有用的结构，例如润湿层，HSG硅，量子点，电介质层，抗反射涂层（ARC），栅电极和扩散源。

公开(公告)号：US20050229855A1

公开(公告)日：2005-10-20

申请号：US11143335

申请日：2005-06-01

Applicant: Ivo Raaijmakers

Inventor： Ivo Raaijmakers

IPC: C23C16/44 ,  C23C16/54 ,  C23C16/56 ,  C30B25/10 ,  H01L21/00 ,  H01L21/205 ,  C23C16/00

CPC classification number: H01L21/67109 ,  C23C16/54 ,  C23C16/56 ,  C30B25/10

Abstract: Methods and apparatuses are provided for cooling semiconductor substrates prior to handling. In one embodiment, a substrate and support structure combination is lifted after high temperature processing to a cold wall of a thermal processing chamber, which acts as a heat sink. Conductive heat transfer across a small gap from the substrate to the heat sink speeds wafer cooling prior to handling the wafer (e.g., with a robot). In another embodiment, a separate plate is kept cool within a pocket during processing, and is moved close to the substrate and support after processing. In yet another embodiment, a cooling station between a processing chamber and a storage cassette includes two movable cold plates, which are movable to positions closely spaced on either side of the wafer.