公开(公告)号：US5421943A

公开(公告)日：1995-06-06

申请号：US149163

申请日：1993-11-08

Applicant: Andrew C. Tam ,  Celia E. Yeack-Scranton

Inventor： Andrew C. Tam ,  Celia E. Yeack-Scranton

IPC: G11B5/31 ,  B23K20/02 ,  H05K1/02 ,  H05K1/16 ,  H05K3/30 ,  H05K3/32 ,  H05K3/34 ,  B32B31/00

CPC classification number: B23K20/023 ,  B32B37/06 ,  H05K1/0212 ,  H05K1/167 ,  H05K2201/09263 ,  H05K2201/09772 ,  H05K2203/1115 ,  H05K3/305 ,  H05K3/328 ,  H05K3/3494 ,  Y10T156/1105

Abstract: Controlled current pulses applied to a shaped resistive heating element formed on the bonding surface of a base or substrate component provide sufficient heat to the bonding interface formed between a chip and the base bonding surface to produce a high bonding temperature at the bonding interface while maintaining an opposite surface of the chip at or below a relatively low temperature critical for components formed or mounted on the chip surface. A layer of a thermally setting thin-film bonding agent is applied over a serpentine-shaped resistive heating element having a relatively narrow linewidth formed on the base component bonding surface. The chip to be bonded is retained in a desired position against the bonding surface over the heating element and bonding agent layer while a current pulse is applied to the heating element via contact pads. The current pulse magnitude and duration are controlled to produce sufficient local heating at the bonding interface to effect the desired bonding without excessive heating of any critical components at some predetermined distance from the bonding site.

Abstract translation: 施加到形成在基底或基底部件的接合表面上的成形电阻加热元件的受控电流脉冲为形成在芯片和基底接合表面之间的接合界面提供足够的热量，以在接合界面处产生高的接合温度，同时保持 芯片的相对表面处于或低于对形成或安装在芯片表面上的部件关键的相对低的温度。 将一层热定型薄膜粘合剂施加在形成在基底部件接合表面上的相对较窄线宽的蛇形电阻加热元件上。 待接合的芯片通过接触焊盘将电流脉冲施加到加热元件上时，保持在加热元件和接合剂层上的接合表面所需的位置。 控制当前脉冲幅度和持续时间以在接合界面处产生足够的局部加热以实现期望的接合，而不会在距离接合位置一定预定距离的任何关键部件过度加热。

公开(公告)号：US4774634A

公开(公告)日：1988-09-27

申请号：US820239

申请日：1986-01-21

Applicant: Howard L. Tate ,  Gary L. Romeike ,  Vinai M. Tara ,  James L. Vocture

Inventor： Howard L. Tate ,  Gary L. Romeike ,  Vinai M. Tara ,  James L. Vocture

IPC: H05K1/02 ,  H05K1/09 ,  H05K1/18 ,  H05K3/28 ,  H05K3/30 ,  H05K3/32 ,  H05K3/46

CPC classification number: H05K3/305 ,  H05K1/0263 ,  H05K3/321 ,  H05K1/095 ,  H05K1/181 ,  H05K1/189 ,  H05K2201/09472 ,  H05K2201/09772 ,  H05K2201/10272 ,  H05K2201/1028 ,  H05K2201/10515 ,  H05K2201/10651 ,  H05K2201/10689 ,  H05K2203/1453 ,  H05K3/28 ,  H05K3/4664 ,  H05K3/4685 ,  Y02P70/613 ,  Y10T29/49128 ,  Y10T29/4913

Abstract: A printed circuit assembly includes surface mounted circuit components held in place on a printed circuit board by a rigid connection. The outwardly extending leads of the circuit component are bonded to conductive areas of the board by an electrically conducting flexible adhesive. The combination of a rigid mechanical connection between the body portion of the circuit component and the board and a flexible, electrically conductive connection between each lead end and the board provides an arrangement capable of withstanding shock loading, as well as vibrational and bending forces to which the assembly might be subjected. The assembly lends itself to relatively inexpensive circuit boards produced by printing techniques, typically including applied metal buses that serve as low resistance shunts to the power connections of the circuit components.

Abstract translation: 印刷电路组件包括通过刚性连接保持在印刷电路板上的适当位置的表面安装电路部件。 电路部件的向外延伸的引线通过导电柔性粘合剂粘合到板的导电区域。 电路部件的本体部分与电路板之间的刚性机械连接与每个引线端与电路板之间的柔性导电连接的组合提供了能够承受冲击载荷以及振动和弯曲力的装置， 装配可能会受到影响。 该组件本身适用于通过印刷技术生产的相对便宜的电路板，通常包括用作电路部件的电源连接的低电阻分流器的应用金属总线。

公开(公告)号：US4772762A

公开(公告)日：1988-09-20

申请号：US939815

申请日：1986-12-09

Applicant: Masahiro Fukino

Inventor： Masahiro Fukino

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/34 ,  H05K1/18

CPC classification number: H05K1/111 ,  H05K3/3421 ,  H05K2201/09381 ,  H05K2201/097 ,  H05K2201/09772 ,  H05K2201/10689 ,  Y02P70/611 ,  Y02P70/613

Abstract: A printed board capable of permitting the passage of at least two wiring patterns between two adjacent mounting lands on the surface of the printed board even if a clearance between the adjacent mounting lands is limited. Mounted on the printed board is an electrical component having a plurality of leads extending in a parallel relation with each other with limited clearances formed between adjacent leads. The printed board has a plurality of mounting lands to which the respective leads of the electrical component are secured as by soldering, there being a limited clearance defined between adjacent ones of the lands such that only one wiring pattern printed on the printed board can run through the clearance in the direction parallel to that in which the leads extend. The adjacent two lands have two facing parallel sides which are disposed in parallel with each other at an angle relative to the direction in which the leads extend, so that at least two wiring patterns, printed on the surface of the printed board, can run through the clearance between the facing sides of the adjacent lands in a parallel relation therewith.

Abstract translation: 即使相邻的安装台面之间的间隙受到限制，印刷电路板能够允许在印刷电路板的表面上的两个相邻的安装焊盘之间通过至少两个布线图案。 安装在印刷电路板上的是具有彼此平行关系延伸的多个引线的电气部件，并且在相邻导线之间形成有限的间隙。 印刷电路板具有多个安装平台，通过焊接固定电气部件的各个引线，在相邻的焊盘之间限定间隙，使印刷在印刷电路板上的仅一个布线图案可以穿过 在与引线延伸的方向平行的方向上的间隙。 相邻的两个平台具有相对于引线延伸的方向成一角度彼此平行设置的两个相对的平行侧，使得印刷在印刷电路板表面上的至少两个布线图案可以穿过 相邻焊盘的​​相对侧之间的间隙与其平行关系。

公开(公告)号：US09713267B2

公开(公告)日：2017-07-18

申请号：US14674301

申请日：2015-03-31

Applicant: IBIDEN CO., LTD.

Inventor： Toru Furuta ,  Takeshi Furusawa ,  Tomoya Terakura

IPC: H05K1/11 ,  H05K3/40 ,  H05K1/02 ,  H05K3/00 ,  H05K3/28 ,  H05K3/34

CPC classification number: H05K3/4007 ,  H05K1/0271 ,  H05K1/111 ,  H05K3/0097 ,  H05K3/282 ,  H05K3/3436 ,  H05K2201/0355 ,  H05K2201/0376 ,  H05K2201/09745 ,  H05K2201/09772 ,  H05K2203/0369 ,  H05K2203/1536 ,  Y02P70/611 ,  Y10T29/49165

Abstract: A method for manufacturing a printed wiring board with conductive posts includes forming on a first foil provided on carrier a first conductive layer including mounting pattern to connect electronic component via conductive posts, forming on the first foil a laminate including an insulating layer and a second foil to form the laminate on the first conductive layer, removing the carrier, forming a metal film on the laminate and first film, forming resist on the metal film to have pattern exposing portion of the metal film corresponding to the mounting pattern and portion of the second foil for a second conductive layer, forming an electroplating layer on the portion of the metal film not covered by the resist, removing the resist, and applying etching to remove the first and second foils below the metal film exposed by the removing the resist and to form the posts on the mounting pattern.

公开(公告)号：US09698094B2

公开(公告)日：2017-07-04

申请号：US15228059

申请日：2016-08-04

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Hiroharu Yanagisawa ,  Kazuhiro Kobayashi

IPC: H01L21/56 ,  H01L23/31 ,  H01L23/498 ,  H05K1/02 ,  H01L21/48 ,  H01L23/00 ,  H05K1/11 ,  H05K1/18

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/563 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3178 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81395 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/83005 ,  H01L2224/83385 ,  H01L2224/92125 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/1816 ,  H05K1/0213 ,  H05K1/111 ,  H05K1/181 ,  H05K3/205 ,  H05K2201/0769 ,  H05K2201/09472 ,  H05K2201/09772 ,  H05K2201/098 ,  H05K2201/10674 ,  H05K2201/2072 ,  H05K2203/0278 ,  H05K2203/1105 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A wiring board includes: an insulating layer; and a wiring layer including: an upper surface; a lower surface opposite to the upper surface; and a side surface between the upper surface and the lower surface, wherein the upper surface of the wiring layer is exposed from the insulating layer, and the side surface and the lower surface of the wiring layer are embedded in the insulating layer. A recess portion is formed in an outer edge portion of the upper surface of the wiring layer, and the recess portion is filled with the insulating layer.

公开(公告)号：US20170110779A1

公开(公告)日：2017-04-20

申请号：US15394868

申请日：2016-12-30

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kunitoshi HANAOKA

IPC: H01P5/18 ,  H04B1/04 ,  H05K1/11 ,  H03H7/38 ,  H05K1/02 ,  H05K1/18

CPC classification number: H01P5/18 ,  H01P5/184 ,  H01P5/187 ,  H02M1/00 ,  H03H7/38 ,  H04B1/04 ,  H05K1/0243 ,  H05K1/115 ,  H05K1/181 ,  H05K2201/09772 ,  H05K2201/1003

Abstract: An inductor component is disposed outside a multilayer substrate, and thus a directional coupler defined by an internal wiring electrode and a coil electrode within the inductor component that is mounted on a pair of land electrodes, the multilayer substrate significantly reduces or prevents interference with other high-frequency circuit elements disposed in or on the multilayer substrate. Additionally, if a plurality of inductor components having different inductor characteristics are prepared, a high-frequency module including the multilayer substrate capable of defining the directional coupler whose characteristics are able to adjusted with ease is able to be provided simply by selecting the desired inductor component from the inductor components and replacing that inductor component.

公开(公告)号：US09131615B2

公开(公告)日：2015-09-08

申请号：US14059777

申请日：2013-10-22

Applicant: CANON KABUSHIKI KAISHA

Inventor： Hideaki Hirasawa

IPC: H05K1/11 ,  H05K1/02 ,  H05K3/34

CPC classification number: H05K1/11 ,  H05K1/0203 ,  H05K1/111 ,  H05K3/3421 ,  H05K3/3452 ,  H05K3/3468 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/0989 ,  H05K2201/10522 ,  H05K2201/10659 ,  H05K2201/10689 ,  H05K2203/046 ,  Y02P70/611

Abstract: A printed circuit board has a first solder land, a second solder land, and a signal line pattern. The first solder land is configured to be soldered with an electronic part. The second solder land is configured to accumulate solder, the second solder land being disposed on a downstream side of the first solder land as viewed in a direction in which the printed circuit is carried. The signal line pattern includes an exposed part that is not covered with a resist, the exposed part being disposed between the solder land and the solder bridge prevention land.

Abstract translation: 印刷电路板具有第一焊盘焊盘，第二焊盘焊盘和信号线图案。 第一焊盘被配置为与电子部件焊接。 第二焊盘被构造为蓄积焊料，第二焊盘位于沿着印刷电路的携带方向设置在第一焊盘的下游侧。 信号线图案包括未被抗蚀剂覆盖的暴露部分，暴露部分设置在焊接区域和防止桥接防止焊盘之间。

公开(公告)号：US08711575B2

公开(公告)日：2014-04-29

申请号：US13011980

申请日：2011-01-24

Applicant: Do-kyun Lee

Inventor： Do-kyun Lee

IPC: H05K1/11

CPC classification number: H05K3/222 ,  H05K1/113 ,  H05K1/181 ,  H05K2201/09772 ,  H05K2201/10159 ,  H05K2201/10363 ,  H05K2201/10522 ,  H05K2201/10545

Abstract: A printed circuit board unit usable with a computer device includes a main board on which a first component and a second component are mounted on an upper surface, and a routing unit mounted on at least one of the upper surface and a lower surface of the main board and including a sub-wire forming at least part of a wire to transmit a data between the first component and the second component.

Abstract translation: 可与计算机装置一起使用的印刷电路板单元包括：主板，第一部件和第二部件安装在主板上;以及布线单元，安装在主板的上表面和下表面中的至少一个上 并且包括形成至少一部分线的子线以在第一部件和第二部件之间传输数据。

公开(公告)号：US08681509B2

公开(公告)日：2014-03-25

申请号：US12544156

申请日：2009-08-19

Applicant: Hideaki Hirasawa

Inventor： Hideaki Hirasawa

IPC: H05K7/10

CPC classification number: H05K1/11 ,  H05K1/0203 ,  H05K1/111 ,  H05K3/3421 ,  H05K3/3452 ,  H05K3/3468 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/0989 ,  H05K2201/10522 ,  H05K2201/10659 ,  H05K2201/10689 ,  H05K2203/046 ,  Y02P70/611

Abstract: A printed circuit board has a first solder land, a second solder land, and a signal line pattern. The first solder land is configured to be soldered with an electronic part. The second solder land is configured to accumulate solder, the second solder land being disposed on a downstream side of the first solder land as viewed in a direction in which the printed circuit is carried. The signal line pattern includes an exposed part that is not covered with a resist, the exposed part being disposed between the solder land and the solder bridge prevention land.

Abstract translation: 印刷电路板具有第一焊盘焊盘，第二焊盘焊盘和信号线图案。 第一焊盘被配置为与电子部件焊接。 第二焊盘被构造为蓄积焊料，第二焊盘位于沿着印刷电路的携带方向设置在第一焊盘的下游侧。 信号线图案包括未被抗蚀剂覆盖的暴露部分，暴露部分设置在焊接区域和防止桥接防止焊盘之间。

公开(公告)号：US20140041920A1

公开(公告)日：2014-02-13

申请号：US14059777

申请日：2013-10-22

Applicant: Canon Kabushiki Kaisha

Inventor： Hideaki Hirasawa

IPC: H05K1/11

CPC classification number: H05K1/11 ,  H05K1/0203 ,  H05K1/111 ,  H05K3/3421 ,  H05K3/3452 ,  H05K3/3468 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/0989 ,  H05K2201/10522 ,  H05K2201/10659 ,  H05K2201/10689 ,  H05K2203/046 ,  Y02P70/611

Abstract: A printed circuit board has a first solder land, a second solder land, and a signal line pattern. The first solder land is configured to be soldered with an electronic part. The second solder land is configured to accumulate solder, the second solder land being disposed on a downstream side of the first solder land as viewed in a direction in which the printed circuit is carried. The signal line pattern includes an exposed part that is not covered with a resist, the exposed part being disposed between the solder land and the solder bridge prevention land.

Abstract translation: 印刷电路板具有第一焊盘焊盘，第二焊盘焊盘和信号线图案。 第一焊盘被配置为与电子部件焊接。 第二焊盘被构造为蓄积焊料，第二焊盘位于沿着印刷电路的携带方向设置在第一焊盘的下游侧。 信号线图案包括未被抗蚀剂覆盖的暴露部分，暴露部分设置在焊接区域和防止桥接防止焊盘之间。