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    Method of making a customizable circuitry
    13.
    发明授权
    Method of making a customizable circuitry 失效
    制作可定制电路的方法

    公开(公告)号：US5165166A

    公开(公告)日：1992-11-24

    申请号：US739344

    申请日：1991-09-09

    Applicant: David H. Carey

    Inventor： David H. Carey

    IPC: H01L23/498 ,  H01L23/538 ,  H05K1/00

    CPC classification number: H01L23/5383 ,  H01L23/4985 ,  H01L23/5382 ,  H05K1/0289 ,  H05K1/0298 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01039 ,  H01L2924/01067 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  Y10T29/49156 ,  Y10T29/49162

    Abstract: A customizable circuit using a programmable interconnect and a compatible TAB chip bonding design. The programmable interconnect comprises layers of wire segments forming programmable junctions rather than continuous wires. This segmentation is performed with an offset from line to line in each layer such that the ends of the segments in each layer form along diagonal lines having a pitch determined by the basic wire segment length. The terminal ends of each of these segments are positioned in a plane such that the segments may be connected by short lengths to form the desired interconnect. The links which join the line segments represent the customization of the otherwise undedicated interconnect. The TAB chip bonding design uses a carrier tape to bond the integrated circuit chips to the programmable interconnect. Also disclosed are methods for forming the interconnect and the TAB chip bonding design.

    Abstract translation: 使用可编程互连和兼容TAB芯片接合设计的可定制电路。 可编程互连包括形成可编程结而不是连续导线的线段层。 该分割使用每层中的线对线的偏移来执行，使得每层中的段的端部沿着具有由基本线段长度确定的间距的对角线形成。 这些段中的每一个的末端位于一个平面中，使得该段可以通过短长度连接以形成所需的互连。 连接线段的链接表示否定的未互连互连的定制。 TAB芯片接合设计使用载带将集成电路芯片连接到可编程互连。 还公开了用于形成互连和TAB芯片接合设计的方法。

    Low pressure high heat transfer fluid heat exchanger
    16.
    发明授权
    Low pressure high heat transfer fluid heat exchanger 失效
    低压高传热流体换热器

    公开(公告)号：US4953634A

    公开(公告)日：1990-09-04

    申请号：US341006

    申请日：1989-04-20

    Applicant: Richard D. Nelson ,  Dennis J. Herrell

    Inventor： Richard D. Nelson ,  Dennis J. Herrell

    IPC: F28F3/02 ,  H01L23/473

    CPC classification number: F28F3/02 ,  H01L23/473 ,  H01L2924/0002

    Abstract: A fluid heat exchanger for cooling an electronic component having a housing for receiving heat from the electronic component in which the housing has a fluid inlet and an outlet at opposite ends of the housing. The cross-sectional area of the housing for conveying fluid from the inlet to the outlet decreases from the inlet to the outlet thereby reducing pressure drop without sacrificing thermal performance. The cross-sectional area may be decreased by tilting a top of the housing relative to a bottom, or providing a plurality of fins separated by channels in which the cross-sectional area of the channels decreases from the inlet to the outlet.

    Abstract translation: 一种用于冷却电子部件的流体热交换器，所述电子部件具有用于从所述电子部件接收热量的壳体，其中所述壳体具有流体入口和在所述壳体的相对端处的出口。 用于将流体从入口输送到出口的壳体的横截面面积从入口到出口减小，从而在不牺牲热性能的情况下降低压降。 可以通过使壳体的顶部相对于底部倾斜来减小横截面面积，或者提供由通道分隔开的多个翅片，在该通道中通道的横截面积从入口到出口减小。

    Hermetically sealed multilayer electrical feedthru
    17.
    发明授权
    Hermetically sealed multilayer electrical feedthru 失效
    密封多层电气馈电

    公开(公告)号：US4922323A

    公开(公告)日：1990-05-01

    申请号：US151146

    申请日：1988-02-01

    Applicant: Curtis N. Potter

    Inventor： Curtis N. Potter

    IPC: H01L21/48

    CPC classification number: H01L21/486

    Abstract: A method for producing miniature, planar, hermetically sealed, electrical feedthrus having multiple layers of molybdenum conductors separated by aluminum which is anodized and selectively etched for providing supports for the multilayer. The exposed molybdenum is cleaned and oxidized and sealed with glass to provide a hermetic seal. Contact portions of the molybdenum are cleaned and plated whereby the contacts will accept a contact seal.

    Abstract translation: 一种用于生产具有由铝分离的多层钼导体的微型，平面，密封的电馈电的方法，其被阳极氧化并选择性地蚀刻以提供用于多层的支撑。 暴露的钼被清洁和氧化并用玻璃密封以提供密封。 钼的接触部分被清洁和镀覆，由此触点将接受接触密封。

    Thin film capacitor
    18.
    发明授权
    Thin film capacitor 失效
    薄膜电容器

    公开(公告)号：US4890192A

    公开(公告)日：1989-12-26

    申请号：US36398

    申请日：1987-04-09

    Applicant: Lawrence N. Smith

    Inventor： Lawrence N. Smith

    IPC: H01G4/33 ,  H01G4/38 ,  H01L29/92 ,  H05K1/16

    CPC classification number: H01L28/40 ,  Y10T29/435

    Abstract: A thin film capacitor having a top, middle and bottom plate forming two capacitors in series in which the middle plate is a plurality of isolated plates thereby forming a structure of a plurality of two capacitors in series which are all connected in parallel. The capacitor may be integrated into an electronic substrate. The capacitor may be formed by depositing films of the metal conductors and dielectrics and may be formed as an integral part of a semiconductor chip or interconnect substrate.

    Zero insertion force electrical connector
    19.
    发明授权
    Zero insertion force electrical connector 失效
    零插入力电连接器

    公开(公告)号：US4886461A

    公开(公告)日：1989-12-12

    申请号：US258930

    申请日：1988-10-17

    Applicant: Robert T. Smith

    Inventor： Robert T. Smith

    IPC: H01R12/85 ,  H05K3/36

    CPC classification number: H01R12/853 ,  H05K3/365

    Abstract: A zero insertion force electrical connector for electrically connecting two electrical members. A plurality of first electrical contacts on a first member engage a plurality of second electrical on a second member. An isostratic medium is retained against the second member and a pressure generator acts on the isostatic medium for providing a uniform force forcing the first and second contact into engagement. One of the first and second contacts may be positioned in recesses and the other of the first and second contacts are outwardly extending for providing self-alignment between the first and second members. The second member may be a three-layer tape having a first metal signal layer, a middle dielectric layer and a second ground layer for interconnection to a third electrical member.

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