Method of etching a semiconductor device by an ion beam
    11.
    发明授权
    Method of etching a semiconductor device by an ion beam 失效
    通过离子束蚀刻半导体器件的方法

    公开(公告)号:US5086015A

    公开(公告)日:1992-02-04

    申请号:US394364

    申请日:1989-08-15

    CPC分类号: H01L21/76802 Y10S148/046

    摘要: A method of etching a semiconductor device having multi-layered wiring by an ion beam is disclosed which method comprises the steps of: extracting a high-intensity ion beam from a high-density ion source; focusing the extracted ion beam; causing the focused ion beam to perform a scanning operation by a voltage applied to a deflection electrode; forming a first hole in the semiconductor device by the focused ion beam to a depth capable of reaching an insulating film formed between upper and lower wiring conductors so that the first hole has a curved bottom corresponding to the undulation of the upper wiring conductor, and the upper wiring conductor is absent at the bottom of the first hole; and scanning a portion of the bottom of the first hole with the focused ion beam to form a second hole in the insulating film to a depth capable of reaching the lower wiring conductor, thereby preventing the shorting between the upper and lower wiring conductors. Further, a method of forming a hole of a predetermined shape at a surface area having a step-like portion of a semiconductor device by an ion beam is disclosed which method comprises a pre-etching step of scanning the high-level region of the step-like portion with the ion beam so that the high-level region becomes equal in level to the low-level region of the step-like portion, and a main step of scanning the whole of the surface area with the ion beam till the hole of the predetermined shape is formed in the semiconductor device.

    摘要翻译: 公开了一种通过离子束蚀刻具有多层布线的半导体器件的方法,该方法包括以下步骤:从高密度离子源提取高强度离子束; 聚焦提取的离子束; 使聚焦离子束通过施加到偏转电极的电压进行扫描操作; 通过所述聚焦离子束在所述半导体器件中形成第一孔至能够到达形成在上部和下部布线导体之间的绝缘膜的深度,使得所述第一孔具有对应于所述上部布线导体的起伏的弯曲底部,并且 上部布线导体在第一个孔的底部不存在; 并用聚焦离子束扫描第一孔的底部的一部分,以在绝缘膜中形成能够到达下布线导体的深度的第二孔,从而防止上布线导体和下布线导体之间的短路。 此外,公开了一种通过离子束在具有半导体器件的阶梯状部分的表面区域形成预定形状的孔的方法,该方法包括:扫描步骤的高级区域的预蚀刻步骤 具有离子束的部分,使得高级区域变得与阶梯状部分的低级区域相等,并且主要步骤是用离子束扫描整个表面积直到孔 在半导体器件中形成预定形状。

    IC wiring connecting method and resulting article
    16.
    发明授权
    IC wiring connecting method and resulting article 失效
    IC接线方式及其结果

    公开(公告)号:US4868068A

    公开(公告)日:1989-09-19

    申请号:US32753

    申请日:1987-03-31

    摘要: A IC wiring connecting method for interconnecting conductive lines of the same wiring plane of an IC chip for correcting the wiring, for interconnecting conductive lines of different wiring lanes of a multilayer IC chip at the same position, or for connecting a conductive line of a lower wiring plane of a multilayer IC chip to a conductive line formed at a separate position on the same multilayer IC chip. The insulating film or films covering conductive lines to be interconnected are processed by an energy beam such as a concentrated ion beam to form holes so as to expose the respective parts of the conductive lines where the conductive lines are to be interconnected, then a metal is deposited over the surfaces of the holes and an area interconnecting the holes by irradiating the surfaces of the holes and the area by an energy beam or a concentrated ion beam in an atmosphere of a gaseous organic metal compound to form a conductive metal film electrically interconnecting the conductive lines. Also provided is an apparatus for carrying out the IC wiring connecting method, which comprises, as essential components, an ion beam material processing system, an insulating film forming system such as a laser induced CVD unit, a conductive film forming system, and an insulating film etching system.

    摘要翻译: 一种用于互连用于校正布线的IC芯片的相同布线面的导线的IC布线连接方法,用于将相同位置处的多层IC芯片的不同布线通道的导线相互连接,或用于连接下层导体线 多层IC芯片的布线平面形成在同一多层IC芯片上的分离位置上的导线。 覆盖要互连的导电线的绝缘膜或膜由诸如浓缩离子束的能量束进行处理,以形成孔,以便露出导线与互连的相应部分,然后金属为 通过在气态有机金属化合物的气氛中通过能量束或浓缩离子束照射孔和区域的表面而沉积在孔的表面上的区域和互连孔的区域,以形成导电金属膜, 导线。 还提供了一种用于执行IC布线连接方法的装置,其包括作为主要组成部分的离子束材料处理系统,诸如激光诱导CVD单元的绝缘膜形成系统,导电膜形成系统和绝缘体 电影蚀刻系统。

    Apparatus for irradiation with charged particle beams
    18.
    发明授权
    Apparatus for irradiation with charged particle beams 失效
    用于带电粒子束照射的装置

    公开(公告)号:US4479060A

    公开(公告)日:1984-10-23

    申请号:US454027

    申请日:1982-12-28

    CPC分类号: H01J37/10 H01J37/252

    摘要: An apparatus according to the present invention for irradiating a specimen with charged particle beams comprises a single charged particle generating source from which the charged particle beams formed of electrons and negative ions, respectively, can be simultaneously derived; a specimen holder on which the specimen is placed; and charged particle irradiation means which is interposed between the charged particle generating source and the specimen holder in order to focus the charged particle beams and to irradiate the surface of the specimen with the focused beams, and which includes at least one magnetic lens and at least one electrostatic lens that are individually disposed.

    摘要翻译: 根据本发明的用于用带电粒子束照射样本的装置包括单个带电粒子发生源,可以同时衍生由电子和负离子形成的带电粒子束; 放置样品的样品架; 以及带电粒子照射装置,其被插入在带电粒子发生源和样本保持器之间,以便聚焦带电粒子束并用聚焦束照射样本的表面,并且至少包括至少一个磁性透镜 一个静电透镜单独设置。

    Semiconductor failure analysis apparatus which acquires a failure observed image, failure analysis method, and failure analysis program
    19.
    发明授权
    Semiconductor failure analysis apparatus which acquires a failure observed image, failure analysis method, and failure analysis program 有权
    获取故障观察图像,故障分析方法和故障分析程序的半导体故障分析装置

    公开(公告)号:US07865012B2

    公开(公告)日:2011-01-04

    申请号:US11586721

    申请日:2006-10-26

    IPC分类号: G06K9/00

    摘要: A failure analysis apparatus 10 is composed of an inspection information acquirer 11 for acquiring a failure observed image P2 of a semiconductor device, a layout information acquirer 12 for acquiring layout information, and a failure analyzer 13 for analyzing a failure. The failure analyzer 13 extracts as a candidate interconnection for a failure, an interconnection passing an analysis region, out of a plurality of interconnections, using interconnection information to describe a configuration of interconnections in the semiconductor device by a pattern data group of interconnection patterns in respective layers, and, for extracting the candidate interconnection, it performs an equipotential trace of the interconnection patterns using the pattern data group, thereby extracting the candidate interconnection. This substantializes a semiconductor failure analysis apparatus, failure analysis method, and failure analysis program capable of securely and efficiently performing the analysis of the failure of the semiconductor device using the failure observed image.

    摘要翻译: 故障分析装置10由用于获取半导体装置的故障观察图像P2的检查信息获取部11,用于获取布局信息的布局信息获取部12以及用于分析故障的故障分析部13构成。 故障分析器13通过互连信息提取出故障的候选互连,通过分析区域的互连,使用互连信息,以通过相应的互连模式的图案数据组来描述半导体器件中的互连的配置 并且为了提取候选互连,它使用模式数据组来执行互连模式的等势线,从而提取候选互连。 这实现了半导体故障分析装置,故障分析方法和故障分析程序,其能够安全有效地执行使用故障观察图像的半导体器件的故障的分析。