公开(公告)号：US20160047774A1

公开(公告)日：2016-02-18

申请号：US14462432

申请日：2014-08-18

Applicant: STMicroelectronics Pte Ltd

Inventor： Jerome Teysseyre ,  Yonggang Jin ,  Suman Cherian

IPC: G01N27/406 ,  H05K3/42 ,  H05K13/04 ,  G01N27/407

CPC classification number: G01N27/4065 ,  G01N27/4062 ,  G01N27/4071 ,  G01N27/4077 ,  H05K1/185 ,  H05K2201/09118 ,  H05K2201/10151

Abstract: A compact microelectronic gas sensor module includes electrical contacts formed in such a way that they do not consume real estate on an integrated circuit chip. Using such a design, the package can be miniaturized further. The gas sensor is packaged together with a custom-designed Application Specific Integrated Circuit (ASIC) that provides circuitry for processing sensor signals to identify gas species within a sample under test. In one example, the output signal strength of the sensor is enhanced by providing an additional metal surface area in the form of pillars exposed to an electrolytic gas sensing compound, while reducing the overall package size. In some examples, bottom side contacts are formed on the underside of the substrate on which the gas sensor is formed. Sensor electrodes may be electrically coupled to the ASIC directly, or indirectly by vias.

Abstract translation: 紧凑的微电子气体传感器模块包括以这样的方式形成的电触头，使得它们不消耗集成电路芯片上的不动产。 使用这种设计，可以进一步小型化包装。 气体传感器与定制设计的专用集成电路（ASIC）封装在一起，该集成电路提供用于处理传感器信号以识别被测样品内的气体种类的电路。 在一个示例中，通过提供暴露于电解气体感测化合物的柱形式的附加金属表面积，同时减小整体封装尺寸，增强了传感器的输出信号强度。 在一些示例中，在形成有气体传感器的基板的下侧上形成底侧触点。 传感器电极可以直接或间接地通过通孔电耦合到ASIC。

公开(公告)号：US08836117B2

公开(公告)日：2014-09-16

申请号：US13652937

申请日：2012-10-16

Applicant: STMicroelectronics Pte. Ltd

Inventor： Yonggang Jin ,  How Yuan Hwang

IPC: H01L23/498 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L23/49811 ,  H01L21/56 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/19 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/12105 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/18162 ,  H01L2924/00

Abstract: An electronic device may include a bottom interconnect layer and an integrated circuit (IC) carried by the bottom interconnect layer. The electronic device may further include an encapsulation material on the bottom interconnect layer and laterally surrounding the IC. The electronic device may further include electrically conductive pillars on the bottom interconnect layer extending through the encapsulation material. At least one electrically conductive pillar and adjacent portions of encapsulation material may have a reduced height with respect to adjacent portions of the IC and the encapsulation material and may define at least one contact recess. The at least one contact recess may be spaced inwardly from a periphery of the encapsulation material.

Abstract translation: 电子设备可以包括底部互连层和由底部互连层承载的集成电路（IC）。 电子设备还可以包括底部互连层上的封装材料并横向包围IC。 电子器件还可以包括穿过封装材料的底部互连层上的导电柱。 至少一个导电柱和封装材料的相邻部分可以相对于IC和封装材料的相邻部分具有减小的高度，并且可以限定至少一个接触凹部。 所述至少一个接触凹部可以与所述封装材料的周边向内间隔开。

公开(公告)号：US20160293559A1

公开(公告)日：2016-10-06

申请号：US14674891

申请日：2015-03-31

Applicant: STMicroelectronics Pte Ltd

Inventor： Yun Liu ,  Jerome Teysseyre ,  Yonggang Jin

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L21/78 ,  H01L23/3178 ,  H01L23/3192 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/02313 ,  H01L2224/02319 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/11334 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2224/03 ,  H01L2224/11

Abstract: One or more embodiments are directed to semiconductor packages that include a pillar and bump structures. The semiconductor packages include a die that has recess at a perimeter of the semiconductor die. The semiconductor package includes an encapsulation layer that is located over the semiconductor die filling the recess and surrounding side surfaces of the pillars. The package may be formed on a wafer with a plurality of die and may be singulated into a plurality of packages.

Abstract translation: 一个或多个实施例涉及包括柱和凸块结构的半导体封装。 半导体封装包括在半导体管芯的周边具有凹部的管芯。 半导体封装包括封装层，该封装层位于半导体管芯上方，该封装层填充凹槽并且围绕柱的周围侧表面。 封装可以形成在具有多个管芯的晶片上，并且可以被单个化成多个封装。

公开(公告)号：US09455241B2

公开(公告)日：2016-09-27

申请号：US14754230

申请日：2015-06-29

Applicant: STMICROELECTRONICS PTE LTD

Inventor： Yonggang Jin ,  Kiyoshi Kuwabara ,  Xavier Baraton

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/683 ,  H01L23/498 ,  H01L23/538 ,  H01L21/311 ,  H01L21/56 ,  H01L21/768

CPC classification number: H01L24/83 ,  H01L21/311 ,  H01L21/4821 ,  H01L21/486 ,  H01L21/56 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/768 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/18 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2221/68381 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2224/2518 ,  H01L2224/8385 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00

Abstract: Aspects of the invention are directed towards an integrated circuit package and method of forming the same, and more particularly to a redistributed chip packaging for an integrated circuit. The integrated circuit package includes an integrated circuit having a protective material on at least a portion of the integrated circuit. A lead frame is coupled to the integrated circuit and a conductive layer is also coupled to the interconnect. A solder ball is coupled to the conductive layer and a passivation layer is on the conductive layer. Active and passive components are electrically coupled to the integrated circuit.

Abstract translation: 本发明的方面涉及一种集成电路封装及其形成方法，更具体地涉及用于集成电路的重新分配的芯片封装。 集成电路封装包括在集成电路的至少一部分上具有保护材料的集成电路。 引线框架耦合到集成电路，并且导电层也耦合到互连。 焊球与导电层耦合，钝化层位于导电层上。 有源和无源部件电耦合到集成电路。

公开(公告)号：US09018645B2

公开(公告)日：2015-04-28

申请号：US14013507

申请日：2013-08-29

Applicant: STMicroelectronics Pte Ltd.

Inventor： Yonggang Jin

IPC: H01L31/173 ,  H01L23/00

CPC classification number: H01L31/173 ,  H01L21/568 ,  H01L24/14 ,  H01L24/19 ,  H01L24/20 ,  H01L24/81 ,  H01L24/96 ,  H01L27/14678 ,  H01L33/62 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/00

Abstract: An electronics assembly includes a semiconductor die assembly, an enclosure affixed to the semiconductor die assembly, the enclosure defining first and second chambers over the semiconductor die assembly, and first and second optical elements mounted in the first and second chambers, respectively. The semiconductor die assembly includes a semiconductor die encapsulated in a molded material, an encapsulation layer located on the top surface of the semiconductor die, and at least one patterned metal layer and at least one dielectric layer over the encapsulation layer. Conductive pillars extend through the encapsulation layer for electrical connection to the semiconductor die. The encapsulation layer blocks optical crosstalk between the first and second chambers. A method is provided for making the electronics assembly.

Abstract translation: 电子组件包括半导体管芯组件，固定到半导体管芯组件的外壳，在半导体管芯组件上限定第一和第二腔室的外壳，以及安装在第一和第二腔室中的第一和第二光学元件。 半导体管芯组件包括封装在模制材料中的半导体管芯，位于半导体管芯的顶表面上的封装层，以及至少一个图案化金属层和封装层上的至少一个介电层。 导电柱延伸穿过封装层，以与半导体管芯电连接。 封装层阻止第一和第二腔室之间的光学串扰。 提供了一种用于制造电子组件的方法。

公开(公告)号：US08860207B2

公开(公告)日：2014-10-14

申请号：US14177146

申请日：2014-02-10

Applicant: STMicroelectronics Pte Ltd. ,  STMicroelectronics Grenoble 2 SAS

Inventor： Yonggang Jin ,  Romain Coffy ,  Jerome Teysseyre

IPC: H01L23/34 ,  H01L21/00 ,  H01R43/16 ,  H01L23/498 ,  H01L23/36 ,  H01L23/31 ,  H01L21/768

CPC classification number: H01L23/498 ,  H01L21/561 ,  H01L21/76283 ,  H01L21/76802 ,  H01L21/76838 ,  H01L23/3114 ,  H01L23/34 ,  H01L23/36 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/02331 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05548 ,  H01L2224/05553 ,  H01L2224/05562 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/96 ,  H01L2924/00014 ,  H01L2924/181 ,  Y10T29/49124 ,  Y10T29/49174 ,  Y10T29/49204 ,  H01L2224/03 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A fan-out wafer level package is provided with a semiconductor die embedded in a reconstituted wafer. A redistribution layer is positioned over the semiconductor die, and includes a land grid array on a face of the package. A copper heat spreader is formed in the redistribution layer over the die in a same layer as a plurality of electrical traces configured to couple circuit pads of the semiconductor die to respective contact lands of the land grid array. In operation, the heat spreader improves efficiency of heat transfer from the die to the circuit board.

公开(公告)号：US20130168858A1

公开(公告)日：2013-07-04

申请号：US13722776

申请日：2012-12-20

Applicant: STMicroelectronics Pte Ltd.

Inventor： Anandan Ramasamy ,  Yonggang Jin ,  Yun Liu

IPC: H01L21/56 ,  H01L23/498

CPC classification number: H01L21/565 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49838 ,  H01L24/19 ,  H01L24/96 ,  H01L25/105 ,  H01L2224/12105 ,  H01L2224/96 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/03 ,  H01L2924/00

Abstract: A bar formed from a reconstituted wafer and containing one or more conductive material filled voids is used to electrically and physically connect the top and bottom packages in a package-on-package (PoP) package. The bar is disposed in the fan out area of the lower package forming the PoP package.

Abstract translation: 由重构的晶片形成并包含一个或多个导电材料填充的空隙的条被用于电和物理地连接封装在封装（PoP）封装中的顶部和底部封装。 该条被布置在形成PoP包装的下部包装的扇形区域中。

公开(公告)号：US20130119282A1

公开(公告)日：2013-05-16

申请号：US13670766

申请日：2012-11-07

Applicant: STMicroelectronics Pte Ltd.

Inventor： Yonggang Jin ,  Wee Chin Judy Lim

IPC: H01L31/0232 ,  H01L31/18

CPC classification number: H01L31/16 ,  G01S7/4813 ,  G01S17/026 ,  G01V8/12 ,  H01L21/568 ,  H01L25/167 ,  H01L31/0232 ,  H01L31/02327 ,  H01L31/167 ,  H01L31/18 ,  H01L31/186 ,  H01L2224/04105 ,  H01L2224/18 ,  H01L2224/19 ,  H01L2924/3511 ,  H03K17/941 ,  H03K17/9631 ,  H03K17/9638 ,  H03K2217/96023 ,  Y10T156/1052 ,  Y10T156/1064

Abstract: An optical detection sensor and method of forming same. The optical detection sensor be a proximity detection sensor that includes an optical system and a selectively transmissive structure. Electromagnetic radiation such as laser light can be emitted through a transmissive portion of the selectively transmissive structure. A reflected beam can be detected to determine the presence of an object.

Abstract translation: 一种光学检测传感器及其形成方法。 光学检测传感器是包括光学系统和选择性透射结构的接近检测传感器。 诸如激光的电磁辐射可以通过选择性透射结构的透射部分发射。 可以检测反射光束以确定物体的存在。

公开(公告)号：US10128207B2

公开(公告)日：2018-11-13

申请号：US14674891

申请日：2015-03-31

Applicant: STMicroelectronics Pte Ltd

Inventor： Yun Liu ,  Jerome Teysseyre ,  Yonggang Jin

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/00 ,  H01L23/31 ,  H01L21/78

Abstract: One or more embodiments are directed to semiconductor packages that include a pillar and bump structures. The semiconductor packages include a die that has recess at a perimeter of the semiconductor die. The semiconductor package includes an encapsulation layer that is located over the semiconductor die filling the recess and surrounding side surfaces of the pillars. The package may be formed on a wafer with a plurality of die and may be singulated into a plurality of packages.

公开(公告)号：US10115842B2

公开(公告)日：2018-10-30

申请号：US15802271

申请日：2017-11-02

Applicant: STMicroelectronics Pte Ltd. ,  STMicroelectronics R&D Limited

Inventor： Yonggang Jin ,  David Lawson ,  Colin Campbell ,  Anandan Ramasamy

IPC: H01L31/0216 ,  H01L31/0232 ,  H01L31/0203 ,  H01L31/02 ,  H01L31/101

Abstract: Embodiments of the present disclosure are directed to optical packages having a package body that includes a light protection coating on at least one surface of a transparent material. The light protection coating includes one or more openings to allow light to be transmitted to the optical device within the package body. In one embodiment, the light protection coating and the openings allow substantially perpendicular radiation to be directed to the optical device within the package body. In one exemplary embodiment the light protection coating is located on an outer surface of the transparent material. In another embodiment, the light protection coating is located on an inner surface of the transparent material inside of the package body.