公开(公告)号：US20150206809A1

公开(公告)日：2015-07-23

申请号：US14161738

申请日：2014-01-23

Applicant: International Business Machines Corporation

Inventor： Hanyi Ding ,  Oleg Gluschenkov ,  Ping-Chuan Wang ,  Lin Zhou

IPC: H01L21/66 ,  H01L21/67 ,  H01L21/683

CPC classification number: H01L22/26 ,  H01L21/30625 ,  H01L21/76898 ,  H01L22/14

Abstract: Embodiments of the present invention provide an apparatus and method for wafer thinning endpoint detection. Embodiments of the present invention utilize through silicon via (TSV) structures formed in the wafer. A specially made wafer handle is bonded to the wafer. Conductive slurry is used in the wafer backside thinning process. The wafer handle provides electrical connectivity to an electrical measurement tool, and conductive posts in the wafer handle are proximal to a test structure on the wafer. A plurality of electrically isolated TSVs is monitored via the electrical measurement tool. When the TSVs are exposed on the backside as a result of thinning, the conductive slurry shorts the electrically isolated TSVs, changing the electrical properties of the plurality of TSVs. The change in electrical properties is detected and used to trigger termination of the wafer backside thinning process.

Abstract translation: 本发明的实施例提供了一种用于晶片薄化端点检测的装置和方法。 本发明的实施例利用在晶片中形成的硅通孔（TSV）结构。 特殊制造的晶圆把手与晶片结合。 导电浆料用于晶片背面变薄处理。 晶片手柄提供与电测量工具的电连接，并且晶片把手中的导电柱靠近晶片上的测试结构。 通过电测量工具监测多个电隔离TSV。 当TSV由于变薄而暴露在背面时，导电浆料使电隔离的TSV短路，改变多个TSV的电性能。 检测电特性的变化并用于触发晶圆背面变薄过程的终止。

公开(公告)号：US09059183B2

公开(公告)日：2015-06-16

申请号：US13748662

申请日：2013-01-24

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hanyi Ding ,  Kai D. Feng ,  Zhong-Xiang He ,  Xuefeng Liu

IPC: H01L23/552 ,  H01L21/76 ,  H01L21/762 ,  H01L23/58

CPC classification number: H01L23/552 ,  H01L21/76 ,  H01L21/76264 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: A structure includes a substrate comprising a region having a circuit or device which is sensitive to electrical noise. Additionally, the structure includes a first isolation structure extending through an entire thickness of the substrate and surrounding the region and a second isolation structure extending through the entire thickness of the substrate and surrounding the region.

Abstract translation: 一种结构包括具有对电噪声敏感的电路或器件的区域的衬底。 此外，该结构包括延伸穿过衬底的整个厚度并围绕该区域的第一隔离结构，以及延伸穿过衬底的整个厚度并围绕该区域的第二隔离结构。

公开(公告)号：US20150091601A1

公开(公告)日：2015-04-02

申请号：US14041422

申请日：2013-09-30

Applicant: International Business Machines Corporation

Inventor： Hanyi Ding ,  Xuefeng Liu ,  Alvin W. Strong ,  Randy L. Wolf

IPC: G01R31/26 ,  G01R31/319

CPC classification number: G01R31/2628 ,  G01R31/2623 ,  G01R31/2822

Abstract: Embodiments of the present invention provide a circuit and method to characterize the impact of bias temperature instability on semiconductor devices. The circuit comprises a transistor having a gate, drain, source, and body terminal. Two AC pad sets each having a plurality of conductive pads. Two DC pads are in communication with a DC supply and/or meter. The gate terminal is in communication with a first conductive pad included in the plurality of conductive pads of each of the AC pad sets. The drain terminal is in communication with a second conductive pad of an AC pad set and the source terminal with a second conductive pad of another AC pad set. One DC pad is in communication with the gate terminal through a first serial resistor and another DC pad with the body terminal through a second serial resistor and provides an open-circuit for the gate and body terminals.

Abstract translation: 本发明的实施例提供了表征偏压温度不稳定性对半导体器件的影响的电路和方法。 电路包括具有栅，漏，源和体端子的晶体管。 两个AC焊盘组均具有多个导电焊盘。 两个直流焊盘与直流电源和/或电表通讯。 栅极端子与包括在每个AC焊盘组的多个导电焊盘中的第一导电焊盘连通。 漏极端子与AC焊盘组的第二导电焊盘和源极端子与另一个AC焊盘组的第二导电焊盘连通。 一个直流焊盘通过第一串联电阻器与栅极端子连通，另一个直流焊盘通过第二串联电阻器与主体端子连接，并为栅极和主体端子提供开路。

公开(公告)号：US20140231992A1

公开(公告)日：2014-08-21

申请号：US13772715

申请日：2013-02-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hanyi Ding ,  Richard S. Graf ,  Gary R. Hill ,  Wayne H. Woods, JR.

IPC: H01L23/498

CPC classification number: H01L24/17 ,  H01L22/12 ,  H01L22/14 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5225 ,  H01L23/66 ,  H01L24/09 ,  H01L2224/0401 ,  H01L2224/16055 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1713 ,  H01L2924/0002 ,  H01L2924/1532 ,  H01L2924/2076 ,  H01L2924/00

Abstract: Various embodiments include wafer level chip scale package (WLCSP) structures and methods of tuning such structures. In some embodiments, the WLCSP structure includes: a printed circuit board (PCB) trace connection including at least one PCB ground connection connected with a PCB ground plane; a set of ground solder balls each contacting the printed circuit board trace connection; a set of chip pads contacting each of the ground solder balls in the set of ground solder balls; a chip ground plane connecting the set of chip pads; and a signal interconnect interposed between two of the set of ground solder balls, the signal interconnect including: a signal trace connection electrically isolated from the PCB ground plane; a signal ball contacting the signal PCB trace connection; a chip pad contacting the signal ball, and a signal trace connection on a chip contacting the chip pad.

Abstract translation: 各种实施例包括晶片级芯片级封装（WLCSP）结构和调谐这种结构的方法。 在一些实施例中，WLCSP结构包括：印刷电路板（PCB）迹线连接，其包括与PCB接地平面连接的至少一个PCB接地连接; 一组接地焊球，每个接触印刷电路板跟踪连接; 与所述一组接地焊球中的所述接地焊球接触的一组芯片焊盘; 连接该组芯片焊盘的芯片接地平面; 以及插入在所述一组接地焊球中的两个之间的信号互连，所述信号互连包括：与所述PCB接地平面电隔离的信号迹线连接; 信号球接触信号PCB跟踪连接; 接触信号球的芯片焊盘和与芯片焊盘接触的芯片上的信号迹线连接。

公开(公告)号：US20140203894A1

公开(公告)日：2014-07-24

申请号：US13748048

申请日：2013-01-23

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Renata Camillo-Castillo ,  Hanyi Ding ,  Anthony K. Stamper

IPC: H01P1/203 ,  G06F17/50

CPC classification number: H01P1/2039 ,  G06F17/5036 ,  G06F17/5045

Abstract: On-chip millimeter wave (mmW) notch filters with via stubs, methods of manufacture and design structures are disclosed. The notch filter includes a signal line comprising a metal trace line connected to a metal via stub partially extending into a semiconductor substrate. The notch filter further includes a defected ground plane connected to at least one or more additional metal via stubs partially extending into the semiconductor substrate.

Abstract translation: 公开了具有通孔短片的片上毫米波（mmW）陷波滤波器，制造方法和设计结构。 陷波滤波器包括信号线，该信号线包括连接到部分延伸到半导体衬底中的金属通孔短截线的金属迹线。 陷波滤波器还包括连接到部分延伸到半导体衬底中的经由短截线的至少一个或多个附加金属的缺陷接地平面。

公开(公告)号：US08748308B2

公开(公告)日：2014-06-10

申请号：US13665976

申请日：2012-11-01

Applicant: International Business Machines Corporation

Inventor： Hanyi Ding ,  Alvin J. Joseph ,  Anthony K. Stamper

IPC: H01L21/4763

CPC classification number: H01L21/76802 ,  H01L21/6835 ,  H01L21/76898 ,  H01L21/823475 ,  H01L21/823481 ,  H01L23/481 ,  H01L24/05 ,  H01L24/10 ,  H01L24/12 ,  H01L24/13 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/2518 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A method of forming and structure for through wafer vias and signal transmission lines formed of through wafer vias. The structure includes, a semiconductor substrate having a top surface and an opposite bottom surface; and an array of through wafer vias comprising at least one electrically conductive through wafer via and at least one electrically non-conductive through wafer via, each through wafer via of the array of through wafer vias extending from the top surface of to the bottom surface of the substrate, the at least one electrically conductive via electrically isolated from the substrate.

Abstract translation: 用于通过晶片通孔形成和结构的方法，所述晶片通孔和通过晶片通孔形成的信号传输线。 该结构包括：具有顶表面和相对底表面的半导体衬底; 以及贯穿晶片通孔的阵列，其包括至少一个导电的通过晶片通孔和至少一个非导电的通过晶片通孔，每个通过晶片通孔的通过晶片通孔的阵列从顶表面延伸到底表面 所述衬底，所述至少一个导电通孔与所述衬底电隔离。

公开(公告)号：US09800434B2

公开(公告)日：2017-10-24

申请号：US13867433

申请日：2013-04-22

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hanyi Ding ,  Alberto Valdes Garcia ,  Wayne H. Woods, Jr.

IPC: H04B1/40 ,  H04L25/02 ,  H01P1/18 ,  H01R43/00 ,  H03K17/687 ,  G06F17/50

CPC classification number: H04L25/0278 ,  G06F17/50 ,  H01P1/182 ,  H01P1/184 ,  H01R43/00 ,  H03K17/687 ,  H04L25/0272

Abstract: Tunable phase shifters and methods for using the same include a signal line; one or more grounding lines; one or more crossing lines below the signal line in proximity to the signal line and substantially perpendicular to a longitudinal direction of the signal line, where the crossing lines conform to the shape of the signal line along at least three surfaces of the signal line and where the crossing lines have a tunable capacitance; and an inductance return line below the crossing lines substantially parallel to the longitudinal direction of the signal line, where the inductance return line provides a tunable inductance.

公开(公告)号：US09721854B2

公开(公告)日：2017-08-01

申请号：US13705213

申请日：2012-12-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hanyi Ding ,  Kai D. Feng ,  Ping-Chuan Wang ,  Zhijian Yang

IPC: H01L21/66 ,  G01R31/02 ,  G01R31/26 ,  G01R31/28

CPC classification number: H01L22/14 ,  G01R31/024 ,  G01R31/2644 ,  G01R31/2884 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A system, method and apparatus may comprise a wafer having a plurality of spiral test structures located on the kerf of the wafer. The spiral test structure may comprise a spiral connected at either end by a capacitor to allow the spiral test structure to resonate. The spiral structures may be located on a first metal layer or on multiple metal layers. The system may further incorporate a test apparatus having a frequency transmitter and a receiver. The test apparatus may be a sensing spiral which may be placed over the spiral test structures. A controller may provide a range of frequencies to the test apparatus and receiving the resonant frequencies from the test apparatus. The resonant frequencies will be seen as reductions in signal response at the test apparatus.

公开(公告)号：US20160308270A1

公开(公告)日：2016-10-20

申请号：US14687002

申请日：2015-04-15

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hanyi Ding ,  Mark D. Jaffe ,  Alvin J. Joseph ,  Anthony K. Stamper

IPC: H01Q1/22 ,  H01L21/762

CPC classification number: H01Q1/2283 ,  H01L21/76224 ,  H01L23/5227 ,  H01Q9/16

Abstract: Approaches for an on-chip antenna are provided. A method includes forming an antenna in an insulator layer at a front side of a substrate. The method also includes forming a trench in the substrate underneath the antenna. The method further includes forming a fill material in the trench. The substrate is composed of a material having a first dielectric constant. The fill material has a second dielectric constant that is less than the first dielectric constant.

Abstract translation: 提供了片上天线的方法。 一种方法包括在基板的正面的绝缘体层中形成天线。 该方法还包括在天线下方的衬底中形成沟槽。 该方法还包括在沟槽中形成填充材料。 基板由具有第一介电常数的材料构成。 填充材料具有小于第一介电常数的第二介电常数。

公开(公告)号：US09217769B2

公开(公告)日：2015-12-22

申请号：US13647719

申请日：2012-10-09

Applicant: International Business Machines Corporation

Inventor： Hanyi Ding ,  Kai D. Feng ,  Hailing Wang ,  Zhijian Yang

IPC: G01R31/00 ,  G01R31/28 ,  H03K3/03

CPC classification number: G01R31/2824 ,  H03K3/0315

Abstract: A test circuit for a ring oscillator comprising a plurality of inverting stages includes a power supply, the power supply configured to provide a voltage to the plurality of inverting stages of the ring oscillator at a power output; and a power sensing resistor located between the power output of the power supply and direct current (DC) bias inputs of the inverting stages of the ring oscillator, wherein a signal from the power sensing resistor is configured to be monitored to determine a characteristic of the ring oscillator.

Abstract translation: 包括多个反相级的环形振荡器的测试电路包括电源，所述电源被配置为在功率输出时向所述环形振荡器的所述多个反相级提供电压; 以及位于电源的功率输出和环形振荡器的反相级的直流（DC）偏置输入之间的功率感测电阻器，其中来自功率感测电阻器的信号被配置为被监视以确定 环形振荡器。