公开(公告)号：US11688714B2

公开(公告)日：2023-06-27

申请号：US16061003

申请日：2017-09-05

申请人： SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.

发明人： Yoshihiro Kamiyama

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495

CPC分类号： H01L24/37 ,  H01L23/3107 ,  H01L23/49575 ,  H01L24/29 ,  H01L2224/37012

摘要： A semiconductor device is provided, including a seal portion; an electronic element within the seal portion; first, second, and third lead terminals; first and second connecting elements; and first and second conductive bonding agents, one end of the first connecting element having a protrusion downward and electrically connected to a control electrode of the electronic element with the first conductive bonding agent, a first side surface extending from the one end to the other end of the first connecting element is parallel to an extending direction along which the one end of the second connecting element extends, a wall portion being disposed on a top surface of the one end of the second lead terminal, and the wall portion being in contact with the other end of the first connecting element.

公开(公告)号：US20230187404A1

公开(公告)日：2023-06-15

申请号：US17926623

申请日：2021-03-16

申请人： WUXI LEAPERS SEMICONDUCTOR CO., LTD.

发明人： Xiaoguang LIANG

IPC分类号： H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L23/492

CPC分类号： H01L24/37 ,  H01L24/40 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L23/291 ,  H01L23/3121 ,  H01L23/293 ,  H01L23/4922 ,  H01L2224/29111 ,  H01L2224/32225 ,  H01L2224/73263 ,  H01L2224/37147 ,  H01L2224/40225 ,  H01L2224/37028 ,  H01L2224/37032 ,  H01L23/4924

摘要： A power semiconductor module includes a metal bottom plate, an insulating heat dissipation material layer, a chip, a binding plate, silica gel, and an outer housing, where the binding plate includes a copper plate and a copper strap. The copper plate is connected to the copper strap through welding, and the binding plate is configured to connect circuits of various components. The metal bottom plate is connected to the insulating heat dissipation material layer through tin soldering, the chip is connected to the insulating heat dissipation material layer through tin soldering, the chip is connected to the copper strap, and the copper strap is connected to the insulating heat dissipation material layer. The module can resolve the prior-art problem of mechanical stress generated on the chip in the case of a temperature change when a relatively thick copper frame is applied to the packaging of the power semiconductor module.

公开(公告)号：US20230187322A1

公开(公告)日：2023-06-15

申请号：US17851499

申请日：2022-06-28

申请人： Mitsubishi Electric Corporation

发明人： Yo TANAKA ,  Masakazu TANI ,  Tomohisa YAMANE ,  Katsuhisa KODAMA

IPC分类号： H01L23/495 ,  H01L23/00 ,  H02M7/537

CPC分类号： H01L23/49524 ,  H01L24/37 ,  H01L23/49548 ,  H01L23/49575 ,  H01L24/40 ,  H02M7/537 ,  H01L25/072

摘要： In this power semiconductor module, a first lead frame and a second lead frame through which currents flow in opposite directions are arranged so as to overlap each other, whereby the internal inductance can be reduced. In a direction perpendicular to one main surface of a first metal wiring layer, each of the first lead frame and the second lead frame is provided so as not to overlap parts of end surfaces of the first metal wiring layer and a second metal wiring layer. Thus, in a manufacturing process for the power semiconductor module before sealing with sealing resin, it is possible to easily perform positioning between the lead frames and between the metal wiring layer and the lead frame, using the end surfaces, whereby the manufacturing process can be simplified.

公开(公告)号：US20230170322A1

公开(公告)日：2023-06-01

申请号：US17536498

申请日：2021-11-29

申请人： Texas Instruments Incorporated

发明人： Ernesto Pentecostes Rafael, JR. ,  Kristina Dianne Hernandez Sazon ,  Dior Yñigo Medina Gadia

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L23/495

CPC分类号： H01L24/37 ,  H01L24/32 ,  H01L24/38 ,  H01L25/0657 ,  H01L23/49575 ,  H01L2224/32245 ,  H01L2224/3702 ,  H01L2924/38

摘要： An integrated circuit package includes a lead frame, a first die adhered to the lead frame on a first side of the first die, and a first clip having a clip foot adhered to the lead frame. The first clip has a first side and a second side. A first die attachment region is defined by a first group of four notches in the first side of the first clip. The first clip extends from the lead frame and contacts a second side of the first die at the first die attachment region via a first layer of solder paste. The integrated circuit package further has a second die adhered to the second side of the first clip on a first side of the second die, and a second clip having a clip foot adhered to the lead frame. The second clip has a first side and a second side. A second die attachment region is defined by a second group of four notches in the first side of the second clip. The second clip extends from the lead frame and contacts a second side of the second die at the second die attachment region via a second layer of solder paste.

公开(公告)号：US20230154883A1

公开(公告)日：2023-05-18

申请号：US17990230

申请日：2022-11-18

申请人： NEXPERIA B.V.

发明人： Ricardo Yandoc ,  Adam Brown ,  Haibo Fan

IPC分类号： H01L23/00

CPC分类号： H01L24/40 ,  H01L24/37 ,  H01L24/05 ,  H01L24/84 ,  H01L2224/04034 ,  H01L2224/40225 ,  H01L2224/37005 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2224/84

摘要： A semiconductor package including a semiconductor die having multiple bond pads is provided. The package further includes an electrically conducting clip including, at a first side thereof, at least one pin for mounting the package to an external board and includes, at a second side opposite to the first side, a connecting portion connecting the clip to at least two bond pads of the multiple bond pads. The connection portion includes at least two elongated connecting strips spaced apart from each other at a distance in such a manner that each strip extends over at least one of the at least two bond pads and is connected thereto.

公开(公告)号：US20180331067A1

公开(公告)日：2018-11-15

申请号：US16041765

申请日：2018-07-21

申请人： Adventive Technology Ltd.

发明人： Richard K. Williams ,  Keng-Hung Lin

IPC分类号： H01L23/00 ,  H01L21/3105 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L23/495 ,  H01L21/268

CPC分类号： H01L24/96 ,  H01L21/268 ,  H01L21/31058 ,  H01L21/4825 ,  H01L21/4828 ,  H01L21/4842 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49551 ,  H01L23/49555 ,  H01L23/49562 ,  H01L23/49568 ,  H01L23/49582 ,  H01L24/06 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/49 ,  H01L24/73 ,  H01L24/84 ,  H01L24/97 ,  H01L2224/0603 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/4111 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4846 ,  H01L2224/48464 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A variety of footed and leadless semiconductor packages, with either exposed or isolated die pads, are described. Some of the packages have leads with highly coplanar feet that protrude from a plastic body, facilitating mounting the packages on printed circuit boards using wave-soldering techniques.

公开(公告)号：US20180330968A1

公开(公告)日：2018-11-15

申请号：US16041275

申请日：2018-07-20

申请人： Adventive Technology Ltd.

发明人： Richard K. Williams ,  Keng Hung Lin

IPC分类号： H01L21/48 ,  H01L21/56 ,  H01L23/29 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/495

CPC分类号： H01L21/4882 ,  H01L21/4828 ,  H01L21/565 ,  H01L23/29 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/367 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49551 ,  H01L23/49555 ,  H01L23/49562 ,  H01L23/49568 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/97 ,  H01L2224/0603 ,  H01L2224/16245 ,  H01L2224/29101 ,  H01L2224/2929 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/4903 ,  H01L2224/49171 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2224/05599 ,  H01L2924/0665

摘要： A method is disclosed of fabricating a power package which includes a heat tab extending from a die pad exposed on the underside of the package, which facilitates the removal of heat from the die to the PCB or other surface on which the package is mounted. The heat tab has a bottom surface coplanar with the flat bottom surface of the die pad and bottom surface of a lead. The lead includes a horizontal foot segment, a vertical columnar segment, and a horizontal cantilever segment facing the die pad. The heat tab may also have a foot. A die containing a power device is mounted on a top surface of the die pad and may be electrically connected to the lead using a bonding wire or clip. The die may be mounted on the die pad with an electrically conductive material, and the package may also include a lead that extends from the die pad and is thus electrically tied to the bottom of the die. The result is a package with a minimal footprint that is suitable for the technique known as “wave soldering” that is used in relatively low-cost printed circuit board assembly factories.

公开(公告)号：US20180294204A1

公开(公告)日：2018-10-11

申请号：US15947756

申请日：2018-04-06

申请人： Sabin Lupan

发明人： Sabin Lupan

IPC分类号： H01L23/367 ,  H01L23/31 ,  H01L23/00 ,  H01L21/76 ,  H02M1/08

CPC分类号： H01L23/367 ,  H01L21/76 ,  H01L23/31 ,  H01L23/3735 ,  H01L23/49844 ,  H01L24/37 ,  H01L24/41 ,  H01L24/67 ,  H01L24/70 ,  H01L25/072 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2924/00014 ,  H02M1/08 ,  H01L2224/45099

摘要： A power semiconductor device and package includes multiple electrically parallel semiconductor device legs designed to share source regions and share a drain region between two devices in each leg laterally staggered from each other to distribute thermal conductivity across the shared source regions. A multitude of jigsaw patterned lateral isolation trenches are formed in a substrate of the device. The trenches are configured to isolate the laterally staggered line-in and line-out source regions from a common drain region of the plurality of semiconductor device legs. The staggered devices are also designed for staggered time and staggered heat conductivity delays from the package input to an output of a respective pair of devices to be shorter than a time and heat conductivity delay from the package input to an output of a subsequent pair of devices.

公开(公告)号：US09991183B2

公开(公告)日：2018-06-05

申请号：US14879904

申请日：2015-10-09

申请人： Infineon Technologies Austria AG

发明人： Josef Hoeglauer ,  Teck Sim Lee ,  Ralf Otremba ,  Klaus Schiess ,  Xaver Schloegel ,  Juergen Schredl

IPC分类号： H01L23/08 ,  H01L23/31 ,  H01L23/00 ,  H01L25/03 ,  H01L23/495

CPC分类号： H01L23/3135 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49551 ,  H01L23/49575 ,  H01L24/34 ,  H01L24/37 ,  H01L25/03 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/37599 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/37099

摘要： A semiconductor component includes an inner semiconductor component housing and an outer semiconductor component housing. The inner semiconductor component housing includes a semiconductor chip, a first plastic housing composition and first housing contact surfaces. At least side faces of the semiconductor chip are embedded in the first plastic housing composition and the first housing contact surfaces are free of the first plastic housing composition and include a first arrangement. The outer semiconductor component housing includes a second plastic housing composition and second housing contact surfaces which include a second arrangement. The inner semiconductor component housing is situated within the outer semiconductor component housing and is embedded in the second plastic housing composition. At least one of the first housing contact surfaces is electrically connected with at least one of the second housing contact surfaces.

公开(公告)号：US20180090463A1

公开(公告)日：2018-03-29

申请号：US15816568

申请日：2017-11-17

申请人： RENESAS ELECTRONICS CORPORATION

发明人： Yukihiro SATOU ,  Toshiyuki HATA

IPC分类号： H01L23/00 ,  H01L29/78 ,  H01L23/31 ,  H01L23/495

CPC分类号： H01L24/49 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/06 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L29/7827 ,  H01L2224/02166 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/37124 ,  H01L2224/40091 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4846 ,  H01L2224/48472 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49431 ,  H01L2224/73221 ,  H01L2224/8385 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/1811 ,  H01L2924/2075 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/206

摘要： A semiconductor device includes a header, a semiconductor chip fixed to the header constituting a MOSFET, and a sealing body of insulating resin which covers the semiconductor chip, the header and the like, and further includes a drain lead contiguously formed with the header and projects from one side surface of the sealing body, and a source lead and a gate lead which project in parallel from one side surface of the sealing body, and wires which are positioned in the inside of the sealing body and connect electrodes on an upper surface of the semiconductor chip and the source lead and the gate lead, with a gate electrode pad arranged at a position from the gate lead and the source lead farther than a source electrode pad.