公开(公告)号：US20050018977A1

公开(公告)日：2005-01-27

申请号：US10890258

申请日：2004-07-14

Applicant: Gottfried Beer ,  Nikolaus Schunk

Inventor： Gottfried Beer ,  Nikolaus Schunk

IPC: G02B6/42 ,  G02B6/36

CPC classification number: G02B6/4292 ,  G02B6/4246 ,  H01L21/568 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: An optoelectronic module and a connecting piece for the module with respect to an optical fiber and with respect to a circuit board can have a semiconductor chip in the form of an optical transmitter chip, which has a light-wave-emitting top side and has a rear side contact as a cathode on its rear side. Further semiconductor chips are embedded in a plastics composition with the optical transmitter chip in such a way that a coplanar overall top side is formed from the plastics composition and the active top side.

Abstract translation: 相对于光纤并相对于电路板的光电模块和用于模块的连接件可以具有光发射器芯片形式的半导体芯片，该发射器芯片具有发光的顶侧，并且具有 后侧接触件作为其后侧的阴极。 另外的半导体芯片以这样的方式嵌入到具有光发射机芯片的塑料组合物中，使得由塑料组合物和有源顶侧形成共面整体顶侧。

公开(公告)号：US08872315B2

公开(公告)日：2014-10-28

申请号：US13570783

申请日：2012-08-09

Applicant: Khalil Hosseini ,  Joachim Mahler ,  Ivan Nikitin ,  Gottfried Beer

Inventor： Khalil Hosseini ,  Joachim Mahler ,  Ivan Nikitin ,  Gottfried Beer

IPC: H01L23/48

CPC classification number: H01L24/27 ,  H01L23/14 ,  H01L23/49579 ,  H01L23/49883 ,  H01L24/05 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/04026 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05618 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/2741 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/29309 ,  H01L2224/29311 ,  H01L2224/29318 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/32245 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/8382 ,  H01L2224/8384 ,  H01L2224/83856 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/00

Abstract: A semiconductor device includes an electrically conducting carrier and a semiconductor chip disposed over the carrier. The semiconductor device also includes a porous diffusion solder layer provided between the carrier and the semiconductor chip.

Abstract translation: 半导体器件包括导电载体和设置在载体上的半导体芯片。 半导体器件还包括设置在载体和半导体芯片之间的多孔扩散焊料层。

公开(公告)号：US08658468B2

公开(公告)日：2014-02-25

申请号：US13570986

申请日：2012-08-09

Applicant: Gottfried Beer ,  Irmgard Escher-Poeppel

Inventor： Gottfried Beer ,  Irmgard Escher-Poeppel

IPC: H01L21/00

CPC classification number: H01L24/96 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/76879 ,  H01L23/3128 ,  H01L24/18 ,  H01L24/19 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2224/2919 ,  H01L2224/83856 ,  H01L2224/92144 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2924/0665 ,  H01L2924/00

Abstract: A method for fabricating a semiconductor chip module and a semiconductor chip package is disclosed. One embodiment provides a first layer, a second layer, and a base layer. The first layer is disposed on the base layer, and the second layer is disposed on the first layer. A plurality of semiconductor chips is applied above the second layer, and the second layer with the applied semiconductor chips is separated from the first layer.

Abstract translation: 公开了一种制造半导体芯片模块和半导体芯片封装的方法。 一个实施例提供第一层，第二层和基层。 第一层设置在基层上，第二层设置在第一层上。 多个半导体芯片被施加在第二层上方，并且具有施加的半导体芯片的第二层与第一层分离。

公开(公告)号：US20120319304A1

公开(公告)日：2012-12-20

申请号：US13595049

申请日：2012-08-27

Applicant: Klaus Pressel ,  Gottfried Beer

Inventor： Klaus Pressel ,  Gottfried Beer

IPC: H01L29/02 ,  H01L21/56

CPC classification number: G01P1/023 ,  B81B7/02 ,  B81B2207/092 ,  B81B2207/095 ,  B81C1/0023 ,  B81C2203/0154 ,  G01L9/0042 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/96 ,  H01L24/97 ,  H01L25/16 ,  H01L25/50 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2224/76155 ,  H01L2224/82039 ,  H01L2224/97 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H04R1/04 ,  H04R2201/003 ,  H01L2224/82 ,  H01L2224/29099 ,  H01L2924/00

Abstract: A semiconductor device and manufacturing method. One embodiment provides a semiconductor chip. An encapsulating material covers the semiconductor chip. A metal layer is over the semiconductor chip and the encapsulating material. At least one of a voltage generating unit and a display unit are rigidly attached to at least one of the encapsulating material and the metal layer.

Abstract translation: 半导体器件及其制造方法。 一个实施例提供了半导体芯片。 封装材料覆盖半导体芯片。 金属层在半导体芯片和封装材料之上。 电压产生单元和显示单元中的至少一个刚性地附接到至少一个封装材料和金属层。

公开(公告)号：US08334202B2

公开(公告)日：2012-12-18

申请号：US12611609

申请日：2009-11-03

Applicant: Jens Pohl ,  Hans-Joachim Barth ,  Gottfried Beer ,  Rainer Steiner ,  Werner Robl ,  Mathias Vaupel

Inventor： Jens Pohl ,  Hans-Joachim Barth ,  Gottfried Beer ,  Rainer Steiner ,  Werner Robl ,  Mathias Vaupel

IPC: H01L23/48

CPC classification number: H01L23/5389 ,  H01L21/486 ,  H01L21/76873 ,  H01L21/76879 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/82 ,  H01L24/97 ,  H01L2221/1089 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2924/00

Abstract: A method for fabricating a device includes providing a substrate including at least one contact and applying a dielectric layer over the substrate. The method includes applying a first seed layer over the dielectric layer, applying an inert layer over the seed layer, and structuring the inert layer, the first seed layer, and the dielectric layer to expose at least a portion of the contact. The method includes applying a second seed layer over exposed portions of the structured dielectric layer and the contact such that the second seed layer makes electrical contact with the structured first seed layer. The method includes electroplating a metal on the second seed layer.

Abstract translation: 一种用于制造器件的方法包括提供包括至少一个接触的衬底并在衬底上施加电介质层。 该方法包括在电介质层上施加第一种子层，在种子层上施加惰性层，以及构造惰性层，第一种子层和电介质层以暴露至少一部分接触。 该方法包括在结构化介电层和触点的暴露部分上施加第二种子层，使得第二籽晶层与结构化的第一籽晶层电接触。 该方法包括在第二种子层上电镀金属。

公开(公告)号：US08258624B2

公开(公告)日：2012-09-04

申请号：US11837211

申请日：2007-08-10

Applicant: Gottfried Beer ,  Irmgard Escher-Poeppel

Inventor： Gottfried Beer ,  Irmgard Escher-Poeppel

IPC: H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC classification number: H01L24/96 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/76879 ,  H01L23/3128 ,  H01L24/18 ,  H01L24/19 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2224/2919 ,  H01L2224/83856 ,  H01L2224/92144 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2924/0665 ,  H01L2924/00

Abstract: A method for fabricating a semiconductor chip module and a semiconductor chip package is disclosed. One embodiment provides a first layer, a second layer, and a base layer. The first layer is disposed on the base layer, and the second layer is disposed on the first layer. A plurality of semiconductor chips is applied above the second layer, and the second layer with the applied semiconductor chips is separated from the first layer.

公开(公告)号：US08212344B2

公开(公告)日：2012-07-03

申请号：US12891288

申请日：2010-09-27

Applicant: Gottfried Beer ,  Horst Theuss

Inventor： Gottfried Beer ,  Horst Theuss

IPC: H01L23/02

CPC classification number: B81C1/00333 ,  H01L23/293 ,  H01L23/3171 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/32225 ,  H01L2224/32265 ,  H01L2224/83193 ,  H01L2224/8385 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2924/01014 ,  H01L2224/83 ,  H01L2224/03 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/11

Abstract: One aspect of the invention relates to a semiconductor component with cavity structure and a method for producing the same. The semiconductor component has an active semiconductor chip with the microelectromechanical structure and a wiring structure on its top side. The microelectromechanical structure is surrounded by walls of at least one cavity. A covering, which covers the cavity, is arranged on the walls. The walls have a photolithographically patterned polymer. The covering has a layer with a polymer of identical type. In one case, the molecular chains of the polymer of the walls are crosslinked with the molecular chains of the polymer layer of the covering layer to form a dimensionally stable cavity housing.

Abstract translation: 本发明的一个方面涉及具有腔结构的半导体部件及其制造方法。 半导体部件具有微机电结构的有源半导体芯片及其顶侧的布线结构。 微机电结构由至少一个空腔的壁包围。 覆盖空腔的覆盖物布置在墙壁上。 墙壁具有光刻图案的聚合物。 覆盖物具有具有相同类型的聚合物的层。 在一种情况下，壁的聚合物的分子链与覆盖层的聚合物层的分子链交联以形成尺寸稳定的腔体。

公开(公告)号：US08119452B2

公开(公告)日：2012-02-21

申请号：US12353432

申请日：2009-01-14

Applicant: Gottfried Beer ,  Irmgard Escher-Poeppel

Inventor： Gottfried Beer ,  Irmgard Escher-Poeppel

IPC: H01L21/00

CPC classification number: H01L21/56 ,  H01L21/561 ,  H01L23/3121 ,  H01L24/97 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00

Abstract: One method includes fabricating a semiconductor device including providing a dielectric layer. At least one semiconductor chip is provided defining a first surface including contact elements and a second surface opposite to the first surface. The semiconductor chip is placed onto the dielectric layer with the first surface facing the dielectric layer. An encapsulant material is applied over the second surface of the semiconductor chip in a reel-to-reel process.

Abstract translation: 一种方法包括制造包括提供介电层的半导体器件。 提供至少一个半导体芯片，其限定包括接触元件的第一表面和与第一表面相对的第二表面。 半导体芯片被放置在电介质层上，第一表面面向电介质层。 密封剂材料以卷到盘的方式施加在半导体芯片的第二表面上。

公开(公告)号：US20110210450A1

公开(公告)日：2011-09-01

申请号：US13102452

申请日：2011-05-06

Applicant: Horst Theuss ,  Gottfried Beer

Inventor： Horst Theuss ,  Gottfried Beer

IPC: H01L23/48

CPC classification number: H01L21/568 ,  B81B7/007 ,  B81C2203/0109 ,  B81C2203/0154 ,  H01L21/561 ,  H01L23/3128 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/20 ,  H01L2224/24137 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2924/00

Abstract: A device comprising a chip, which is held in casting compound and on which a hollow structure is arranged is disclosed.

Abstract translation: 公开了一种包括芯片的装置，该芯片保持在铸造化合物中并且布置有中空结构。

公开(公告)号：US07858440B2

公开(公告)日：2010-12-28

申请号：US11859346

申请日：2007-09-21

Applicant: Klaus Pressel ,  Gottfried Beer

Inventor： Klaus Pressel ,  Gottfried Beer

IPC: H01L21/00 ,  H01L21/44 ,  H01L23/02 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L25/50 ,  B81C1/0023 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/04105 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24101 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82102 ,  H01L2224/97 ,  H01L2225/06527 ,  H01L2225/06548 ,  H01L2225/06582 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2224/81 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05599

Abstract: Stacked semiconductor chips are disclosed. One embodiment provides an array of first semiconductor chips, covering the array of the first semiconductor chips with a mold material, and placing an array of second semiconductor chips over the array of the first semiconductor chips. The thicknesses of the second semiconductor chips is reduced. The array of the first semiconductor chips are singulated by dividing the mold material.

Abstract translation: 公开了堆叠的半导体芯片。 一个实施例提供了利用模具材料覆盖第一半导体芯片的阵列的第一半导体芯片的阵列，以及将第二半导体芯片的阵列放置在第一半导体芯片的阵列上。 第二半导体芯片的厚度减小。 通过分割模具材料来分割第一半导体芯片的阵列。