公开(公告)号：US20160181138A1

公开(公告)日：2016-06-23

申请号：US14757589

申请日：2015-12-23

Applicant: Infineon Technologies AG

Inventor： Georg Meyer-Berg ,  Edward Fuergut ,  Joachim Mahler

IPC: H01L21/683 ,  H01L21/768 ,  H01L21/56 ,  H01L23/528 ,  H01L21/78

CPC classification number: H01L21/6835 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L24/94 ,  H01L24/96 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/2518 ,  H01L2224/32225 ,  H01L2224/94 ,  H01L2224/83

Abstract: Various embodiments provide method of manufacturing a semiconductor component, wherein the method comprises providing a layer stack comprising a carrier and a thinned wafer comprising a metallization layer on one side, wherein the thinned wafer is placed on a first side of the carrier; forming an encapsulation encapsulating the layer stack at least partially; and subsequently thinning the carrier from a second side of the carrier, wherein the second side is opposite to the first side of the carrier.

Abstract translation: 各种实施例提供制造半导体部件的方法，其中所述方法包括提供包括载体的层堆叠和在一侧上包括金属化层的薄化晶片，其中所述薄化晶片被放置在所述载体的第一侧上; 至少部分地形成封装所述层堆叠的封装; 随后从所述载体的第二侧使所述载体变薄，其中所述第二侧与所述载体的第一侧相对。

公开(公告)号：US09362193B2

公开(公告)日：2016-06-07

申请号：US13742456

申请日：2013-01-16

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Josef Hoeglauer ,  Juergen Schredl ,  Xaver Schloegel ,  Wolfram Hable ,  Manfred Mengel ,  Joachim Mahler ,  Khalil Hosseini

IPC: H01L23/373 ,  H01L23/29 ,  H01L21/56 ,  H01L23/31 ,  H01L23/06 ,  H01L23/495 ,  H01L23/00

Abstract: A chip arrangement is provided, the chip arrangement, including a carrier; at least one chip electrically connected to a carrier top side; an encapsulation material at least partially surrounding the at least one chip and the carrier top side, wherein the encapsulation material is formed on one or more lateral sides of the carrier; and a ceramic material disposed on a carrier bottom side, and on at least one side of the encapsulation material.

公开(公告)号：US09249014B2

公开(公告)日：2016-02-02

申请号：US13670390

申请日：2012-11-06

Applicant: Infineon Technologies AG

Inventor： Khalil Hosseini ,  Joachim Mahler ,  Georg Meyer-Berg

IPC: H05K1/00 ,  B81C3/00 ,  C09J7/00 ,  H01L21/306 ,  H01L21/58 ,  H01L29/30 ,  H01L23/31 ,  H01L21/302 ,  H01L23/495 ,  H01L29/06 ,  H01L21/268 ,  H01L23/00 ,  H01L23/14 ,  B82Y30/00

CPC classification number: B81C3/00 ,  B82Y30/00 ,  C09J7/00 ,  C09J2201/602 ,  H01L21/268 ,  H01L21/302 ,  H01L21/306 ,  H01L21/3065 ,  H01L23/145 ,  H01L23/147 ,  H01L23/3121 ,  H01L23/49513 ,  H01L24/03 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L29/0657 ,  H01L29/30 ,  H01L2224/03002 ,  H01L2224/03009 ,  H01L2224/03831 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05076 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05557 ,  H01L2224/05568 ,  H01L2224/05576 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/29005 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29439 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83365 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/15747 ,  H01L2924/181 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49146 ,  H01L2924/0665 ,  H01L2224/03 ,  H01L2924/206 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/05552

Abstract: An assembled component and a method for assembling a component are disclosed. In one embodiment the assembled component includes a component carrier, an attachment layer disposed on the component carrier and a component disposed on the attachment layer, the component having a nano-structured first main surface facing the component carrier.

Abstract translation: 公开了组装组件和组件组装方法。 在一个实施例中，组装的部件包括部件载体，设置在部件载体上的附接层和设置在附着层上的部件，该部件具有面向部件载体的纳米结构的第一主表面。

公开(公告)号：US20150123142A1

公开(公告)日：2015-05-07

申请号：US14595669

申请日：2015-01-13

Applicant: Infineon Technologies AG

Inventor： Joachim Mahler ,  Ralf Otremba ,  Hans-Joachim Shulze ,  Guenther Ruhl ,  Hans-Joerg Timme

IPC: H01L23/367 ,  H01L27/02 ,  H01L27/06 ,  H01L23/373 ,  H01L27/088

CPC classification number: H01L27/0248 ,  H01L23/3677 ,  H01L23/4275 ,  H01L23/525 ,  H01L27/0676 ,  H01L27/088 ,  H01L29/49 ,  H01L29/4983 ,  H01L29/7397 ,  H01L29/7813 ,  H01L29/8611 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A power semiconductor device includes a wiring structure adjoining at least one side of a semiconductor body and comprising at least one electrically conductive compound. The power semiconductor device further includes a cooling material in the wiring structure. The cooling material is characterized by a change in structure by means of absorption of energy at a temperature TC ranging between 150° C. and 400° C.

Abstract translation: 功率半导体器件包括邻接半导体主体的至少一侧并且包括至少一种导电化合物的布线结构。 功率半导体器件还包括布线结构中的冷却材料。 冷却材料的特征在于通过在150℃和400℃之间的温度TC下吸收能量而改变结构。

公开(公告)号：US20150028487A1

公开(公告)日：2015-01-29

申请号：US13951554

申请日：2013-07-26

Applicant: Infineon Technologies AG

Inventor： Georg Meyer-Berg ,  Joachim Mahler ,  Khalil Hosseini

IPC: H01L25/04

CPC classification number: H01L25/04 ,  H01L23/49861 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L25/16 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/24246 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00

Abstract: A chip package device includes an electrically conducting chip carrier, at least one semiconductor chip attached to the electrically conducting chip carrier, and an insulating laminate structure embedding the chip carrier, the at least one semiconductor chip and a passive electronic device. The passive electronic device includes a first structured electrically conducting layer, the first structured electrically conducting layer extending over a surface of the laminate structure.

Abstract translation: 芯片封装器件包括导电芯片载体，至少一个连接到导电芯片载体的半导体芯片，以及嵌入芯片载体，至少一个半导体芯片和无源电子器件的绝缘叠层结构。 无源电子器件包括第一结构导电层，第一结构化导电层在层压结构的表面上延伸。

公开(公告)号：US20140151862A1

公开(公告)日：2014-06-05

申请号：US14151917

申请日：2014-01-10

Applicant: Infineon Technologies AG

Inventor： Joachim Mahler ,  Edward Fuergut ,  Khalil Hosseini ,  Georg Meyer-Berg

IPC: H01L23/498 ,  H01L21/56

CPC classification number: H01L23/49811 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/5389 ,  H01L24/06 ,  H01L24/19 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/04026 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/014 ,  H01L2924/00

Abstract: A embedded integrated circuit package is provided, the embedded integrated circuit package including: at least one chip arranged over a chip carrier, the at least one chip including a plurality of chip contact pads; encapsulation material formed over the chip carrier and at least partially surrounding the at least one chip; a plurality of electrical interconnects formed through the encapsulation material, wherein each electrical interconnect is electrically connected to a chip contact pad; and a structure formed between the electrical interconnects of the embedded integrated circuit package, wherein the structure increases the creepage resistance between the electrical interconnects.

公开(公告)号：US20210082861A1

公开(公告)日：2021-03-18

申请号：US17090941

申请日：2020-11-06

Applicant: Infineon Technologies AG

Inventor： Joachim Mahler ,  Michael Bauer ,  Jochen Dangelmaier ,  Reimund Engl ,  Johann Gatterbauer ,  Frank Hille ,  Michael Huettinger ,  Werner Kanert ,  Heinrich Koerner ,  Brigitte Ruehle ,  Francisco Javier Santos Rodriguez ,  Antonio Vellei

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/29 ,  H01L21/02 ,  H01L23/495

Abstract: In various embodiments, a method of forming an electrical contact is provided. The method may include depositing, by atomic layer deposition, a passivation layer over at least a region of a metal surface, wherein the passivation layer may include aluminum oxide, and electrically contacting the region of the metal surface with a metal contact structure, wherein the metal contact structure may include copper.

公开(公告)号：US10670474B2

公开(公告)日：2020-06-02

申请号：US15369057

申请日：2016-12-05

Applicant: Infineon Technologies AG

Inventor： Christian Kegler ,  Johannes Georg Laven ,  Hans-Joachim Schulze ,  Guenther Ruhl ,  Joachim Mahler

IPC: G01K7/16 ,  H01L35/04 ,  H01L35/18 ,  H01L35/14 ,  H01L29/16 ,  H01L29/20

Abstract: Temperature sensor devices and corresponding methods are provided. A temperature sensor may include a first layer being essentially non-conductive in a temperature range and a second layer having a varying resistance in the temperature range.

公开(公告)号：US20190287875A1

公开(公告)日：2019-09-19

申请号：US16431808

申请日：2019-06-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Heinrich Koerner ,  Michael Bauer ,  Reimund ENGL ,  Michael Huettinger ,  Werner Kanert ,  Joachim Mahler ,  Brigitte Ruehle

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/495

Abstract: In various embodiments, methods for forming a chip package are provided. The chip package may include a chip comprising a chip metal surface, a metal contact structure electrically contacting the chip metal surface, a packaging material at least partially encapsulating the chip and the metal contact structure, and a chemical compound physically contacting the packaging material and at least one of the chip metal surface and the metal contact structure, wherein the chemical compound may be configured to improve an adhesion between the metal contact structure and the packaging material and/or between the chip metal surface and the packaging material, as compared with an adhesion in an arrangement without the chemical compound, wherein the chemical compound is essentially free from functional groups comprising sulfur, selenium or tellurium.

公开(公告)号：US20180040530A1

公开(公告)日：2018-02-08

申请号：US15663956

申请日：2017-07-31

Applicant: Infineon Technologies AG

Inventor： Joachim Mahler ,  Benjamin Reichert ,  Chen Wen Lee ,  Giovanni Ragasa Garbin ,  Peter Strobel

IPC: H01L23/29 ,  H01L23/00 ,  C08K3/36 ,  H01L21/56

CPC classification number: H01L23/49513 ,  H01L21/563 ,  H01L24/01 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/01 ,  H01L2224/04026 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05687 ,  H01L2224/27312 ,  H01L2224/2732 ,  H01L2224/29015 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29387 ,  H01L2224/32013 ,  H01L2224/32058 ,  H01L2224/32105 ,  H01L2224/32106 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/83192 ,  H01L2224/83385 ,  H01L2224/83424 ,  H01L2224/83439 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83464 ,  H01L2224/83815 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/83948 ,  H01L2225/06513 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01015 ,  H01L2924/0665 ,  H01L2924/05442 ,  H01L2924/00012

Abstract: A semiconductor device includes a carrier, a semiconductor die and a die attach material arranged between the carrier and the semiconductor die. A fillet height of the die attach material is less than about 95% of a height of the semiconductor die. A maximum extension of the die attach material over edges of a main surface of the semiconductor die facing the die attach material is less than about 200 micrometers.