公开(公告)号：US06943127B2

公开(公告)日：2005-09-13

申请号：US10302240

申请日：2002-11-22

申请人： Seon-Mee Cho ,  Peter Wai-Man Lee ,  Chi-I Lang ,  Dian Sugiarto ,  Chen-An Chen ,  Li-Qun Xia ,  Shankar Venkataraman ,  Ellie Yieh

发明人： Seon-Mee Cho ,  Peter Wai-Man Lee ,  Chi-I Lang ,  Dian Sugiarto ,  Chen-An Chen ,  Li-Qun Xia ,  Shankar Venkataraman ,  Ellie Yieh

IPC分类号： C23C16/30 ,  H01L21/316 ,  H01L21/42

CPC分类号： H01L21/02126 ,  C23C16/30 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/31633 ,  Y10S438/931 ,  Y10T428/31909

摘要： A low dielectric constant film having silicon-carbon bonds and dielectric constant of about 3.0 or less, preferably about 2.5 or less, is provided. The low dielectric constant film is deposited by reacting a cyclic organosilicon compound and an aliphatic organosilicon compound with an oxidizing gas while applying RF power. The carbon content of the deposited film is between about 10 and about 30 atomic percent excluding hydrogen atoms, and is preferably between about 10 and about 20 atomic percent excluding hydrogen atoms.

摘要翻译： 提供了具有约3.0或更小，优选约2.5或更小的硅 - 碳键和介电常数的低介电常数膜。 通过使环状有机硅化合物和脂族有机硅化合物与氧化气体反应同时施加RF功率来沉积低介电常数膜。 沉积膜的碳含量除氢原子以外约为10至约30原子百分比，优选除氢原子之外约10至约20原子％。

公开(公告)号：US06932092B2

公开(公告)日：2005-08-23

申请号：US10302350

申请日：2002-11-22

申请人： Juan Carlos Rocha-Alvarez ,  Maosheng Zhao ,  Shankar Venkataraman

发明人： Juan Carlos Rocha-Alvarez ,  Maosheng Zhao ,  Shankar Venkataraman

IPC分类号： B08B6/00 ,  B08B7/00 ,  C23C16/44 ,  C25F1/00

CPC分类号： H01J37/32862 ,  B08B7/0035 ,  C23C16/4405 ,  Y10S134/902 ,  Y10S438/905

摘要： A method for cleaning a plasma enhanced chemical vapor deposition chamber. The method includes introducing a cleaning gas into the plasma enhanced chemical vapor deposition chamber, forming a plasma using a very high frequency (VHF) power having a frequency in a range from about 20 MHz to about 100 MHz, and reacting the cleaning gas with deposits within the chamber in the presence of the plasma.

摘要翻译： 一种用于清洁等离子体增强化学气相沉积室的方法。 该方法包括将清洁气体引入等离子体增强化学气相沉积室中，使用频率在约20MHz至约100MHz范围内的非常高频（VHF）功率形成等离子体，并使清洗气体与沉积物 在等离子体存在下的室内。

公开(公告)号：US06902629B2

公开(公告)日：2005-06-07

申请号：US10122481

申请日：2002-04-12

申请人： Yi Zheng ,  Vinita Singh ,  Srinivas D. Nemani ,  Chen-An Chen ,  Ju-Hyung Lee ,  Shankar Venkataraman

发明人： Yi Zheng ,  Vinita Singh ,  Srinivas D. Nemani ,  Chen-An Chen ,  Ju-Hyung Lee ,  Shankar Venkataraman

IPC分类号： B08B7/00 ,  C23C16/44 ,  B08B5/00

CPC分类号： C23C16/4405 ,  B08B7/00 ,  Y10S134/902 ,  Y10S438/905

摘要： Methods and apparatus for cleaning deposition chambers are presented. The cleaning methods include the use of a remote plasma source to generate reactive species from a cleaning gas to clean deposition chambers. A flow of helium or argon may be used during chamber cleaning. Radio frequency power may also be used in combination with a remote plasma source to clean deposition chambers.

公开(公告)号：US06874014B2

公开(公告)日：2005-03-29

申请号：US09865605

申请日：2001-05-29

申请人： Stephen E. Richardson ,  Gary Vondran ,  Stuart Siu ,  Paul Keltcher ,  Shankar Venkataraman ,  Padmanabha Venkitakrishnan ,  Joseph Ku

发明人： Stephen E. Richardson ,  Gary Vondran ,  Stuart Siu ,  Paul Keltcher ,  Shankar Venkataraman ,  Padmanabha Venkitakrishnan ,  Joseph Ku

IPC分类号： G06F9/50 ,  G06F15/167 ,  G06F11/00

CPC分类号： G06F9/5077 ,  G06F15/167 ,  Y02D10/22 ,  Y02D10/36

摘要： Multiple processors are mounted on a single die. The die is connected to a memory storing multiple operating systems or images of multiple operating systems. Each of the processors or a group of one or more of the processors is operable to execute a distinct one of the multiple operating systems. Therefore, resources for a single operating system may be dedicated to one processor or a group of processors. Consequently, a large number of processors mounted on a single die can operate efficiently.

摘要翻译： 多个处理器安装在单个管芯上。 模具连接到存储多个操作系统或多个操作系统的映像的存储器。 每个处理器或一组或多个处理器可操作以执行多个操作系统中不同的一个。 因此，用于单个操作系统的资源可以专用于一个处理器或一组处理器。 因此，安装在单个管芯上的大量处理器可以有效地工作。

公开(公告)号：US06537733B2

公开(公告)日：2003-03-25

申请号：US09793818

申请日：2001-02-23

申请人： Francimar Campana ,  Srinivas Nemani ,  Michael Chapin ,  Shankar Venkataraman

发明人： Francimar Campana ,  Srinivas Nemani ,  Michael Chapin ,  Shankar Venkataraman

IPC分类号： C23C1632

CPC分类号： H01L21/02167 ,  C23C16/36 ,  H01L21/02205 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/0234 ,  H01L21/0276 ,  H01L21/31144 ,  H01L21/314 ,  H01L21/76808 ,  H01L21/76813 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76834 ,  H01L2221/1031

摘要： A method of forming a silicon carbide layer for use in integrated circuits is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a nitrogen source in the presence of an electric field. The as-deposited silicon carbide layer incorporates nitrogen therein from the nitrogen source.

公开(公告)号：US06413583B1

公开(公告)日：2002-07-02

申请号：US09338470

申请日：1999-06-22

申请人： Farhad K. Moghadam ,  David W. Cheung ,  Ellie Yieh ,  Li-Qun Xia ,  Wai-Fan Yau ,  Chi-I Lang ,  Shin-Puu Jeng ,  Frederic Gaillard ,  Shankar Venkataraman ,  Srinivas Nemani

发明人： Farhad K. Moghadam ,  David W. Cheung ,  Ellie Yieh ,  Li-Qun Xia ,  Wai-Fan Yau ,  Chi-I Lang ,  Shin-Puu Jeng ,  Frederic Gaillard ,  Shankar Venkataraman ,  Srinivas Nemani

IPC分类号： C23C1640

CPC分类号： H01L21/02126 ,  C23C16/401 ,  H01L21/02203 ,  H01L21/02208 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/31053 ,  H01L21/3122 ,  H01L21/31604 ,  H01L21/31612 ,  H01L21/76828 ,  H01L21/76834

摘要： A method for depositing silicon oxide layers having a low dielectric constant by reaction of an organosilicon compound and a hydroxyl forming compound at a substrate temperature less than about 400° C. The low dielectric constant films contain residual carbon and are useful for gap fill layers, pre-metal dielectric layers, inter-metal dielectric layers, and shallow trench isolation dielectric layers in sub-micron devices. The hydroxyl compound can be prepared prior to deposition from water or an organic compound. The silicon oxide layers are preferably deposited at a substrate temperature less than about 40° C. onto a liner layer produced from the organosilicon compound to provide gap fill layers having a dielectric constant less than about 3.0.

摘要翻译： 一种通过在低于约400℃的衬底温度下通过有机硅化合物和羟基形成化合物的反应沉积低介电常数的氧化硅层的方法。低介电常数膜含有残余碳并可用于间隙填充层， 预金属介电层，金属间介电层和亚微米器件中的浅沟槽隔离电介质层。 羟基化合物可以在从水或有机化合物沉积之前制备。 氧化硅层优选在低于约40℃的衬底温度下沉积到由有机硅化合物制备的衬里层上，以提供介电常数小于约3.0的间隙填充层。

公开(公告)号：US09285168B2

公开(公告)日：2016-03-15

申请号：US13247687

申请日：2011-09-28

申请人： Dmitry Lubomirsky ,  Jay D. Pinson, II ,  Kirby H. Floyd ,  Adib Khan ,  Shankar Venkataraman

发明人： Dmitry Lubomirsky ,  Jay D. Pinson, II ,  Kirby H. Floyd ,  Adib Khan ,  Shankar Venkataraman

IPC分类号： F26B25/00 ,  H01L21/67 ,  H01L21/02 ,  H01L21/3105 ,  C23C16/40 ,  C23C16/56

CPC分类号： F26B25/004 ,  C23C16/401 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02337 ,  H01L21/3105 ,  H01L21/67178 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67207

摘要： A substrate processing system that has a plurality of deposition chambers, and one or more robotic arms for moving a substrate between one or more of a deposition chamber, load lock holding area, and a curing and treatment module. The substrate curing and treatment module is attached to the load-lock substrate holding area, and may include: The curing chamber for curing a dielectric layer in an atmosphere comprising ozone, and a treatment chamber for treating the cured dielectric layer in an atmosphere comprising water vapor. The chambers may be vertically aligned, have one or more access doors, and may include a heating system to adjust the curing and/or heating chambers between two or more temperatures respectively.

摘要翻译： 具有多个沉积室的基板处理系统和用于在沉积室，加载锁定保持区域和固化和处理模块中的一个或多个之间移动基板的一个或多个机器人臂。 衬底固化和处理模块附接到负载锁定衬底保持区域，并且可以包括：用于在包含臭氧的气氛中固化电介质层的固化室，以及用于在包含水的气氛中处理固化的电介质层的处理室 汽。 腔室可以垂直对准，具有一个或多个通道门，并且可以包括加热系统，以分别在两个或更多个温度之间调节固化和/或加热室。

公开(公告)号：US20130149462A1

公开(公告)日：2013-06-13

申请号：US13494341

申请日：2012-06-12

申请人： Jingmei Liang ,  Xiaolin Chen ,  Nitin K. Ingle ,  Shankar Venkataraman

发明人： Jingmei Liang ,  Xiaolin Chen ,  Nitin K. Ingle ,  Shankar Venkataraman

IPC分类号： C23C16/40

CPC分类号： C23C16/401 ,  C23C16/345 ,  C23C16/452 ,  C23C16/45514 ,  C23C16/45565 ,  C23C16/505 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02274

摘要： A method of forming a dielectric layer is described. The method first deposits a silicon-nitrogen-and-hydrogen-containing (polysilazane) layer by radical-component chemical vapor deposition (CVD). The silicon-nitrogen-and-hydrogen-containing layer is formed by combining a radical precursor (excited in a remote plasma) with an unexcited carbon-free silicon precursor. A silicon oxide capping layer may be formed from a portion of the carbon-free silicon-nitrogen-and-hydrogen-containing layer to avoid time-evolution of underlying layer properties prior to conversion into silicon oxide. Alternatively, the silicon oxide capping layer is formed over the silicon-nitrogen-and-hydrogen-containing layer. Either method of formation involves the formation of a local plasma within the substrate processing region.

摘要翻译： 描述形成电介质层的方法。 该方法首先通过自由基组分化学气相沉积（CVD）沉积含硅氮和氢的（聚硅氮烷）层。 通过将自由基前体（在远程等离子体中激发）与未煅烧的无碳硅前体组合而形成含硅和氮的层。 氧化硅覆盖层可以由一部分无碳硅 - 含氮和氢的层形成，以避免在转化成氧化硅之前下层性质的时间演变。 或者，氧化硅覆盖层形成在含硅 - 氮和氢的层之上。 任一种形成方法都涉及在衬底处理区域内形成局部等离子体。

公开(公告)号：US08435902B2

公开(公告)日：2013-05-07

申请号：US12959155

申请日：2010-12-02

申请人： Jing Tang ,  Nitin Ingle ,  Dongqing Yang ,  Shankar Venkataraman

发明人： Jing Tang ,  Nitin Ingle ,  Dongqing Yang ,  Shankar Venkataraman

IPC分类号： H01L21/302 ,  H01L21/461 ,  H01L21/311 ,  C23F3/00

CPC分类号： H01L21/31116 ,  H01J37/32091

摘要： A method of etching silicon oxide from a narrow trench and a wide trench (or open area) is described which allows the etch in the wide trench to progress further than the etch in the narrow trench. The method includes two dry etch cycles. The first dry etch cycle involves a low intensity or abbreviated sublimation step which leaves solid residue in the narrow trench. The remaining solid residue inhibits etch progress in the narrow trench during the second dry etch cycle allowing the etch in the wide trench to overtake the etch in the narrow trench.

摘要翻译： 描述了从窄沟槽和宽沟槽（或开放区域）中蚀刻氧化硅的方法，其允许宽沟槽中的蚀刻比窄沟槽中的蚀刻进一步进行。 该方法包括两个干蚀刻循环。 第一干蚀刻循环涉及低强度或缩写升华步骤，其在窄沟槽中留下固体残留物。 剩余的固体残余物在第二干蚀刻循环期间抑制窄沟槽中的蚀刻进程，允许宽沟槽中的蚀刻超过窄沟槽中的蚀刻。

公开(公告)号：US08329587B2

公开(公告)日：2012-12-11

申请号：US12787791

申请日：2010-05-26

申请人： Jingmei Liang ,  Nitin K. Ingle ,  Shankar Venkataraman

发明人： Jingmei Liang ,  Nitin K. Ingle ,  Shankar Venkataraman

IPC分类号： H01L21/311

CPC分类号： H01L21/3105 ,  C23C16/345 ,  C23C16/452 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/02337 ,  H01L21/31055 ,  H01L21/316 ,  H01L21/67207 ,  H01L21/76229

摘要： Processes for forming high density gap-filling silicon oxide on a patterned substrate are described. The processes increase the density of gap-filling silicon oxide particularly in narrow trenches. The density may also be increased in wide trenches and recessed open areas. The densities of the gap-filling silicon oxide in the narrow and wide trenches/open areas become more similar following the treatment which allows the etch rates to match more closely. This effect may also be described as a reduction in the pattern loading effect. The process involves forming then planarizing silicon oxide. Planarization exposes a new dielectric interface disposed closer to the narrow trenches. The newly exposed interface facilitates a densification treatment by annealing and/or exposing the planarized surface to a plasma.

摘要翻译： 描述了在图案化衬底上形成高密度间隙填充氧化硅的工艺。 这些工艺增加了间隙填充氧化硅的密度，特别是在狭窄的沟槽中。 在宽的沟槽和凹入的开放区域中，密度也可以增加。 狭缝和宽沟槽/开放区域中填充间隙的氧化硅的密度在处理之后变得更加相似，这允许蚀刻速率更紧密地匹配。 这种效果也可以被描述为模式加载效应的降低。 该方法涉及形成二氧化硅平坦化。 平面化暴露出更靠近窄沟槽设置的新介质界面。 新暴露的界面通过将平坦化表面退火和/或暴露于等离子体来促进致密化处理。