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    Method for forming an extended metal gate using a damascene process
    41.
    发明授权
    Method for forming an extended metal gate using a damascene process 有权
    使用镶嵌工艺形成延伸金属浇口的方法

    公开(公告)号：US06303447B1

    公开(公告)日：2001-10-16

    申请号：US09502036

    申请日：2000-02-11

    申请人： Vijai Komar Chhagan ,  Yelehanka Ramachandramurthy Pradeep ,  Mei Sheng Zhou ,  Henry Gerung ,  Simon Chooi

    发明人： Vijai Komar Chhagan ,  Yelehanka Ramachandramurthy Pradeep ,  Mei Sheng Zhou ,  Henry Gerung ,  Simon Chooi

    IPC分类号： H01L21336

    CPC分类号： H01L29/66545 ,  H01L21/28044 ,  H01L21/28114 ,  H01L29/41 ,  H01L29/42376 ,  H01L29/4941

    摘要： A method for forming an extended metal gate without poly wrap around effects. A semiconductor structure is provided having a gate structure thereon. The gate structure comprising a gate dielectric layer, a gate silicon layer, a doped silicon oxide layer, and a disposable gate layer stacked sequentially. Spacers are formed on the sidewalls of the gate structure. A dielectric gapfill layer is formed over the semiconductor structure and the gate structure and planarized, stopping on the disposable gate layer. A first silicon nitride layer is formed over the disposable gate layer, and a dielectric layer is formed over the first silicon nitride layer. The dielectric layer is patterned to form a trench over the gate structure; wherein the trench has a width greater than the width of the gate structure. The first silicon nitride layer in the bottom of the trench and the disposable gate layer are removed using one or more selective etching processes. The doped silicon oxide layer is removed using an etch with a high selectivity of doped silicon oxide to undoped silicon oxide. A barrier layer is formed over the gate silicon layer, and a metal gate layer is formed on the barrier layer; whereby the metal gate layer has a greater width than the gate structure.

    摘要翻译： 一种用于形成不具有聚环绕效应的延伸金属栅极的方法。 提供其上具有栅极结构的半导体结构。 栅极结构包括依次堆叠的栅极介电层，栅极硅层，掺杂氧化硅层和一次性栅极层。 隔板形成在栅极结构的侧壁上。 在半导体结构和栅极结构之上形成电介质间隙填充层，并在一次性栅极层上停止平坦化。 在一次性栅极层上形成第一氮化硅层，并且在第一氮化硅层上形成电介质层。 图案化电介质层以在栅极结构上形成沟槽; 其中所述沟槽的宽度大于所述栅极结构的宽度。 使用一个或多个选择性蚀刻工艺去除沟槽底部中的第一氮化硅层和一次性栅极层。 使用掺杂的氧化硅对未掺杂的氧化硅具有高选择性的蚀刻来去除掺杂的氧化硅层。 在栅极硅层上形成阻挡层，在阻挡层上形成金属栅极层; 由此金属栅极层具有比栅极结构更大的宽度。

    Method of using silicon rich carbide as a barrier material for fluorinated materials
    42.
    发明授权
    Method of using silicon rich carbide as a barrier material for fluorinated materials 失效
    使用富碳化碳作为氟化材料的阻挡材料的方法

    公开(公告)号：US06730591B2

    公开(公告)日：2004-05-04

    申请号：US10186532

    申请日：2002-07-01

    申请人： Licheng Han ,  Xu Yi ,  Simon Chooi ,  Mei Sheng Zhou ,  Joseph Zhifeng Xie

    发明人： Licheng Han ,  Xu Yi ,  Simon Chooi ,  Mei Sheng Zhou ,  Joseph Zhifeng Xie

    IPC分类号： H01L214763

    CPC分类号： H01L21/76834 ,  H01L21/02167 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3127 ,  H01L21/314 ,  H01L21/31629 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/76831 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  Y10S438/931 ,  H01L2924/00

    摘要： A method of forming interconnect structures in a semiconductor device, comprising the following steps. A semiconductor structure is provided. In the first embodiment, at least one metal line is formed over the semiconductor structure. A silicon-rich carbide barrier layer is formed over the metal line and semiconductor structure. Finally, a dielectric layer, that may be fluorinated, is formed over the silicon-rich carbide layer. In the second embodiment, at least one fluorinated dielectric layer, that may be fluorinated, is formed over the semiconductor structure. The dielectric layer is patterned to form an opening therein. A silicon-rich carbide barrier layer is formed within the opening. A metallization layer is deposited over the structure, filling the silicon-rich carbide barrier layer lined opening. Finally, the metallization layer may be planarized to form a planarized metal structure within the silicon-rich carbide barrier layer lined opening.

    摘要翻译： 一种在半导体器件中形成互连结构的方法，包括以下步骤。 提供半导体结构。 在第一实施例中，在半导体结构上形成至少一条金属线。 在金属线和半导体结构之上形成富含碳的碳化物阻挡层。 最后，在富含硅的碳化物层上形成可被氟化的介电层。 在第二实施例中，在半导体结构上形成至少一个可被氟化的氟化介电层。 图案化电介质层以在其中形成开口。 在开口内形成富含碳的碳化物阻挡层。 在结构上沉积金属化层，填充富含硅的碳化物阻挡层衬里的开口。 最后，金属化层可以被平坦化以在富含硅的碳化物阻挡层衬里的开口内形成平坦化的金属结构。

    Method to improve etching of organic-based, low dielectric constant materials
    43.
    发明授权
    Method to improve etching of organic-based, low dielectric constant materials 失效
    改善有机系低介电常数材料蚀刻的方法

    公开(公告)号：US06524963B1

    公开(公告)日：2003-02-25

    申请号：US09421510

    申请日：1999-10-20

    申请人： Mei Sheng Zhou ,  Simon Chooi ,  Jian Xun Li

    发明人： Mei Sheng Zhou ,  Simon Chooi ,  Jian Xun Li

    IPC分类号： H01L21302

    CPC分类号： H01L21/31116 ,  H01L21/02118 ,  H01L21/0212 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02271 ,  H01L21/31138 ,  H01L21/312 ,  H01L21/76802

    摘要： A method etching an organic-based, low dielectric constant material in the manufacture of an integrated circuit device has been achieved. Organic materials without silicon and organic materials without fluorine can be etched by using, for example, hydrazine or ammonia gas. Organic materials with silicon can also be etched with the addition of a fluorine-containing or chlorine-containing gas. A semiconductor substrate is provided. A low dielectric constant organic-based material is deposited overlying the semiconductor substrate. The low dielectric constant organic-based material is etched to form desirable features using a plasma containing a gas comprising a nitrogen and hydrogen containing molecule, and the integrated circuit device is completed.

    摘要翻译： 已经实现了在制造集成电路器件中蚀刻有机基低介电常数材料的方法。 不含硅的有机材料和无氟的有机材料可以通过使用例如肼或氨气进行蚀刻。 也可以通过添加含氟或含氯气体来蚀刻具有硅的有机材料。 提供半导体衬底。 沉积在半导体衬底上的低介电常数有机基材料。 使用包含含有氮和氢的分子的气体的等离子体来蚀刻低介电常数有机基材料以形成期望的特征，并且完成集成电路器件。

    Post metal etch photoresist strip method
    45.
    发明授权
    Post metal etch photoresist strip method 失效
    后金属蚀刻光刻胶剥离法

    公开(公告)号：US06271115B1

    公开(公告)日：2001-08-07

    申请号：US09604065

    申请日：2000-06-26

    申请人： Wen Jun Liu ,  Simon Chooi ,  Mei Sheng Zhou ,  Raymond Joy

    发明人： Wen Jun Liu ,  Simon Chooi ,  Mei Sheng Zhou ,  Raymond Joy

    IPC分类号： H01L214763

    CPC分类号： H01L21/02071

    摘要： An improved method for removing a photoresist mask from an etched aluminum pattern after etching the pattern in a chlorine containing plasma has been developed. The method is a five step process, in which the first step is in a microwave generated plasma containing O2 and H2O; the second step is in a microwave generated plasma containing O2 and N2; the third step is in a microwave generated plasma containing H2O; the fourth step is in a microwave generated plasma containing O2 and N2; and the fifth step is in a microwave generated plasma containing H2O. The first step which initiates removal of photoresist while simultaneously beginning the passivation process causes residue-free removal of photoresist following etching of aluminum or aluminum-copper layers in chlorine bearing etchants.

    摘要翻译： 已经开发了一种用于在含氯等离子体中蚀刻图案之后从蚀刻铝图案去除光致抗蚀剂掩模的改进方法。 该方法是五步法，其中第一步是在微波产生的含有O 2和H 2 O的等离子体中; 第二步是在微波产生的含有O2和N2的等离子体中; 第三步是在微波产生的含有H 2 O的等离子体中; 第四步是在微波产生的含有O2和N2的等离子体中; 并且第五步是在含有H 2 O的微波产生的等离子体中。 在同时开始钝化过程的同时开始除去光致抗蚀剂的第一步骤在蚀刻含氯蚀刻剂中的铝或铝 - 铜层之后会导致残留物去除光致抗蚀剂。

    Dual metal-oxide layer as air bridge
    46.
    发明授权
    Dual metal-oxide layer as air bridge 有权
    双金属氧化物层作为气桥

    公开(公告)号：US06261942B1

    公开(公告)日：2001-07-17

    申请号：US09490156

    申请日：2000-01-24

    申请人： Mei Sheng Zhou ,  Simon Chooi ,  Xu Yi

    发明人： Mei Sheng Zhou ,  Simon Chooi ,  Xu Yi

    IPC分类号： H01L214763

    CPC分类号： H01L21/7682 ,  H01L21/312 ,  H01L23/5222 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method for introducing air into the gaps between neighboring conducting structures in a microelectronics fabrication in order to reduce the capacitative coupling between them. A patterned metal layer is deposited on a substrate. The layer is lined with a CVD-oxide. A disposable gap-filling material is deposited over the lined metal layer. A two layer “air-bridge” is formed over the gap-fill by depositing a layer of TiN over a layer of CVD-oxide. This structure is rendered porous by several chemical processes. An oxygen plasma is passed through the porous air-bridge to react with and dissolve the gap-fill beneath it. The reaction products escape through the porous air-bridge resulting in air-filled gaps.

    摘要翻译： 一种在微电子制造中将空气引入相邻导电结构之间的间隙中以减少它们之间的电容耦合的方法。 图案化的金属层沉积在基底上。 该层衬有CVD氧化物。 一次性间隙填充材料沉积在衬里的金属层上。 通过在CVD氧化物层上沉积TiN层，在间隙填充上形成两层“空气桥”。 这种结构通过几种化学方法使其多孔化。 氧气等离子体通过多孔空气桥与其下方的间隙填充反应并溶解。 反应产物通过多孔气桥逸出，导致空气填充的间隙。

    Poly(arylene ether) dielectrics
    47.
    发明授权
    Poly(arylene ether) dielectrics 失效
    聚（亚芳基醚）电介质

    公开(公告)号：US07071281B2

    公开(公告)日：2006-07-04

    申请号：US11028773

    申请日：2005-01-04

    申请人： Christopher Lim ,  Siu Choon Ng ,  Hardy Chan ,  Simon Chooi ,  Mei Sheng Zhou

    发明人： Christopher Lim ,  Siu Choon Ng ,  Hardy Chan ,  Simon Chooi ,  Mei Sheng Zhou

    IPC分类号： C08G65/00

    CPC分类号： C08G65/40 ,  C08G65/4006 ,  Y10T428/17 ,  Y10T428/31678

    摘要： The present invention relates to poly(arylene ethers) used as low k dielectric layers in electronic applications and articles containing such poly(arylene ethers) comprising the structure: wherein n=5 to 10000 and monovalent Ar1 and divalent Ar2 are selected from a group of heteroaromatic compounds that incorporate O, N, Se, S, or Te or combinations of the aforesaid elements, including but not limited to:

    摘要翻译： 本发明涉及在电子应用中用作低k电介质层的聚（亚芳基醚）和含有这种聚（亚芳基醚）的制品，其包含以下结构：其中n = 5至10000和一价Ar 1和 二价Ar 2 H 2选自一组包含O，N，Se，S或Te的杂芳族化合物或上述组分的组合，包括但不限于：

    Endpoint detection and novel chemicals in copper stripping
    49.
    发明授权
    Endpoint detection and novel chemicals in copper stripping 失效
    铜剥离中的端点检测和新型化学品

    公开(公告)号：US06419754B1

    公开(公告)日：2002-07-16

    申请号：US09376426

    申请日：1999-08-18

    申请人： Simon Chooi ,  Mei Sheng Zhou

    发明人： Simon Chooi ,  Mei Sheng Zhou

    IPC分类号： C23G116

    CPC分类号： G01N21/31 ,  C23F1/00 ,  G01N21/85 ,  H01L21/32134 ,  H01L22/26 ,  Y10T436/12

    摘要： An endpoint detection system for copper stripping using a colorimetric analysis of the change in concentration of a component is described. Wet copper stripping chemicals are used to strip copper from a wafer whereby an eluent is produced. The eluent is continuously analyzed by colorimetric analysis for the presence of copper. The copper stripping process is stopped when the presence of copper is no longer detected. Also novel compounds or chemicals for use in an endpoint detection system for copper stripping using a colorimetric analysis of the change in concentration of the novel compounds or chemicals are described. A composition of matter that serves as an indicator of the presence of copper by colorimetric analysis comprises: 1) Fast Sulphon Black F indicator and an ammonium ion-containing solution or 2) a complexing agent, comprising a diamine, an amine macrocycle, or a monoamine.

    摘要翻译： 描述了使用对组分浓度变化的比色分析进行铜剥离的端点检测系统。 湿铜剥离化学品用于从晶片剥离铜，从而产生洗脱液。 通过比色分析连续分析洗脱液是否存在铜。 当不再检测到铜的存在时，铜剥离过程停止。 还描述了用于铜剥离终点检测系统的新型化合物或化学品，其使用对新化合物或化学品的浓度变化的比色分析。 通过比色分析作为铜存在指标的物质组成包括：1）快速磺化黑F指示剂和含铵离子的溶液或2）络合剂，其包含二胺，胺大环化合物或 单胺

    Method to form zirconium oxide and hafnium oxide for high dielectric constant materials
    50.
    发明授权
    Method to form zirconium oxide and hafnium oxide for high dielectric constant materials 失效
    用于高介电常数材料形成氧化锆和氧化铪的方法

    公开(公告)号：US06486080B2

    公开(公告)日：2002-11-26

    申请号：US09726656

    申请日：2000-11-30

    申请人： Simon Chooi ,  Wenhe Lin ,  Mei Sheng Zhou

    发明人： Simon Chooi ,  Wenhe Lin ,  Mei Sheng Zhou

    IPC分类号： H01L2131

    CPC分类号： H01L21/02271 ,  C23C16/405 ,  C23C16/56 ,  H01L21/02181 ,  H01L21/02189 ,  H01L21/31604 ,  H01L21/31691

    摘要： A new method of forming a metal oxide high dielectric constant layer in the manufacture of an integrated circuit device has been achieved. A substrate is provided. A metal oxide layer is deposited overlying the substrate by reacting a precursor with an oxidant gas in a chemical vapor deposition chamber. The metal oxide layer may comprise hafnium oxide or zirconium oxide. The precursor may comprise metal alkoxide, metal alkoxide containing halogen, metal &bgr;-diketonate, metal fluorinated &bgr;-diketonate, metal oxoacid, metal acetate, or metal alkene. The metal oxide layer is annealed to cause densification and to complete the formation of the metal oxide dielectric layer in the manufacture of the integrated circuit device. A composite metal oxide-silicon oxide (MO2-SiO2) high dielectric constant layer may be deposited using a precursor comprising metal tetrasiloxane.

    摘要翻译： 已经实现了在制造集成电路器件中形成金属氧化物高介电常数层的新方法。 提供基板。 通过在化学气相沉积室中使前体与氧化剂气体反应而沉积在衬底上的金属氧化物层。 金属氧化物层可以包括氧化铪或氧化锆。 前体可以包含金属醇盐，含有卤素的金属醇盐，β-二酮金属，氟化β-二酮金属，金属氧代酸，金属乙酸盐或金属烯烃。 在集成电路器件的制造中，对金属氧化物层进行退火以致致密化并完成金属氧化物介电层的形成。 可以使用包含金属四硅氧烷的前体来沉积复合金属氧化物 - 氧化硅（MO2-SiO2）高介电常数层。