公开(公告)号：US20150235865A1

公开(公告)日：2015-08-20

申请号：US14703299

申请日：2015-05-04

Applicant: Applied Materials, Inc.

Inventor： Anchuan Wang ,  Xinglong Chen ,  Zihui Li ,  Hiroshi Hamana ,  Zhijun Chen ,  Ching-Mei Hsu ,  Jiayin Huang ,  Nitin K. Ingle ,  Dmitry Lubomirsky ,  Shankar Venkataraman ,  Randhir Thakur

IPC: H01L21/324 ,  H01L21/306 ,  H01L21/311 ,  H01L21/3065

CPC classification number: H01L21/324 ,  C23C16/4405 ,  H01J37/32357 ,  H01J37/32862 ,  H01L21/02041 ,  H01L21/02057 ,  H01L21/0206 ,  H01L21/263 ,  H01L21/2686 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/67069 ,  H01L21/67075 ,  H01L21/6708 ,  H01L21/67109 ,  H01L21/67115 ,  H01L21/67184 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67207 ,  H01L21/67248 ,  H01L21/67253 ,  H01L21/67288 ,  H01L21/67703 ,  H01L21/67739 ,  H01L21/67742 ,  H01L21/6831

Abstract: Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools.

Abstract translation: 提供系统，室和过程以控制由水分污染引起的过程缺陷。 这些系统可以提供腔室的配置，以在真空或受控环境中执行多个操作。 腔室可以包括在组合腔室设计中提供附加处理能力的构造。 这些方法可以提供由系统工具执行的蚀刻工艺可能引起的老化缺陷的限制，预防和校正。

公开(公告)号：US08956980B1

公开(公告)日：2015-02-17

申请号：US14089182

申请日：2013-11-25

Applicant: Applied Materials, Inc.

Inventor： Zhijun Chen ,  Zihui Li ,  Anchuan Wang ,  Nitin K. Ingle ,  Shankar Venkataraman

IPC: H01L21/302 ,  H01L21/461 ,  H01L21/311

CPC classification number: H01L21/02205 ,  H01J37/32357 ,  H01J2237/334 ,  H01L21/3065 ,  H01L21/31116

Abstract: A method of etching silicon nitride on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor and a nitrogen-and-oxygen-containing precursor. Plasma effluents from two remote plasmas are flowed into a substrate processing region where the plasma effluents react with the silicon nitride. The plasmas effluents react with the patterned heterogeneous structures to selectively remove silicon nitride while very slowly removing silicon, such as polysilicon. The silicon nitride selectivity results partly from the introduction of fluorine-containing precursor and nitrogen-and-oxygen-containing precursor using distinct (but possibly overlapping) plasma pathways which may be in series or in parallel.

Abstract translation: 描述了在图案化的异质结构上蚀刻氮化硅的方法，并且包括由含氟前体和含氮和氧的前体形成的远程等离子体蚀刻。 来自两个远程等离子体的等离子体流出物流入基板处理区域，其中等离子体流出物与氮化硅反应。 等离子体流出物与图案化的异质结构反应以选择性地去除氮化硅，同时非常缓慢地除去硅，例如多晶硅。 氮化硅选择性部分取决于使用可能是串联或并联的不同（但可能重叠的）等离子体途径引入含氟前体和含氮和氧的前体。

公开(公告)号：US20140097270A1

公开(公告)日：2014-04-10

申请号：US13799840

申请日：2013-03-13

Applicant: Applied Materials, Inc.

Inventor： Qiwei Liang ,  Xinglong Chen ,  Kien Chuc ,  Dmitry Lubomirsky ,  Soonam Park ,  Jang-Gyoo Yang ,  Shankar Venkataraman ,  Toan Tran ,  Kimberly Hinckley ,  Saurabh Garg

IPC: B05B1/00

CPC classification number: H01J37/32449 ,  B05B1/005 ,  B05B1/18 ,  C23C16/452 ,  C23C16/455 ,  C23C16/45561 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/45582 ,  C23C16/50 ,  H01J37/32009 ,  H01J37/32357 ,  H01J37/3244 ,  H01J37/32568 ,  H01J2237/002 ,  H01L21/67069

Abstract: Gas distribution assemblies are described including an annular body, an upper plate, and a lower plate. The upper plate may define a first plurality of apertures, and the lower plate may define a second and third plurality of apertures. The upper and lower plates may be coupled with one another and the annular body such that the first and second apertures produce channels through the gas distribution assemblies, and a volume is defined between the upper and lower plates.

Abstract translation: 描述了气体分配组件，其包括环形体，上板和下板。 上板可以限定第一多个孔，并且下板可以限定第二和第三多个孔。 上板和下板可以彼此耦合并且环形体使得第一和第二孔产生通过气体分配组件的通道，并且在上板和下板之间限定一个体积。

公开(公告)号：US12146219B2

公开(公告)日：2024-11-19

申请号：US16745141

申请日：2020-01-16

Applicant: Applied Materials, Inc.

Inventor： Kien N. Chuc ,  Qiwei Liang ,  Hanh D. Nguyen ,  Xinglong Chen ,  Matthew Miller ,  Soonam Park ,  Toan Q. Tran ,  Adib M. Khan ,  Jang-Gyoo Yang ,  Dmitry Lubomirsky ,  Shankar Venkataraman

IPC: C23C16/455 ,  C23C16/452 ,  H01J37/32

Abstract: Apparatus and methods for gas distribution assemblies are provided. In one aspect, a gas distribution assembly is provided comprising an annular body comprising an annular ring having an inner annular wall, an outer wall, an upper surface, and a bottom surface, an upper recess formed into the upper surface, and a seat formed into the inner annular wall, an upper plate positioned in the upper recess, comprising a disk-shaped body having a plurality of first apertures formed therethrough, and a bottom plate positioned on the seat, comprising a disk-shaped body having a plurality of second apertures formed therethrough which align with the first apertures, and a plurality of third apertures formed between the second apertures and through the bottom plate, the bottom plate sealingly coupled to the upper plate to fluidly isolate the plurality of first and second apertures from the plurality of third apertures.

公开(公告)号：US12009228B2

公开(公告)日：2024-06-11

申请号：US18175104

申请日：2023-02-27

Applicant: Applied Materials, Inc.

Inventor： Toan Q. Tran ,  Zilu Weng ,  Dmitry Lubomirsky ,  Satoru Kobayashi ,  Tae Seung Cho ,  Soonam Park ,  Son M. Phi ,  Shankar Venkataraman

IPC: H01L21/67 ,  H01J37/32 ,  H01L21/3065 ,  H01L21/683 ,  H01L21/687 ,  H01L21/311

CPC classification number: H01L21/67069 ,  H01J37/32715 ,  H01L21/3065 ,  H01L21/67103 ,  H01L21/67248 ,  H01L21/6831 ,  H01L21/68757 ,  H01L21/68785 ,  H01L21/68792 ,  H01L21/31116 ,  H01L21/31138

Abstract: A wafer chuck assembly includes a puck, a shaft and a base. The puck includes an electrically insulating material that defines a top surface of the puck; a plurality of electrodes are embedded within the electrically insulating material. The puck also includes an inner puck element that forms one or more channels for a heat exchange fluid, the inner puck element being in thermal communication with the electrically insulating material, and an electrically conductive plate disposed proximate to the inner puck element. The shaft includes an electrically conductive shaft housing that is electrically coupled with the plate, and a plurality of connectors, including electrical connectors for the electrodes. The base includes an electrically conductive base housing that is electrically coupled with the shaft housing, and an electrically insulating terminal block disposed within the base housing, the plurality of connectors passing through the terminal block.

公开(公告)号：US11967524B2

公开(公告)日：2024-04-23

申请号：US17089221

申请日：2020-11-04

Applicant: Applied Materials, Inc.

Inventor： Praket Prakash Jha ,  Shuchi Sunil Ojha ,  Jingmei Liang ,  Abhijit Basu Mallick ,  Shankar Venkataraman

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3205 ,  H01L21/3213 ,  H10B41/27 ,  H10B43/27

CPC classification number: H01L21/76877 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/31111 ,  H01L21/32055 ,  H01L21/32135 ,  H01L21/76802 ,  H10B41/27 ,  H10B43/27

Abstract: Exemplary methods of forming a semiconductor structure may include forming a first silicon oxide layer overlying a semiconductor substrate. The methods may include forming a first silicon layer overlying the first silicon oxide layer. The methods may include forming a silicon nitride layer overlying the first silicon layer. The methods may include forming a second silicon layer overlying the silicon nitride layer. The methods may include forming a second silicon oxide layer overlying the second silicon layer. The methods may include removing the silicon nitride layer. The methods may include removing the first silicon layer and the second silicon layer. The methods may include forming a metal layer between and contacting each of the first silicon oxide layer and the second silicon oxide layer.

公开(公告)号：US20240120193A1

公开(公告)日：2024-04-11

申请号：US17960569

申请日：2022-10-05

Applicant: Applied Materials, Inc.

Inventor： Shankar Venkataraman ,  Zeqing Shen ,  Susmit Singha Roy ,  Abhijit Basu Mallick ,  Lakmal C. Kalutarage ,  Jongbeom Seo ,  Sai Hooi Yeong ,  Benjamin Colombeau ,  Balasubramanian Pranatharthiharan

IPC: H01L21/02 ,  H01L21/311 ,  H01L29/66

CPC classification number: H01L21/02126 ,  H01L21/0206 ,  H01L21/02211 ,  H01L21/02222 ,  H01L21/02274 ,  H01L21/31116 ,  H01L29/66439 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/42392

Abstract: Exemplary methods of semiconductor processing may include etching a portion of a silicon-containing material from a substrate disposed within a processing region of a semiconductor processing chamber. The silicon-containing material may extend into one or more recesses defined by alternating layers of material deposited on the substrate. The methods may include providing a carbon-containing precursor to the processing region of the semiconductor processing chamber. The methods may include contacting a remaining silicon-containing material with the carbon-containing precursor. The contacting with the carbon-containing precursor may replenish carbon in the silicon-containing material. The methods may include providing a cleaning agent to the processing region of the semiconductor processing chamber. The methods may include contacting the substrate with the cleaning agent. The contacting with the cleaning precursor may remove surface oxide from the substrate.

公开(公告)号：US11264213B2

公开(公告)日：2022-03-01

申请号：US16511990

申请日：2019-07-15

Applicant: Applied Materials, Inc.

Inventor： Qiwei Liang ,  Xinglong Chen ,  Kien Chuc ,  Dmitry Lubomirsky ,  Soonam Park ,  Jang-Gyoo Yang ,  Shankar Venkataraman ,  Toan Tran ,  Kimberly Hinckley ,  Saurabh Garg

IPC: C23C16/40 ,  H01J37/32 ,  B05B1/00 ,  C23C16/455 ,  C23C16/452 ,  B05B1/18 ,  C23C16/50 ,  H01L21/67

Abstract: Gas distribution assemblies are described including an annular body, an upper plate, and a lower plate. The upper plate may define a first plurality of apertures, and the lower plate may define a second and third plurality of apertures. The upper and lower plates may be coupled with one another and the annular body such that the first and second apertures produce channels through the gas distribution assemblies, and a volume is defined between the upper and lower plates.

公开(公告)号：US20190139743A1

公开(公告)日：2019-05-09

申请号：US16236991

申请日：2018-12-31

Applicant: Applied Materials, Inc.

Inventor： Xinglong Chen ,  Dmitry Lubomirsky ,  Shankar Venkataraman

IPC: H01J37/32 ,  C23C16/455

Abstract: An exemplary faceplate may include a conductive plate defining a plurality of apertures. The faceplate may additionally include a plurality of inserts, and each one of the plurality of inserts may be disposed within one of the plurality of apertures. Each insert may define at least one channel through the insert to provide a flow path through the faceplate.

公开(公告)号：US10113236B2

公开(公告)日：2018-10-30

申请号：US14577828

申请日：2014-12-19

Applicant: Applied Materials, Inc.

Inventor： Adib Khan ,  Shankar Venkataraman ,  Jay D. Pinson, II ,  Jang-Gyoo Yang ,  Nitin Krishnarao Ingle ,  Qiwei Liang

IPC: C23C16/56 ,  C23C16/46 ,  C23C16/455 ,  H01L21/677 ,  H01L21/02 ,  C23C16/44 ,  H01L21/67 ,  H01L21/687

Abstract: Embodiments of the present disclosure generally relate to a batch processing chamber that is adapted to simultaneously cure multiple substrates at one time. The batch processing chamber includes multiple processing sub-regions that are each independently temperature controlled. The batch processing chamber may include a first and a second sub-processing region that are each serviced by a substrate transport device external to the batch processing chamber. In addition, a slotted cover mounted on the loading opening of the batch curing chamber reduces the effect of ambient air entering the chamber during loading and unloading.